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* nv50/ir: start LocalCSE with getFirst to merge PHI instructionsKarol Herbst2016-10-251-1/+1
* nvc0: use correct bufctx when invalidating CP texturesSamuel Pitoiset2016-10-251-1/+1
* nv50/ir: do not perform global membar for shared memorySamuel Pitoiset2016-10-241-1/+4
* nv50/ir: display OP_BAR subops in debug modeSamuel Pitoiset2016-10-241-0/+9
* nv50/ir: it appears that OP_DISCARD can't take a join modifierIlia Mirkin2016-10-221-0/+1
* nv50/ir: use levelZero for non-frag tex/txp opsIlia Mirkin2016-10-221-0/+5
* gallium: add PIPE_CAP_STREAM_OUTPUT_INTERLEAVE_BUFFERSIlia Mirkin2016-10-223-0/+3
* nvc0/ir: remove outdated comment about SHLADDSamuel Pitoiset2016-10-222-2/+0
* nv50,nvc0: don't keep track of whether fb rt0 is integer-onlyIlia Mirkin2016-10-216-44/+22
* nvc0: do not break 3D state by pushing MS coordinates on FermiSamuel Pitoiset2016-10-201-43/+44
* nvc0: translate compute shaders at program creationSamuel Pitoiset2016-10-201-0/+4
* nv50/ir: process texture offset sources as regular sourcesIlia Mirkin2016-10-191-53/+94
* nv50,nvc0: avoid reading out of bounds when getting bogus so infoIlia Mirkin2016-10-192-2/+8
* nvc0/ir: simplify predicate logic for GK104 atomic operationsSamuel Pitoiset2016-10-191-14/+7
* nvc0/ir: remove useless NVC0LoweringPass::gMemBaseSamuel Pitoiset2016-10-191-4/+1
* nv50/ir: print CCTL subops in debug modeSamuel Pitoiset2016-10-191-0/+9
* nv50/ir: silent TGSI_PROPERTY_FS_DEPTH_LAYOUTSamuel Pitoiset2016-10-191-0/+1
* gm107/ir: fix bit offset of tex lod setting for indirect texturingIlia Mirkin2016-10-181-1/+1
* gm107/ir: fix texturing with indirect samplersIlia Mirkin2016-10-181-0/+10
* nv50/ir: constant fold OP_SPLITTobias Klausmann2016-10-141-0/+18
* nv50: enable ARB_enhanced_layoutsIlia Mirkin2016-10-131-1/+1
* nvc0/ir: be more careful about preserving modifiers in SHLADD creationIlia Mirkin2016-10-131-7/+5
* nvc0: enable ARB_enhanced_layoutsSamuel Pitoiset2016-10-131-1/+1
* nvc0/ir: fix textureGather with a single offsetIlia Mirkin2016-10-121-2/+2
* nv50/ir: copy over value's register id when resolving merge of a phiIlia Mirkin2016-10-121-1/+3
* gallium: add PIPE_CAP_TGSI_ARRAY_COMPONENTSNicolai Hähnle2016-10-123-0/+3
* nv50/ir: optimize ADD(SHL(a, b), c) to SHLADD(a, b, c)Samuel Pitoiset2016-10-121-0/+87
* nvc0: fix valid range for shader buffersSamuel Pitoiset2016-10-103-0/+3
* nvc0/ir: fix overwriting of value backing non-constant gather offsetIlia Mirkin2016-10-101-2/+2
* nv50/ir: only stick one preret per functionIlia Mirkin2016-10-101-4/+7
* nv50/ir: fix wrong check when optimizing MAD to SHLADDSamuel Pitoiset2016-10-071-1/+1
* nvc0: dump program binary only when NV50_PROG_DEBUG is setSamuel Pitoiset2016-10-071-1/+1
* nvc0: expose ARB_compute_variable_group_sizeSamuel Pitoiset2016-10-071-2/+6
* nv50/ir: set number of threads/block for variable local sizeSamuel Pitoiset2016-10-071-0/+2
* gallium: add PIPE_COMPUTE_CAP_MAX_VARIABLE_THREADS_PER_BLOCKSamuel Pitoiset2016-10-072-0/+4
* nv50/ir: optimize sub(a, 0) to aKarol Herbst2016-10-061-0/+3
* nvc0: dump program binary when chipset has been forcedSamuel Pitoiset2016-10-051-0/+5
* nv50/ra: let simplify return an error and handle thatKarol Herbst2016-10-051-5/+7
* nv50/ir: teach insnCanLoad() about SHLADDSamuel Pitoiset2016-09-291-0/+2
* nv50/ir: optimize SHLADD(a, b, c) to MOV((a << b) + c)Samuel Pitoiset2016-09-291-0/+3
* nv50/ir: optimize SHLADD(a, b, 0x0) to SHL(a, b)Samuel Pitoiset2016-09-291-0/+8
* nv50/ir: optimize IMAD to SHLADD in presence of power of 2Samuel Pitoiset2016-09-291-0/+7
* nvc0/ir: add emission for SHLADDSamuel Pitoiset2016-09-293-0/+127
* nv50/ir: add preliminary support for SHLADDSamuel Pitoiset2016-09-295-7/+17
* nvc0: update GM107 sched control codes formatSamuel Pitoiset2016-09-292-23/+23
* nv50/ir: fix comments about instructions infoSamuel Pitoiset2016-09-261-2/+3
* nvc0: allow to force compiling programs in debug buildSamuel Pitoiset2016-09-261-9/+10
* nv50/ir: drop unused NVISA_XXX_CHIPSET constantsSamuel Pitoiset2016-09-261-2/+0
* nvc0: get rid of nvc0_stage_sampler_states_bind_range()Samuel Pitoiset2016-09-191-74/+9
* nvc0: get rid of nvc0_stage_set_sampler_views_range()Samuel Pitoiset2016-09-191-89/+15