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* nv50,nvc0: use alternate samplers for stencilIlia Mirkin2017-02-121-3/+3
* nvc0: set the render condition in the compute objectIlia Mirkin2017-02-111-2/+10
* gm107/ir: fix address offset bitfield for ATOMSIlia Mirkin2017-02-111-1/+1
* nv50/ir: convert an ATOM.EXCH without a destination into a storeIlia Mirkin2017-02-111-0/+5
* nvc0: fix 64-bit integer query buffer writesIlia Mirkin2017-02-113-20/+37
* nv50/ir: return a register when retrieving thread id sysvalIlia Mirkin2017-02-111-1/+1
* nv50/ir: add missing break after DSSGIlia Mirkin2017-02-111-0/+1
* nvc0/ir: fix ubo max clamp, reset file indexIlia Mirkin2017-02-091-1/+3
* nv50/ir: always return 0 when trying to read thread id along unit dimIlia Mirkin2017-02-094-5/+17
* nvc0/ir: fix robustness guarantees for constbuf loads on kepler+ computeIlia Mirkin2017-02-091-25/+22
* nvc0: increase number of ubo binding pointsIlia Mirkin2017-02-091-3/+2
* nvc0: expose int64Ilia Mirkin2017-02-091-1/+1
* nvc0/ir: make it possible to have the flags def in def0Ilia Mirkin2017-02-095-12/+15
* nvc0/ir: add support for 64-bit shift lowering on SM20/SM30Ilia Mirkin2017-02-091-6/+62
* nvc0/ir: add support for all the new int64 tgsi opcodesIlia Mirkin2017-02-096-5/+302
* nv50/ir: Split 64-bit integer MAD/MUL operationsPierre Moreau2017-02-091-0/+116
* nvc0/ir: add a "high" subop for shifts, emit shf.l/shf.r for 64-bitIlia Mirkin2017-02-093-3/+74
* nvc0/ir: fix SET and SLCT emissionIlia Mirkin2017-02-092-0/+6
* nvc0/ir: add support for emitting partial min/max ops for int64Ilia Mirkin2017-02-094-1/+14
* gallium: add separate PIPE_CAP_INT64_DIVMODIlia Mirkin2017-02-093-0/+3
* gallium: turn PIPE_SHADER_CAP_DOUBLES into a screen capabilityNicolai Hähnle2017-02-023-5/+3
* nouveau: remove explicit __STDC_FORMAT_MACROS defineEmil Velikov2017-01-271-1/+0
* gallium: Add integer 64 capabilityDave Airlie2017-01-273-0/+3
* nv50: add support for MUL_ZERO_WINS propertyIlia Mirkin2017-01-235-2/+11
* nvc0: add support for MUL_ZERO_WINS propertyIlia Mirkin2017-01-234-9/+25
* gallium: add PIPE_CAP_TGSI_MUL_ZERO_WINSIlia Mirkin2017-01-233-0/+3
* nouveau: remove always false argument in nouveau_fence_new()Emil Velikov2017-01-185-11/+6
* nv50/ir: optimize shl + andIlia Mirkin2017-01-161-0/+11
* nvc0: enable FBFETCH with a special slot for color buffer 0Ilia Mirkin2017-01-169-6/+172
* gallium: add flags parameter to texture barrierIlia Mirkin2017-01-162-2/+2
* gallium: add PIPE_CAP_TGSI_FS_FBFETCHIlia Mirkin2017-01-163-0/+3
* nvc0: true up exposing of the HW_METRIC_QUERY_GROUP for maxwellIlia Mirkin2017-01-161-2/+2
* nv50/ir: handle new DDIV op which will be used for double divisionsIlia Mirkin2017-01-161-0/+3
* nvc0/ir: emit FMZ flag when requested on FFMAIlia Mirkin2017-01-151-0/+4
* nvc0/ir: only try to check for zero LOD if we aren't already forcing itIlia Mirkin2017-01-121-1/+1
* nouveau: take extra push space into account for pushbuf_space callsIlia Mirkin2017-01-1215-56/+26
* nvc0: enable GL 4.3 on gm107+Samuel Pitoiset2017-01-121-7/+4
* nvc0: use sched control codes for gm107 MP counters codeSamuel Pitoiset2017-01-121-44/+44
* nvc0: use sched control codes for gm107 blitter shaderSamuel Pitoiset2017-01-121-6/+14
* nv50/ir: use sched control codes for gm107 builtinsSamuel Pitoiset2017-01-122-40/+40
* nv50/ir: improve instruction pipelining on gm107Samuel Pitoiset2017-01-123-4/+1027
* nv50/ir: do not insert texture barriers on gm107Samuel Pitoiset2017-01-121-1/+2
* gallium: remove TGSI_OPCODE_SUBMarek Olšák2017-01-053-8/+0
* gallium: remove TGSI_OPCODE_ABSMarek Olšák2017-01-053-9/+0
* gallium: add PIPE_CAP_GLSL_OPTIMIZE_CONSERVATIVELYMarek Olšák2017-01-053-0/+3
* gallium: support for native fence fd'sRob Clark2016-12-013-0/+3
* gallium: add PIPE_CAP_TGSI_CAN_READ_OUTPUTSNicolai Hähnle2016-11-303-0/+3
* gm107/ir: optimize 32-bit CONST load to movSamuel Pitoiset2016-11-262-0/+17
* gm107/ir: do not combine CONST loadsSamuel Pitoiset2016-11-261-2/+7
* nvc0/ir: use levelZero flag when the lod is set to 0Ilia Mirkin2016-11-202-6/+43
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