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* nvc0: enable compute support on FermiSamuel Pitoiset2015-11-081-2/+2
* nv50/ir: fix emission of s[] args in certain situationsIlia Mirkin2015-11-071-2/+2
* nv50/ir: only take abs value when computing high resultIlia Mirkin2015-11-071-1/+1
* nouveau: avoid queueing too much work onto a single fenceIlia Mirkin2015-11-072-26/+43
* nv50/ir: allow emission of immediates in imul/imad opsIlia Mirkin2015-11-071-2/+8
* nv50/ir: properly set the type of the constant folding resultIlia Mirkin2015-11-061-4/+4
* nv50/ir: add support for const-folding OP_CVT with F64 source/destIlia Mirkin2015-11-063-0/+45
* nv50/ir: add fp64 opcode emission support for G200 (NVA0)Ilia Mirkin2015-11-061-10/+84
* nv50/ir: Add support for 64bit immediates to checkSwapSrc01Hans de Goede2015-11-061-5/+6
* nvc0/ir: Teach insnCanLoad about double immediatesHans de Goede2015-11-061-6/+19
* nv50/ir: Add support for merge-s to the ConstantFolding passHans de Goede2015-11-061-0/+15
* nv50/ir: disallow 64-bit immediates on nv50 targetsIlia Mirkin2015-11-061-1/+1
* nv50/ir: allow movs with TYPE_F64 destinations to be splitIlia Mirkin2015-11-061-0/+6
* gm107/ir: Add support for double immediatesHans de Goede2015-11-061-1/+4
* nvc0/ir: Add support for double immediatesHans de Goede2015-11-061-0/+8
* nvc0: reintroduce BGRA4 format supportIlia Mirkin2015-11-062-3/+1
* nouveau: send back a debug message when waiting for a fence to completeIlia Mirkin2015-11-0510-16/+30
* nv50,nvc0: provide debug messages with shader compilation statsIlia Mirkin2015-11-0511-9/+28
* nouveau: add support for sending debug messages via KHR_debugIlia Mirkin2015-11-055-0/+26
* nouveau: relax fence emit space assertIlia Mirkin2015-11-043-3/+3
* nvc0: add missing compute parameters required by cloverSamuel Pitoiset2015-11-031-1/+10
* nvc0: handle NULL pointer in nvc0_get_compute_param()Samuel Pitoiset2015-11-031-24/+21
* nv50: use correct heaps for FP and GP code segmentsSamuel Pitoiset2015-11-011-2/+2
* nouveau: get rid of tabsIlia Mirkin2015-10-3119-607/+607
* nv50: do not create an invalid HW query typeSamuel Pitoiset2015-10-302-12/+30
* nv50: move HW queries to nv50_query_hw.c/h filesSamuel Pitoiset2015-10-308-349/+476
* nv50: move nva0_so_target_save_offset() to its correct locationSamuel Pitoiset2015-10-303-21/+18
* nv50: add a header file for nv50_querySamuel Pitoiset2015-10-306-40/+49
* nv50: mark contexts shareable, compile at creation timeIlia Mirkin2015-10-292-1/+4
* nv50: allow per-sample interpolation to be forced via rastIlia Mirkin2015-10-298-9/+52
* nvc0: expose a group of performance metrics on FermiSamuel Pitoiset2015-10-293-3/+16
* nv50/ir: adapt to new method for passing in cull/clip distance masksIlia Mirkin2015-10-294-14/+14
* nvc0: share shaders between contexts and build immediatelyIlia Mirkin2015-10-293-1/+7
* nvc0: do upload-time fixups for interpolation parametersIlia Mirkin2015-10-2915-19/+239
* nv50: add ARB_copy_image supportIlia Mirkin2015-10-282-7/+11
* nvc0: add ARB_copy_image supportIlia Mirkin2015-10-282-7/+11
* nvc0: fix crash when nv50_miptree_from_handle failsJulien Isorce2015-10-281-1/+2
* gallium: add PIPE_CAP_COPY_BETWEEN_COMPRESSED_AND_PLAIN_FORMATSMarek Olšák2015-10-283-0/+3
* nvc0: respect edgeflag attribute widthIlia Mirkin2015-10-231-7/+33
* gallium: add PIPE_SHADER_CAP_MAX_UNROLL_ITERATIONS_HINTMarek Olšák2015-10-203-0/+8
* gallium: add PIPE_CAP_SHAREABLE_SHADERSMarek Olšák2015-10-203-0/+3
* nvc0: do not bind input params at compute state init on FermiSamuel Pitoiset2015-10-181-8/+0
* nvc0: add support for performance monitoring metrics on FermiSamuel Pitoiset2015-10-174-3/+500
* nvc0: add a note about MP counters on GF100/GF110Samuel Pitoiset2015-10-161-0/+5
* nvc0: add MP counters variants for GF100/GF110Samuel Pitoiset2015-10-162-77/+483
* nvc0: move SW/HW queries info to their respective filesSamuel Pitoiset2015-10-167-178/+228
* nvc0: enable compute support by default on FermiSamuel Pitoiset2015-10-162-8/+2
* nvc0: allow only one active query for the MP counters groupSamuel Pitoiset2015-10-161-11/+9
* nvc0: read MP counters of all GPCs on FermiSamuel Pitoiset2015-10-161-1/+1
* nvc0: store the number of GPCs to nvc0_screenSamuel Pitoiset2015-10-162-0/+2
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