| Commit message (Collapse) | Author | Age | Files | Lines |
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Signed-off-by: Ilia Mirkin <[email protected]>
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In a situation where double-register values are used, the phi nodes can
still end up being u32 values. They all get merged into one RA node
though. When fixing up the merge (which comes after the phi node), the
phi node's def would get fixed, but not its sources which would remain
at the low register value.
This maintains the invariant that a phi node's defs and sources are
allocated the same register.
Signed-off-by: Ilia Mirkin <[email protected]>
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Signed-off-by: Ilia Mirkin <[email protected]>
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Signed-off-by: Ilia Mirkin <[email protected]>
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Signed-off-by: Ilia Mirkin <[email protected]>
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Signed-off-by: Ilia Mirkin <[email protected]>
Cc: <[email protected]>
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Make alignment assumptions explicit by inserting correct padding with
unknown struct members.
Reviewed-by: Ilia Mirkin <[email protected]>
Cc: <[email protected]>
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Reviewed-by: Ilia Mirkin <[email protected]>
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Reviewed-by: Ilia Mirkin <[email protected]>
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nouveau_fence_update does real work unconditionally. Avoid doing that if
the fence we're checking on has already been signalled.
Signed-off-by: Ilia Mirkin <[email protected]>
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Signed-off-by: Ilia Mirkin <[email protected]>
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Signed-off-by: Ilia Mirkin <[email protected]>
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Signed-off-by: Ilia Mirkin <[email protected]>
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With the current logic, it's very likely that s/r indirect sources are
right after the "regular" ones. Unset them before moving the texture
arguments over rather than after, as one of those arguments would
likely have assumed one of the s/r positions.
Signed-off-by: Ilia Mirkin <[email protected]>
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The new location field can be either center, centroid, or sample, which
indicates the location that the shader should interpolate at.
Signed-off-by: Ilia Mirkin <[email protected]>
Reviewed-by: Roland Scheidegger <[email protected]>
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On nvc0, a counter can have up to 6 sources instead of only one
for nve4+. This fixes a crash when a counter uses more than
one source.
Signed-off-by: Samuel Pitoiset <[email protected]>
Reviewed-by: Ilia Mirkin <[email protected]>
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The set of variable uses does not need to be ordered in any way, and
removing/adding elements is a fairly common operation in various
optimization passes.
This shortens runtime of piglit test fp-long-alu to ~22s from ~4h
Signed-off-by: Tobias Klausmann <[email protected]>
Reviewed-by: Ilia Mirkin <[email protected]>
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Apparently TXD wants its offset differently than TEX, accepting it in
the upper bits of the layer index. Unclear what happens when this is
combined with indirect sampler indexing.
Signed-off-by: Ilia Mirkin <[email protected]>
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Something about how we're implementing offsets for TXD is wrong, just
flip to the generic quadop-based implementation in that case.
This is the minimal fix appropriate for backporting.
Signed-off-by: Ilia Mirkin <[email protected]>
Cc: <[email protected]>
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handleTEX moves the layer as the first argument. This makes sure that
the quadops deal with the texture coordinates.
Signed-off-by: Ilia Mirkin <[email protected]>
Cc: <[email protected]>
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Unfortunately there's no good way to do this on the nv50 shader isa.
Dropping the bias seems preferable to doing the compare post-filtering.
Signed-off-by: Ilia Mirkin <[email protected]>
Cc: <[email protected]>
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This can only happen with texture(samplerCubeShadow, bias), where the
compare will be in the first argument.
Signed-off-by: Ilia Mirkin <[email protected]>
Cc: <[email protected]>
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Signed-off-by: Ilia Mirkin <[email protected]>
Cc: "10.2" <[email protected]>
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Signed-off-by: Ilia Mirkin <[email protected]>
Cc: "10.2" <[email protected]>
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The hardware allows multiple simultaneous renders with the same
memory-backed constbufs but with each invocation having different
values. However in order for that to work, the data has to be streamed
in via the right constbuf slot. We weren't doing that for UBOs.
Signed-off-by: Ilia Mirkin <[email protected]>
Cc: "10.2 10.1" <[email protected]>
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Now that this cap is used to determine the availability of both, adjust
its name to reflect the new reality.
Signed-off-by: Ilia Mirkin <[email protected]>
Reviewed-by: Roland Scheidegger <[email protected]>
Reviewed-by: Marek Olšák <[email protected]>
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Real support will be forthcoming. For now, avoid the unknown cap error
and compiler warning.
Signed-off-by: Ilia Mirkin <[email protected]>
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v2:
Added comments to util_draw_indirect, clarified and fixed map size.
Removed unlikely().
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Signed-off-by: Ilia Mirkin <[email protected]>
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Signed-off-by: Ilia Mirkin <[email protected]>
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Signed-off-by: Ilia Mirkin <[email protected]>
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Signed-off-by: Ilia Mirkin <[email protected]>
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Signed-off-by: Ilia Mirkin <[email protected]>
Reviewed-by: Marek Olšák <[email protected]>
Reviewed-by: Brian Paul <[email protected]>
Reviewed-by: Roland Scheidegger <[email protected]>
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Signed-off-by: Ilia Mirkin <[email protected]>
Reviewed-by: Marek Olšák <[email protected]>
Reviewed-by: Roland Scheidegger <[email protected]>
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This is the same fix than
"nvc0: fix dri3 prime buffer creation"
Signed-off-by: Axel Davy <[email protected]>
Reviewed-by: Ilia Mirkin <[email protected]>
Signed-off-by: Dave Airlie <[email protected]>
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We need to place shared buffers into GART.
Reviewed-by: Axel Davy <[email protected]>
Reviewed-by: Ilia Mirkin <[email protected]>
Signed-off-by: Dave Airlie <[email protected]>
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Signed-off-by: Ilia Mirkin <[email protected]>
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Previously, if we had something like:
gl_ViewportIndex = idx;
for(int i = 0; i < gl_in.length(); i++) {
gl_Position = gl_in[i].gl_Position;
EmitVertex();
}
EndPrimitive();
The right viewport index would not be set on the primitive because the
last vertex is the provoking one. However blob drivers appear to move
the gl_ViewportIndex write into the for loop, allowing the application
to be ignorant of this detail.
While the application is technically wrong here, because the blob does
it and other drivers appear to implicitly work this way as well, we add
a buffer register that viewport index writes go into, which is then
exported before every EmitVertex() call.
This fixes the remaining piglit tests in ARB_viewport_array for nv50/nvc0.
Signed-off-by: Tobias Klausmann <[email protected]>
Cc: "10.2" <[email protected]>
Reviewed-by: Ilia Mirkin <[email protected]>
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This is just a hack, it should be possible to create a temporary zeta
surface and render to that instead. However that's more complicated and
this avoids the render being entirely broken and errors being reported
by the card.
Signed-off-by: Ilia Mirkin <[email protected]>
Cc: "10.2" <[email protected]>
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Signed-off-by: Ilia Mirkin <[email protected]>
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Signed-off-by: Ilia Mirkin <[email protected]>
Cc: "10.2" <[email protected]>
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Signed-off-by: Ilia Mirkin <[email protected]>
Cc: "10.2" <[email protected]>
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Signed-off-by: Ilia Mirkin <[email protected]>
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Signed-off-by: Ilia Mirkin <[email protected]>
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Commit ad4dc772 fixed an issue with the viewport not being restored
correctly. However it's rather hackish and confusing. Instead just mark
the viewport dirty and let the viewport validation take care of it.
Signed-off-by: Ilia Mirkin <[email protected]>
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Use TGSI_SEMANTIC_VIEWPORT_INDEX for the last consumer.
Signed-off-by: Tobias Klausmann <[email protected]>
Reviewed-by: Ilia Mirkin <[email protected]>
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Signed-off-by: Tobias Klausmann <[email protected]>
[imirkin: mark things dirty on ctx switch, 3d blit]
Reviewed-by: Ilia Mirkin <[email protected]>
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Signed-off-by: Ilia Mirkin <[email protected]>
Cc: "10.2" <[email protected]>
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There is a short-immediate version as well, but it should never end up
getting used since it would have gotten folded earlier.
Signed-off-by: Ilia Mirkin <[email protected]>
Cc: "10.2" <[email protected]>
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Signed-off-by: Ilia Mirkin <[email protected]>
Cc: "10.2" <[email protected]>
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