| Commit message (Expand) | Author | Age | Files | Lines |
|---|
| * | nvc0: don't bother trying to set up compute for gk110+ | Ilia Mirkin | 2014-06-06 | 1 | -3/+3 |
| * | gk110: add in forgotten code for gk110 isa | Ilia Mirkin | 2014-06-06 | 1 | -0/+13 |
| * | gk110/ir: emit texbar the same way that the blob does | Ilia Mirkin | 2014-06-06 | 1 | -1/+1 |
| * | nvc0/ir: Handle OP_POPCNT when folding constant expressions | Tobias Klausmann | 2014-06-06 | 1 | -0/+13 |
| * | nvc0/ir: Handle OP_BFIND when folding constant expressions | Tobias Klausmann | 2014-06-06 | 1 | -0/+17 |
| * | nvc0/ir: Handle reverse subop for OP_EXTBF when folding constant expressions | Tobias Klausmann | 2014-06-06 | 1 | -2/+6 |
| * | nv50/ir: clear subop when folding constant expressions | Tobias Klausmann | 2014-06-06 | 1 | -0/+1 |
| * | gallium: create TGSI_PROPERTY to disable viewport and clipping | Christoph Bumiller | 2014-06-02 | 3 | -0/+4 |
| * | nvc0/ir: use SM35 ISA with GK20A | Alexandre Courbot | 2014-05-27 | 3 | -7/+12 |
| * | nvc0: add GK20A 3D class | Alexandre Courbot | 2014-05-27 | 2 | -1/+9 |
| * | nvc0: implement clear_buffer | Tobias Klausmann | 2014-05-26 | 1 | -0/+141 |
| * | nvc0: revert mistaken logic to collapse color outputs to the beginning | Ilia Mirkin | 2014-05-26 | 1 | -9/+4 |
| * | nv50: count wrapped textures towards the tex_obj count | Joakim Sindholt | 2014-05-23 | 1 | -0/+2 |
| * | nvc0: assert that we have vertex elements state | Christoph Bumiller | 2014-05-23 | 1 | -0/+1 |
| * | nvc0: use PRIxPTR for sizeof() | Christoph Bumiller | 2014-05-23 | 1 | -1/+1 |
| * | nv50,nvc0: allow 15,16,30 bpp display formats | Christoph Bumiller | 2014-05-23 | 1 | -4/+4 |
| * | nv50,nvc0: handle guard band defines | Christoph Bumiller | 2014-05-23 | 2 | -4/+16 |
| * | nv50/ir/tgsi: optimize KIL | Christoph Bumiller | 2014-05-23 | 1 | -0/+5 |
| * | nv50/ir: fix lowering of predicated instructions (without defs) | Christoph Bumiller | 2014-05-23 | 1 | -1/+4 |
| * | nv50/ir/opt: fix constant folding with saturate modifier | Christoph Bumiller | 2014-05-23 | 1 | -1/+3 |
| * | nv50/ir/tgsi: TGSI_OPCODE_POW replicates its result | Christoph Bumiller | 2014-05-23 | 1 | -1/+5 |
| * | nv50,nvc0: set constbufs dirty on pipe context switch | Christoph Bumiller | 2014-05-23 | 2 | -0/+5 |
| * | nv50: setup scissors on clear_render_target/depth_stencil | Christoph Bumiller | 2014-05-23 | 1 | -2/+18 |
| * | nv50,nvc0: always pull out bufctx on context destruction | Christoph Bumiller | 2014-05-23 | 2 | -9/+7 |
| * | nv50,nvc0: fix 3d blits with mipmap levels | Ilia Mirkin | 2014-05-21 | 2 | -11/+19 |
| * | nv50/ir: fix constant folding for OP_MUL subop HIGH | Ilia Mirkin | 2014-05-21 | 1 | -4/+43 |
| * | nv50/ir: fix s32 x s32 -> high s32 multiply logic | Ilia Mirkin | 2014-05-21 | 2 | -11/+82 |
| * | nv50/ir: fix integer mul lowering for u32 x u32 -> high u32 | Ilia Mirkin | 2014-05-18 | 1 | -3/+4 |
| * | nv50/ir: make sure that texprep/texquerylod's args get coalesced | Ilia Mirkin | 2014-05-18 | 1 | -0/+2 |
| * | nvc0: enable support for maxwell boards | Ben Skeggs | 2014-05-15 | 5 | -19/+48 |
| * | nvc0: add maxwell (sm50) compiler backend | Ben Skeggs | 2014-05-15 | 16 | -5/+3588 |
| * | nvc0: maxwell isa has no per-instruction join modifier | Ben Skeggs | 2014-05-15 | 4 | -19/+23 |
| * | nvc0: replace immd 0 with $rLASTGPR for emit/restart opcodes | Ben Skeggs | 2014-05-15 | 1 | -0/+1 |
| * | nvc0: move nvc0 lowering pass class definitions into header | Ben Skeggs | 2014-05-15 | 3 | -106/+136 |
| * | nvc0: bump sched data member to 32-bits | Ben Skeggs | 2014-05-15 | 1 | -1/+1 |
| * | nvc0: use vertex arrays for eng3d blit | Ben Skeggs | 2014-05-15 | 1 | -31/+64 |
| * | nvc0: restrict "constant vbo" logic to fermi/kepler classes | Ben Skeggs | 2014-05-15 | 1 | -1/+1 |
| * | nvc0: replace some vb->stride checks with constant_vbo instead | Ben Skeggs | 2014-05-15 | 1 | -3/+3 |
| * | nvc0: add maxwell class | Ben Skeggs | 2014-05-15 | 2 | -0/+4 |
| * | nvc0: allow for easier modification of compiler library routines | Ben Skeggs | 2014-05-15 | 13 | -1057/+1057 |
| * | nvc0: properly distribute macros in source form | Ben Skeggs | 2014-05-15 | 5 | -244/+365 |
| * | nv50,nvc0: fix blit 3d path for 1d array textures | Ilia Mirkin | 2014-05-11 | 1 | -0/+6 |
| * | nv50,nvc0: leave queries on during blit, turn them on for 2d engine | Ilia Mirkin | 2014-05-11 | 6 | -6/+35 |
| * | nv50: fix setting of texture ms info to be per-stage | Ilia Mirkin | 2014-05-11 | 3 | -6/+10 |
| * | nv50/ir: make sure to reverse cond codes on all the OP_SET variants | Ilia Mirkin | 2014-05-11 | 1 | -1/+2 |
| * | nv50/ir/gk110: fix set with f32 dest | Ilia Mirkin | 2014-05-07 | 1 | -0/+3 |
| * | nv50/ir: allow load propagation when flags are defined | Ilia Mirkin | 2014-05-07 | 1 | -3/+4 |
| * | gallium: add a cap for supporting 4-offset TG4 opcodes | Ilia Mirkin | 2014-05-07 | 3 | -0/+3 |
| * | nv50,nvc0: add X8Z24_UNORM, fix stencil-only formats | Ilia Mirkin | 2014-05-04 | 1 | -3/+9 |
| * | nouveau: add ARB_buffer_storage support | Ilia Mirkin | 2014-05-02 | 10 | -5/+112 |
