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path: root/src/gallium/drivers/nouveau/nvc0
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* nv50,nvc0: fix push hint logic in presence of a start offsetIlia Mirkin2017-10-111-5/+4
* gallium: Create a new PIPE_CAP_TILE_RASTER_ORDER for vc4.Eric Anholt2017-10-101-0/+1
* gallium: add PIPE_CAP_TGSI_ANY_REG_AS_ADDRESSMarek Olšák2017-10-061-0/+1
* gallium: add LDEXP TGSI instruction and corresponding capNicolai Hähnle2017-09-291-0/+1
* gallium: Add PIPE_SHADER_CAP_INT64_ATOMICSJan Vesely2017-09-211-0/+1
* gallium: Add PIPE_SHADER_CAP_FP16Jan Vesely2017-09-181-0/+1
* nvc0: fix compile errorBenedikt Schemmer2017-09-181-1/+1
* gallium: add PIPE_QUERY_OCCLUSION_PREDICATE_CONSERVATIVENicolai Hähnle2017-09-182-1/+7
* gallium: introduce PIPE_CAP_LOAD_CONSTBUFTimothy Arceri2017-09-151-0/+1
* nvc0: write 0 to pipeline_statistics.cs_invocationsKarol Herbst2017-08-311-0/+1
* gallium: introduce PIPE_CAP_MEMOBJTimothy Arceri2017-08-031-0/+1
* gallium: add PIPE_QUERY_SO_OVERFLOW_ANY_PREDICATE and corresponding capNicolai Hähnle2017-08-021-0/+1
* gallium: add PIPE_CAP_NIR_SAMPLERS_AS_DEREFNicolai Hähnle2017-07-311-0/+1
* nv50,nvc0: remove IDX from bufctx immediately, to avoid conflicts with clearIlia Mirkin2017-06-261-5/+5
* nvc0: fix transfer of larger rectangles with DmaCopy on gk104 and upBen Skeggs2017-06-201-9/+32
* nvc0: copy engine surface params are only relevant for tiled surfacesBen Skeggs2017-06-201-18/+19
* gallium: add PIPE_CAP_BINDLESS_TEXTURESamuel Pitoiset2017-06-141-0/+1
* util: Port nir_array functionality to u_dynarrayThomas Helland2017-06-071-1/+1
* nvc0: Add support for ARB_post_depth_coverageLyude2017-06-026-1/+11
* gallium: Add a cap to check if the driver supports ARB_post_depth_coverageLyude2017-06-021-0/+1
* nvc0: disable BGRA8 images on FermiLyude2017-06-021-5/+14
* nvc0: Clean up unnecessary includes from gallium/auxiliary/vl/Rhys Kidd2017-06-011-3/+0
* nvc0: support for GP10BAlexandre Courbot2017-05-301-0/+1
* nv50,nvc0: clear index buffer bufctx bin unconditionallyIlia Mirkin2017-05-201-2/+1
* gallium: add PIPE_CAP_ALLOW_MAPPED_BUFFERS_DURING_EXECUTIONMarek Olšák2017-05-171-0/+1
* gallium: add PIPE_CAP_CAN_BIND_CONST_BUFFER_AS_VERTEXMarek Olšák2017-05-101-0/+1
* gallium: remove pipe_index_buffer and set_index_bufferMarek Olšák2017-05-106-93/+53
* gallium: separate indirect stuff from pipe_draw_info - 80 -> 56 bytesMarek Olšák2017-05-101-8/+8
* gallium: decrease the size of pipe_vertex_buffer - 24 -> 16 bytesMarek Olšák2017-05-104-22/+22
* nv50/ir: Replace NV50_PROGRAM_IR_* by PIPE_SHADER_IR_*Pierre Moreau2017-05-071-1/+1
* nvc0: Enable compute support for PascalBoyan Ding2017-04-272-4/+5
* nvc0: Add new launch descriptor format for GP100Boyan Ding2017-04-272-34/+197
* nvc0: Fix index of unk fields in nve4_cp_launch_descBoyan Ding2017-04-271-2/+2
* nv50,nvc0: disable the TGSI merge registers passSamuel Pitoiset2017-04-261-1/+2
* gallium: add PIPE_SHADER_CAP_TGSI_SKIP_MERGE_REGISTERSSamuel Pitoiset2017-04-261-0/+1
* nvc0: Add support for setting viewport index/layer from VS/TESIlia Mirkin2017-04-204-7/+27
* gallium: add PIPE_CAP_TGSI_TES_LAYER_VIEWPORTNicolai Hähnle2017-04-141-0/+1
* nvc0: Enable ARB_shader_ballot on Kepler+Boyan Ding2017-04-131-1/+2
* nvc0: increase texture buffer object alignment to 256 for pre-GM107Ilia Mirkin2017-04-111-1/+1
* nouveau: enable ARB_shader_clock on nv50 and nvc0Boyan Ding2017-04-091-1/+1
* gallium: add PIPE_CAP_TGSI_BALLOTNicolai Hähnle2017-04-051-0/+1
* gallium: add sparse buffer interface and capabilityNicolai Hähnle2017-04-051-0/+1
* nvc0: fragprog may not be set when e.g. clearingIlia Mirkin2017-04-021-2/+3
* nvc0: Add support for NV_fill_rectangle for the GM200+Lyude2017-03-314-2/+13
* gallium: Add a cap to check if the driver supports fill_rectangleLyude2017-03-311-0/+1
* gallium: remove support for predicates from TGSI (v2)Marek Olšák2017-04-011-2/+0
* gallium: add PIPE_CAP_TGSI CLOCKNicolai Hähnle2017-03-311-0/+1
* nv50,nvc0: enable TEX_LZ and TXF_LZIlia Mirkin2017-03-181-1/+1
* gallium: add PIPE_CAP_TGSI_TEX_TXF_LZMarek Olšák2017-03-151-0/+1
* gallium: s/uint/enum pipe_render_cond_flag/ for set_render_condition()Brian Paul2017-03-081-1/+1