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path: root/src/gallium/drivers/nouveau/nvc0
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* nv50,nvc0: disable the TGSI merge registers passSamuel Pitoiset2017-04-261-1/+2
* gallium: add PIPE_SHADER_CAP_TGSI_SKIP_MERGE_REGISTERSSamuel Pitoiset2017-04-261-0/+1
* nvc0: Add support for setting viewport index/layer from VS/TESIlia Mirkin2017-04-204-7/+27
* gallium: add PIPE_CAP_TGSI_TES_LAYER_VIEWPORTNicolai Hähnle2017-04-141-0/+1
* nvc0: Enable ARB_shader_ballot on Kepler+Boyan Ding2017-04-131-1/+2
* nvc0: increase texture buffer object alignment to 256 for pre-GM107Ilia Mirkin2017-04-111-1/+1
* nouveau: enable ARB_shader_clock on nv50 and nvc0Boyan Ding2017-04-091-1/+1
* gallium: add PIPE_CAP_TGSI_BALLOTNicolai Hähnle2017-04-051-0/+1
* gallium: add sparse buffer interface and capabilityNicolai Hähnle2017-04-051-0/+1
* nvc0: fragprog may not be set when e.g. clearingIlia Mirkin2017-04-021-2/+3
* nvc0: Add support for NV_fill_rectangle for the GM200+Lyude2017-03-314-2/+13
* gallium: Add a cap to check if the driver supports fill_rectangleLyude2017-03-311-0/+1
* gallium: remove support for predicates from TGSI (v2)Marek Olšák2017-04-011-2/+0
* gallium: add PIPE_CAP_TGSI CLOCKNicolai Hähnle2017-03-311-0/+1
* nv50,nvc0: enable TEX_LZ and TXF_LZIlia Mirkin2017-03-181-1/+1
* gallium: add PIPE_CAP_TGSI_TEX_TXF_LZMarek Olšák2017-03-151-0/+1
* gallium: s/uint/enum pipe_render_cond_flag/ for set_render_condition()Brian Paul2017-03-081-1/+1
* gallium: s/uint/enum pipe_shader_type/ for set_constant_buffer()Brian Paul2017-03-081-1/+2
* gallium: s/unsigned/enum pipe_shader_type/ for pipe_screen::get_shader_param()Brian Paul2017-03-081-1/+2
* gallium/util: replace pipe_mutex_unlock() with mtx_unlock()Timothy Arceri2017-03-071-1/+1
* gallium/util: replace pipe_mutex_lock() with mtx_lock()Timothy Arceri2017-03-071-1/+1
* gallium/util: replace pipe_mutex_destroy() with mtx_destroy()Timothy Arceri2017-03-071-1/+1
* gallium/util: replace pipe_mutex_init() with mtx_init()Timothy Arceri2017-03-071-1/+1
* gallium/util: replace pipe_mutex with mtx_tTimothy Arceri2017-03-071-1/+1
* nvc0: take extra pushbuf space into account for pushbuf_space callsIlia Mirkin2017-03-041-2/+2
* nvc0: increase alignment to 256 for texture buffers on fermiIlia Mirkin2017-03-041-1/+3
* gallium: remove PIPE_CAP_USER_INDEX_BUFFERSMarek Olšák2017-02-251-1/+0
* nvc0: use PascalB for most Pascal boardsBen Skeggs2017-02-211-1/+8
* gallium: set pipe_context uploaders in drivers (v3)Marek Olšák2017-02-141-0/+10
* nvc0: disable linked tsc mode in compute launch descriptorIlia Mirkin2017-02-132-2/+6
* nvc0: set the render condition in the compute objectIlia Mirkin2017-02-111-2/+10
* nvc0: fix 64-bit integer query buffer writesIlia Mirkin2017-02-113-20/+37
* nvc0: increase number of ubo binding pointsIlia Mirkin2017-02-091-3/+2
* nvc0: expose int64Ilia Mirkin2017-02-091-1/+1
* gallium: add separate PIPE_CAP_INT64_DIVMODIlia Mirkin2017-02-091-0/+1
* gallium: turn PIPE_SHADER_CAP_DOUBLES into a screen capabilityNicolai Hähnle2017-02-021-2/+1
* gallium: Add integer 64 capabilityDave Airlie2017-01-271-0/+1
* nvc0: add support for MUL_ZERO_WINS propertyIlia Mirkin2017-01-231-1/+1
* gallium: add PIPE_CAP_TGSI_MUL_ZERO_WINSIlia Mirkin2017-01-231-0/+1
* nouveau: remove always false argument in nouveau_fence_new()Emil Velikov2017-01-181-1/+1
* nvc0: enable FBFETCH with a special slot for color buffer 0Ilia Mirkin2017-01-166-2/+113
* gallium: add flags parameter to texture barrierIlia Mirkin2017-01-161-1/+1
* gallium: add PIPE_CAP_TGSI_FS_FBFETCHIlia Mirkin2017-01-161-0/+1
* nvc0: true up exposing of the HW_METRIC_QUERY_GROUP for maxwellIlia Mirkin2017-01-161-2/+2
* nouveau: take extra push space into account for pushbuf_space callsIlia Mirkin2017-01-126-24/+9
* nvc0: enable GL 4.3 on gm107+Samuel Pitoiset2017-01-121-7/+4
* nvc0: use sched control codes for gm107 MP counters codeSamuel Pitoiset2017-01-121-44/+44
* nvc0: use sched control codes for gm107 blitter shaderSamuel Pitoiset2017-01-121-6/+14
* gallium: add PIPE_CAP_GLSL_OPTIMIZE_CONSERVATIVELYMarek Olšák2017-01-051-0/+1
* gallium: support for native fence fd'sRob Clark2016-12-011-0/+1
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