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path: root/src/gallium/drivers/nouveau/codegen
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* gk110/ir: emit texbar the same way that the blob doesIlia Mirkin2014-06-061-1/+1
* nvc0/ir: Handle OP_POPCNT when folding constant expressionsTobias Klausmann2014-06-061-0/+13
* nvc0/ir: Handle OP_BFIND when folding constant expressionsTobias Klausmann2014-06-061-0/+17
* nvc0/ir: Handle reverse subop for OP_EXTBF when folding constant expressionsTobias Klausmann2014-06-061-2/+6
* nv50/ir: clear subop when folding constant expressionsTobias Klausmann2014-06-061-0/+1
* nvc0/ir: use SM35 ISA with GK20AAlexandre Courbot2014-05-273-7/+12
* nv50/ir/tgsi: optimize KILChristoph Bumiller2014-05-231-0/+5
* nv50/ir: fix lowering of predicated instructions (without defs)Christoph Bumiller2014-05-231-1/+4
* nv50/ir/opt: fix constant folding with saturate modifierChristoph Bumiller2014-05-231-1/+3
* nv50/ir/tgsi: TGSI_OPCODE_POW replicates its resultChristoph Bumiller2014-05-231-1/+5
* nv50/ir: fix constant folding for OP_MUL subop HIGHIlia Mirkin2014-05-211-4/+43
* nv50/ir: fix s32 x s32 -> high s32 multiply logicIlia Mirkin2014-05-212-11/+82
* nv50/ir: fix integer mul lowering for u32 x u32 -> high u32Ilia Mirkin2014-05-181-3/+4
* nv50/ir: make sure that texprep/texquerylod's args get coalescedIlia Mirkin2014-05-181-0/+2
* nvc0: add maxwell (sm50) compiler backendBen Skeggs2014-05-1515-3/+3583
* nvc0: maxwell isa has no per-instruction join modifierBen Skeggs2014-05-154-19/+23
* nvc0: replace immd 0 with $rLASTGPR for emit/restart opcodesBen Skeggs2014-05-151-0/+1
* nvc0: move nvc0 lowering pass class definitions into headerBen Skeggs2014-05-153-106/+136
* nvc0: bump sched data member to 32-bitsBen Skeggs2014-05-151-1/+1
* nvc0: allow for easier modification of compiler library routinesBen Skeggs2014-05-1513-1057/+1057
* nv50: fix setting of texture ms info to be per-stageIlia Mirkin2014-05-111-0/+4
* nv50/ir: make sure to reverse cond codes on all the OP_SET variantsIlia Mirkin2014-05-111-1/+2
* nv50/ir/gk110: fix set with f32 destIlia Mirkin2014-05-071-0/+3
* nv50/ir: allow load propagation when flags are definedIlia Mirkin2014-05-071-3/+4
* nvc0/ir: offset appears to come before the Z refIlia Mirkin2014-04-281-1/+3
* nv50/ir: change texture offsets to ValueRefs, allow nonconstIlia Mirkin2014-04-288-20/+61
* nvc0/ir: do constant folding of extbf/insbfIlia Mirkin2014-04-281-1/+66
* nvc0/ir: add support for MUL_HI tgsi opcodesIlia Mirkin2014-04-281-1/+12
* nvc0/ir: add support for new bitfield manipulation opcodesIlia Mirkin2014-04-287-4/+127
* nvc0/ir: fetch shadow value from proper place for TG4 cube arrayIlia Mirkin2014-04-261-1/+4
* nvc0/ir: set gatherComp for non-shadow targetsIlia Mirkin2014-04-261-0/+2
* nvc0/ir: set instance count based on the GS_INVOCATIONS propertyIlia Mirkin2014-04-261-3/+1
* nvc0/ir: add support for INVOCATIONID system valueIlia Mirkin2014-04-262-1/+1
* nvc0/ir: add support for SAMPLEMASK sysvalIlia Mirkin2014-04-265-0/+8
* nvc0: add support for PIPE_CAP_SAMPLE_SHADINGIlia Mirkin2014-04-267-3/+61
* nv50: add support for PIPE_CAP_SAMPLE_SHADINGIlia Mirkin2014-04-266-2/+24
* nouveau/codegen: add missing values for OP_TXLQ into the target arraysIlia Mirkin2014-04-192-7/+9
* nvc0: add support for texture gatherIlia Mirkin2014-04-073-4/+20
* nvc0: enable texture query lodIlia Mirkin2014-04-073-0/+53
* nv50: enable texture query lodIlia Mirkin2014-04-075-0/+32
* nvc0/ir: move sample id to second source arg to fix sampler2DMSIlia Mirkin2014-03-202-4/+12
* nv50/ir/gk110: add postfactor support for fmulIlia Mirkin2014-03-181-0/+2
* nv50/ir/gk110: set not modifier on first source of logic opIlia Mirkin2014-03-181-3/+2
* nv50/ir/gk110: use shl/shr instead of lshf/rshf so that c[] is supportedIlia Mirkin2014-03-181-17/+6
* nv50/ir/gk110: add 64/128-bit fetch/export supportIlia Mirkin2014-03-182-7/+4
* nv50/ir/gk110: fix handling of OP_SUB for floating point opsIlia Mirkin2014-03-181-1/+6
* nv50/ir/gk110: presin/preex2 take their source at bit 23Ilia Mirkin2014-03-181-1/+1
* nv50/ir/gk110: add implementations of div u32/s32Ilia Mirkin2014-03-182-5/+162
* nv50/ir/gk110: implement quadopIlia Mirkin2014-03-181-1/+11
* nv50/ir/gk110: fill in mov from predicateIlia Mirkin2014-03-181-1/+5
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