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* nvc0/ir: fix ubo max clamp, reset file indexIlia Mirkin2017-02-091-1/+3
* nv50/ir: always return 0 when trying to read thread id along unit dimIlia Mirkin2017-02-094-5/+17
* nvc0/ir: fix robustness guarantees for constbuf loads on kepler+ computeIlia Mirkin2017-02-091-25/+22
* nvc0/ir: make it possible to have the flags def in def0Ilia Mirkin2017-02-095-12/+15
* nvc0/ir: add support for 64-bit shift lowering on SM20/SM30Ilia Mirkin2017-02-091-6/+62
* nvc0/ir: add support for all the new int64 tgsi opcodesIlia Mirkin2017-02-096-5/+302
* nv50/ir: Split 64-bit integer MAD/MUL operationsPierre Moreau2017-02-091-0/+116
* nvc0/ir: add a "high" subop for shifts, emit shf.l/shf.r for 64-bitIlia Mirkin2017-02-093-3/+74
* nvc0/ir: fix SET and SLCT emissionIlia Mirkin2017-02-092-0/+6
* nvc0/ir: add support for emitting partial min/max ops for int64Ilia Mirkin2017-02-094-1/+14
* nouveau: remove explicit __STDC_FORMAT_MACROS defineEmil Velikov2017-01-271-1/+0
* nvc0: add support for MUL_ZERO_WINS propertyIlia Mirkin2017-01-233-8/+24
* nv50/ir: optimize shl + andIlia Mirkin2017-01-161-0/+11
* nvc0: enable FBFETCH with a special slot for color buffer 0Ilia Mirkin2017-01-163-4/+59
* nv50/ir: handle new DDIV op which will be used for double divisionsIlia Mirkin2017-01-161-0/+3
* nvc0/ir: emit FMZ flag when requested on FFMAIlia Mirkin2017-01-151-0/+4
* nvc0/ir: only try to check for zero LOD if we aren't already forcing itIlia Mirkin2017-01-121-1/+1
* nv50/ir: use sched control codes for gm107 builtinsSamuel Pitoiset2017-01-122-40/+40
* nv50/ir: improve instruction pipelining on gm107Samuel Pitoiset2017-01-123-4/+1027
* nv50/ir: do not insert texture barriers on gm107Samuel Pitoiset2017-01-121-1/+2
* gallium: remove TGSI_OPCODE_SUBMarek Olšák2017-01-051-2/+0
* gallium: remove TGSI_OPCODE_ABSMarek Olšák2017-01-051-3/+0
* gm107/ir: optimize 32-bit CONST load to movSamuel Pitoiset2016-11-262-0/+17
* gm107/ir: do not combine CONST loadsSamuel Pitoiset2016-11-261-2/+7
* nvc0/ir: use levelZero flag when the lod is set to 0Ilia Mirkin2016-11-202-6/+43
* gm107/ir: emit RED instead of ATOM when no dstSamuel Pitoiset2016-11-051-1/+28
* nvc0/ir: fix emission of IMAD with NEG modifiersSamuel Pitoiset2016-10-272-2/+2
* nvc0/ir: fix emission of SHLADD with NEG modifiersSamuel Pitoiset2016-10-262-2/+2
* nv50/ir: start LocalCSE with getFirst to merge PHI instructionsKarol Herbst2016-10-251-1/+1
* nv50/ir: do not perform global membar for shared memorySamuel Pitoiset2016-10-241-1/+4
* nv50/ir: display OP_BAR subops in debug modeSamuel Pitoiset2016-10-241-0/+9
* nv50/ir: it appears that OP_DISCARD can't take a join modifierIlia Mirkin2016-10-221-0/+1
* nv50/ir: use levelZero for non-frag tex/txp opsIlia Mirkin2016-10-221-0/+5
* nvc0/ir: remove outdated comment about SHLADDSamuel Pitoiset2016-10-222-2/+0
* nv50/ir: process texture offset sources as regular sourcesIlia Mirkin2016-10-191-53/+94
* nvc0/ir: simplify predicate logic for GK104 atomic operationsSamuel Pitoiset2016-10-191-14/+7
* nvc0/ir: remove useless NVC0LoweringPass::gMemBaseSamuel Pitoiset2016-10-191-4/+1
* nv50/ir: print CCTL subops in debug modeSamuel Pitoiset2016-10-191-0/+9
* nv50/ir: silent TGSI_PROPERTY_FS_DEPTH_LAYOUTSamuel Pitoiset2016-10-191-0/+1
* gm107/ir: fix bit offset of tex lod setting for indirect texturingIlia Mirkin2016-10-181-1/+1
* gm107/ir: fix texturing with indirect samplersIlia Mirkin2016-10-181-0/+10
* nv50/ir: constant fold OP_SPLITTobias Klausmann2016-10-141-0/+18
* nvc0/ir: be more careful about preserving modifiers in SHLADD creationIlia Mirkin2016-10-131-7/+5
* nvc0/ir: fix textureGather with a single offsetIlia Mirkin2016-10-121-2/+2
* nv50/ir: copy over value's register id when resolving merge of a phiIlia Mirkin2016-10-121-1/+3
* nv50/ir: optimize ADD(SHL(a, b), c) to SHLADD(a, b, c)Samuel Pitoiset2016-10-121-0/+87
* nvc0/ir: fix overwriting of value backing non-constant gather offsetIlia Mirkin2016-10-101-2/+2
* nv50/ir: only stick one preret per functionIlia Mirkin2016-10-101-4/+7
* nv50/ir: fix wrong check when optimizing MAD to SHLADDSamuel Pitoiset2016-10-071-1/+1
* nv50/ir: set number of threads/block for variable local sizeSamuel Pitoiset2016-10-071-0/+2
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