| Commit message (Expand) | Author | Age | Files | Lines |
* | nvc0/ir: use SM35 ISA with GK20A | Alexandre Courbot | 2014-05-27 | 3 | -7/+12 |
* | nv50/ir/tgsi: optimize KIL | Christoph Bumiller | 2014-05-23 | 1 | -0/+5 |
* | nv50/ir: fix lowering of predicated instructions (without defs) | Christoph Bumiller | 2014-05-23 | 1 | -1/+4 |
* | nv50/ir/opt: fix constant folding with saturate modifier | Christoph Bumiller | 2014-05-23 | 1 | -1/+3 |
* | nv50/ir/tgsi: TGSI_OPCODE_POW replicates its result | Christoph Bumiller | 2014-05-23 | 1 | -1/+5 |
* | nv50/ir: fix constant folding for OP_MUL subop HIGH | Ilia Mirkin | 2014-05-21 | 1 | -4/+43 |
* | nv50/ir: fix s32 x s32 -> high s32 multiply logic | Ilia Mirkin | 2014-05-21 | 2 | -11/+82 |
* | nv50/ir: fix integer mul lowering for u32 x u32 -> high u32 | Ilia Mirkin | 2014-05-18 | 1 | -3/+4 |
* | nv50/ir: make sure that texprep/texquerylod's args get coalesced | Ilia Mirkin | 2014-05-18 | 1 | -0/+2 |
* | nvc0: add maxwell (sm50) compiler backend | Ben Skeggs | 2014-05-15 | 15 | -3/+3583 |
* | nvc0: maxwell isa has no per-instruction join modifier | Ben Skeggs | 2014-05-15 | 4 | -19/+23 |
* | nvc0: replace immd 0 with $rLASTGPR for emit/restart opcodes | Ben Skeggs | 2014-05-15 | 1 | -0/+1 |
* | nvc0: move nvc0 lowering pass class definitions into header | Ben Skeggs | 2014-05-15 | 3 | -106/+136 |
* | nvc0: bump sched data member to 32-bits | Ben Skeggs | 2014-05-15 | 1 | -1/+1 |
* | nvc0: allow for easier modification of compiler library routines | Ben Skeggs | 2014-05-15 | 13 | -1057/+1057 |
* | nv50: fix setting of texture ms info to be per-stage | Ilia Mirkin | 2014-05-11 | 1 | -0/+4 |
* | nv50/ir: make sure to reverse cond codes on all the OP_SET variants | Ilia Mirkin | 2014-05-11 | 1 | -1/+2 |
* | nv50/ir/gk110: fix set with f32 dest | Ilia Mirkin | 2014-05-07 | 1 | -0/+3 |
* | nv50/ir: allow load propagation when flags are defined | Ilia Mirkin | 2014-05-07 | 1 | -3/+4 |
* | nvc0/ir: offset appears to come before the Z ref | Ilia Mirkin | 2014-04-28 | 1 | -1/+3 |
* | nv50/ir: change texture offsets to ValueRefs, allow nonconst | Ilia Mirkin | 2014-04-28 | 8 | -20/+61 |
* | nvc0/ir: do constant folding of extbf/insbf | Ilia Mirkin | 2014-04-28 | 1 | -1/+66 |
* | nvc0/ir: add support for MUL_HI tgsi opcodes | Ilia Mirkin | 2014-04-28 | 1 | -1/+12 |
* | nvc0/ir: add support for new bitfield manipulation opcodes | Ilia Mirkin | 2014-04-28 | 7 | -4/+127 |
* | nvc0/ir: fetch shadow value from proper place for TG4 cube array | Ilia Mirkin | 2014-04-26 | 1 | -1/+4 |
* | nvc0/ir: set gatherComp for non-shadow targets | Ilia Mirkin | 2014-04-26 | 1 | -0/+2 |
* | nvc0/ir: set instance count based on the GS_INVOCATIONS property | Ilia Mirkin | 2014-04-26 | 1 | -3/+1 |
* | nvc0/ir: add support for INVOCATIONID system value | Ilia Mirkin | 2014-04-26 | 2 | -1/+1 |
* | nvc0/ir: add support for SAMPLEMASK sysval | Ilia Mirkin | 2014-04-26 | 5 | -0/+8 |
* | nvc0: add support for PIPE_CAP_SAMPLE_SHADING | Ilia Mirkin | 2014-04-26 | 7 | -3/+61 |
* | nv50: add support for PIPE_CAP_SAMPLE_SHADING | Ilia Mirkin | 2014-04-26 | 6 | -2/+24 |
* | nouveau/codegen: add missing values for OP_TXLQ into the target arrays | Ilia Mirkin | 2014-04-19 | 2 | -7/+9 |
* | nvc0: add support for texture gather | Ilia Mirkin | 2014-04-07 | 3 | -4/+20 |
* | nvc0: enable texture query lod | Ilia Mirkin | 2014-04-07 | 3 | -0/+53 |
* | nv50: enable texture query lod | Ilia Mirkin | 2014-04-07 | 5 | -0/+32 |
* | nvc0/ir: move sample id to second source arg to fix sampler2DMS | Ilia Mirkin | 2014-03-20 | 2 | -4/+12 |
* | nv50/ir/gk110: add postfactor support for fmul | Ilia Mirkin | 2014-03-18 | 1 | -0/+2 |
* | nv50/ir/gk110: set not modifier on first source of logic op | Ilia Mirkin | 2014-03-18 | 1 | -3/+2 |
* | nv50/ir/gk110: use shl/shr instead of lshf/rshf so that c[] is supported | Ilia Mirkin | 2014-03-18 | 1 | -17/+6 |
* | nv50/ir/gk110: add 64/128-bit fetch/export support | Ilia Mirkin | 2014-03-18 | 2 | -7/+4 |
* | nv50/ir/gk110: fix handling of OP_SUB for floating point ops | Ilia Mirkin | 2014-03-18 | 1 | -1/+6 |
* | nv50/ir/gk110: presin/preex2 take their source at bit 23 | Ilia Mirkin | 2014-03-18 | 1 | -1/+1 |
* | nv50/ir/gk110: add implementations of div u32/s32 | Ilia Mirkin | 2014-03-18 | 2 | -5/+162 |
* | nv50/ir/gk110: implement quadop | Ilia Mirkin | 2014-03-18 | 1 | -1/+11 |
* | nv50/ir/gk110: fill in mov from predicate | Ilia Mirkin | 2014-03-18 | 1 | -1/+5 |
* | nv50/ir/gk110: handle derivAll flag, fix useOffsets for non-txf | Ilia Mirkin | 2014-03-18 | 1 | -4/+8 |
* | nv50/ir/gk110: fix setting texture for txd/txf/txq | Ilia Mirkin | 2014-03-18 | 1 | -9/+8 |
* | nv50/ir/gk110: add texcsaa implementation | Ilia Mirkin | 2014-03-18 | 1 | -1/+11 |
* | nv50/ir/gk110: add pfetch support | Ilia Mirkin | 2014-03-18 | 1 | -1/+9 |
* | nv50/ir/gk110: add emit/restart implementations | Ilia Mirkin | 2014-03-18 | 1 | -1/+8 |