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path: root/src/gallium/drivers/nouveau/codegen/nv50_ir_peephole.cpp
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* gm107/ir: avoid combining geometry shader stores at 0x60Ilia Mirkin2020-01-121-0/+10
* tree-wide: replace MAYBE_UNUSED with ASSERTEDEric Engestrom2019-07-311-1/+1
* nv50/ir: handle insn not being there for definition of CVT argIlia Mirkin2019-07-271-2/+3
* nv50/ir: disable tryCollapseChainedMULs in ConstantFolding for precise instru...Karol Herbst2019-01-181-1/+1
* nv50/ir: fix use-after-free in ConstantFolding::visitKarol Herbst2018-12-091-33/+49
* nv50/ir: remove dnz flag when converting MAD to ADD due to optimizationsIlia Mirkin2018-11-241-0/+3
* nv50/ir: delete MINMAX instruction that is no longer in the BBIlia Mirkin2018-11-161-1/+1
* nv50/ir: fix ConstantFolding::createMul for 64 bit mulsKarol Herbst2018-10-201-1/+1
* nvir: Always split 64-bit IMAD/IMUL operationsPierre Moreau2018-09-131-1/+1
* nv50/ir: optimize multiplication by 16-bit immediates into two xmadsRhys Perry2018-08-271-0/+10
* nv50/ir: optimize near power-of-twos into shladdRhys Perry2018-08-271-0/+27
* nv50/ir: move a * b -> a << log2(b) code into createMul()Rhys Perry2018-08-271-15/+30
* nv50/ir: optimize imul/imad to xmadsRhys Perry2018-08-271-0/+56
* nv50/ir: add preliminary support for OP_XMADRhys Perry2018-08-271-2/+16
* gm200/ir: optimize rcp(sqrt) to rsqKarol Herbst2018-08-041-1/+10
* nv50/ir: move LateAlgebraicOpt back to right after ConstantFoldingRhys Perry2018-07-191-1/+1
* nv50/ir: handle SHLADD in IndirectPropagationRhys Perry2018-07-191-0/+12
* nv50/ir: fix Instruction::isActionEqual for PHI instructionsKarol Herbst2018-07-071-0/+6
* nvc0/ir: use the combined tid special registerRhys Perry2018-07-071-0/+40
* util: Move util_is_power_of_two to bitscan.h and rename to util_is_power_of_t...Ian Romanick2018-03-291-2/+2
* nvir: dont optimize mad with subops to shladdKarol Herbst2018-02-241-1/+2
* nv50/ir: Fix unused var warnings in release buildRhys Kidd2017-12-291-1/+3
* nv50/ir: move LateAlgebraicOpt to the very endIlia Mirkin2017-11-261-1/+1
* nv50/ir: add optimization for modulo by a non-power-of-2 valueIlia Mirkin2017-11-261-0/+15
* nv50/ir: optimize signed integer modulo by pow-of-2Ilia Mirkin2017-11-251-3/+28
* nv50/ir: clean up saturated values immediatelyIlia Mirkin2017-08-121-1/+6
* nv50/ir: fix ConstantFolding with saturationKarol Herbst2017-08-091-0/+8
* nv50/ir: disable mul+add to mad for precise instructionsKarol Herbst2017-07-211-2/+3
* nv50/ir: fix combineLd/St to update existing records as necessaryIlia Mirkin2017-06-261-0/+8
* nv50/ir: adjust overlapping logic to take fileIndex-relative offsetsIlia Mirkin2017-06-261-1/+5
* nv50/ir: VFETCH is also considered a load for MemoryOptIlia Mirkin2017-06-261-1/+1
* nv50/ir: Properly fold constants in SPLIT operationPierre Moreau2017-06-251-3/+4
* nv50/ir: also do PostRaLoadPropagation for FMAKarol Herbst2017-03-311-0/+1
* gm107/ir: add LIMM form of madKarol Herbst2017-03-311-2/+1
* gk110/ir: add LIMM form of madKarol Herbst2017-03-311-1/+1
* nv50/ir: implement mad post ra folding for nvc0+Karol Herbst2017-03-311-4/+47
* nv50/ir: restructure and rename postraconstantfolding passKarol Herbst2017-03-311-58/+63
* nvc0/ir: also do ConstantFolding for FMAKarol Herbst2017-03-311-0/+1
* nv50/ir: check for origin insn in findOriginForTestWithZeroPierre Moreau2017-03-091-0/+2
* nv50/ir: convert an ATOM.EXCH without a destination into a storeIlia Mirkin2017-02-111-0/+5
* nvc0/ir: add support for all the new int64 tgsi opcodesIlia Mirkin2017-02-091-1/+5
* nv50/ir: Split 64-bit integer MAD/MUL operationsPierre Moreau2017-02-091-0/+116
* nvc0: add support for MUL_ZERO_WINS propertyIlia Mirkin2017-01-231-0/+1
* nv50/ir: optimize shl + andIlia Mirkin2017-01-161-0/+11
* nv50/ir: start LocalCSE with getFirst to merge PHI instructionsKarol Herbst2016-10-251-1/+1
* nv50/ir: it appears that OP_DISCARD can't take a join modifierIlia Mirkin2016-10-221-0/+1
* nv50/ir: constant fold OP_SPLITTobias Klausmann2016-10-141-0/+18
* nvc0/ir: be more careful about preserving modifiers in SHLADD creationIlia Mirkin2016-10-131-7/+5
* nv50/ir: optimize ADD(SHL(a, b), c) to SHLADD(a, b, c)Samuel Pitoiset2016-10-121-0/+87
* nv50/ir: fix wrong check when optimizing MAD to SHLADDSamuel Pitoiset2016-10-071-1/+1
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