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path: root/src/gallium/drivers/iris
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* iris: Add restriction to 3DSTATE_CONSTANT_ packets.Rafael Antognolli2019-12-041-0/+11
* iris: Use 3DSTATE_CONSTANT_ALL when possible.Rafael Antognolli2019-12-042-2/+76
* iris: Rework push constants emitting code.Rafael Antognolli2019-12-041-42/+83
* iris: Stop setting up fake paramsJason Ekstrand2019-12-042-13/+6
* iris: Allow max dynamic pool size of 2GB for gen12Jordan Justen2019-12-021-1/+9
* iris: Map FXT1 texture formatsKenneth Graunke2019-12-011-0/+2
* iris: Disable VF cache partial address workaround on Gen11+Kenneth Graunke2019-11-262-0/+14
* iris: Update SURFACE_STATE addresses when setting sampler viewsKenneth Graunke2019-11-251-0/+3
* iris: Maintain CPU-side SURFACE_STATE copies for views and surfaces.Kenneth Graunke2019-11-252-55/+136
* iris: Create an "iris_surface_state" wrapper structKenneth Graunke2019-11-252-27/+36
* iris: Drop 'old_address' parameter from iris_rebind_bufferKenneth Graunke2019-11-253-7/+6
* iris: Stop mutating the resource in get_rt_read_isl_surf().Kenneth Graunke2019-11-251-19/+14
* iris: Change keybox parentingKenneth Graunke2019-11-221-3/+2
* intel: Add workaround for stencil state.Rafael Antognolli2019-11-191-0/+12
* iris: Re-enable param compactionJason Ekstrand2019-11-181-1/+1
* intel/compiler: Add a flag to avoid compacting push constantsJason Ekstrand2019-11-181-0/+1
* iris: Wrap iris_fix_edge_flags in NIR_PASSKenneth Graunke2019-11-141-1/+10
* iris: Properly move edgeflag_out from output list to global listKenneth Graunke2019-11-141-8/+16
* util: Move gallium's PIPE_FORMAT utils to /util/format/Eric Anholt2019-11-147-7/+7
* iris: Use mocs from isl_dev.Rafael Antognolli2019-11-127-71/+71
* iris: try to set the specified tiling when importing a dmabufJames Xiong2019-11-043-11/+29
* iris: Fix "Force Zero RTA Index Enable" setting againKenneth Graunke2019-11-041-1/+1
* iris/gen11+: Move flush for render target changeJordan Justen2019-10-311-19/+20
* iris: Add IRIS_DIRTY_RENDER_BUFFER state flagJordan Justen2019-10-311-1/+3
* iris: Add Tile Cache Flush for Unified Cache.Rafael Antognolli2019-10-302-0/+21
* iris: Set MOCS for external surfaces to uncachedJordan Justen2019-10-301-4/+8
* iris: Align fast clear color state buffer to a page.Rafael Antognolli2019-10-301-0/+5
* iris: Resolve stencil resource prior to copy or used by CPUSagar Ghuge2019-10-291-9/+19
* iris: Prepare resources before stencil blit operationSagar Ghuge2019-10-291-7/+52
* iris: Prepare depth resource if clear_depth enableSagar Ghuge2019-10-291-2/+2
* iris: Prepare stencil resource before clear depth stencilSagar Ghuge2019-10-291-2/+10
* iris: Resolve stencil buffer lossless compression with WM_HZ_OP packetSagar Ghuge2019-10-291-9/+13
* intel: Track stencil aux usage on Gen12+Sagar Ghuge2019-10-291-0/+1
* iris: Allocate main and aux surfaces togetherNanley Chery2019-10-291-34/+21
* iris: Determine aux offsets within configure_auxNanley Chery2019-10-291-10/+9
* iris: Bail resource creation upon aux creation errorNanley Chery2019-10-291-16/+17
* iris: Drop iris_resource::aux::extra_aux::boNanley Chery2019-10-292-16/+3
* iris: Implement new way for setting streamout buffers.Plamena Manolova2019-10-292-3/+23
* loader: default to iris for all future PCI IDsEric Engestrom2019-10-281-0/+1
* iris: Create resource with aux_usage MCS_CCSSagar Ghuge2019-10-281-1/+2
* iris: Get correct resource aux usage for copySagar Ghuge2019-10-281-0/+1
* iris: Define MCS_CCS state transitions and usagesSagar Ghuge2019-10-282-5/+10
* iris: Initialize CCS to fast clear while using with MCSSagar Ghuge2019-10-281-3/+14
* iris: Disallow incomplete resource creationNanley Chery2019-10-281-2/+6
* iris: Don't leak the resource for unsupported modifierNanley Chery2019-10-281-1/+1
* iris: Enable HIZ_CCS samplingNanley Chery2019-10-283-8/+24
* iris: Start using blorp_can_hiz_clear_depth()Nanley Chery2019-10-281-1/+7
* iris: Enable HIZ_CCS in depth buffer instructionsNanley Chery2019-10-282-3/+7
* iris: Define initial HIZ_CCS state and transitionsNanley Chery2019-10-283-13/+20
* iris: Create an unusable secondary aux surfaceNanley Chery2019-10-282-6/+49