| Commit message (Collapse) | Author | Age | Files | Lines |
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Whether HiZ is enalbed or not, separate stencil is supported and enforced on
GEN7+. Now that we support separate stencil resources, we know how to emit
3DSTATE_STENCIL_BUFFER.
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For allocations, we need to support stencil-only and separate stencil
resources. For mapping, we need to support software tiling and
packing/unpacking for separate stencil resources.
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Map the bo directly, instead of calling transfer_map().
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Always check if a bo is busy in choose_transfer_method() since we always need
to map it in either map() or unmap(). Also determine how a bo is mapped in
choose_transfer_method().
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Add tex_get_box_offset() to compute transfer offet from the pipe_box. Add
tex_get_slice_stride() to compute slice stride for a transfer.
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We should not write staging data back when PIPE_TRANSFER_WRITE is not set.
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Rename some functions and reorder some code.
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Always return a tile-aligned offset. Also fix for W tiling.
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Use ilo_buffer for buffer resources and ilo_texture for texture resources. A
major cleanup is necessitated by the separation.
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In preparation for the introduction of ilo_buffer.
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Resource mapping is distinct from resource allocation, and is going to get
more and more complex. Move the related functions to a new file to make the
separation clear.
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Fixes "Uninitialized scalar variable" defect reported by Coverity.
Signed-off-by: Vinson Lee <[email protected]>
Reviewed-by: Chia-I Wu <[email protected]>
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Now tells Gallium that ilo supports primitive restart.
Updated ilo_draw_vbo to be able to check that the indexed
primitive being rendered can actually be supported in HW. If not,
will break up into individual prims similar to what Mesa does.
[olv: a minor fix after rebasing and formatting]
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It is decompressed to and stored as PIPE_FORMAT_R8G8B8X8_UNORM on-the-fly.
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It can be used for unpacking compressed texture on-the-fly or to support
explicit transfer flushing.
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We want to or need to use a different mapping method when when the resource is
busy, the bo format differs from the requested format, and etc.
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For separate stencil buffer or formats not supported natively, the real format
of the bo may differ from that requested.
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tgsi_opcode_infer_{src,dst}_type() works just fine.
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And remove toy_tgsi_get_texture_coord_dim().
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Fixes "Missing break in switch" defect reported by Coverity.
Signed-off-by: Vinson Lee <[email protected]>
Reviewed-by: Chia-I Wu <[email protected]>
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It can be selected with
BOARD_GPU_DRIVERS := ilo
Signed-off-by: Chia-I Wu <[email protected]>
Reviewed-by: Tapani Pälli <[email protected]>
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Correctly set the types of the temporaries. We do not want type conversions
when moving the results to the final destinations.
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It should be unsigned, not enum pipe_flush_flags.
Fixed a build error:
src/gallium/state_trackers/egl/android/native_android.cpp:426:29: error:
invalid conversion from 'int' to 'pipe_flush_flags' [-fpermissive]
v2: replace all occurrences of enum pipe_flush_flags by unsigned
Signed-off-by: Chia-I Wu <[email protected]>
Reviewed-by: Marek Olšák <[email protected]>
[olv: document the parameter now that the type is unsigned]
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We do not need our own prim_count() anymore.
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On GEN7+, is->dev.has_gen7_sol_reset is required.
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When the SO targets are changed and no appending is requested, we need to send
SOL_RESET on GEN7+.
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With the commands supported by GPE, we can finally program the states.
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They were just stubs before.
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Move max_svbi calculation to a helper function and make it available for other
GENs.
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pipe_stream_output_info tells us which of OUT[i] needs to be written out.
We need the info to map OUT[i] to VUE offset.
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It will be used for SOL_RESET on GEN7.
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We do not allocate such resources yet though.
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As we do not advertise MSAA support, this change should not make any
difference yet.
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There is no reason to waste the memory when the HW can support compact array
spacing (ARYSPC_LOD0).
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It seems a bit weird to have device limits in a context.
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We need only dev->gen, but it makes sense to expose other information to the
compiler.
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We need only dev->gen and dev->gt, but it makes sense to expose other
information to the pipeline.
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The struct is used to describe the device information, such as PCI ID, GEN,
GT, and etc.
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This is a simple shader compiler that performs almost zero optimizations. The
generated code is usually much larger comparing to that generated by i965.
The generated code also requires many more registers.
Function-wise, it lacks register spilling and does not support most TGSI
indirections. Other than those, it works alright.
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This just adds a stub.
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This just hooks them up with auxiliary/vl layer.
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The 3D pipeline is a high-level interface to emit 3D commands and states. It
uses GEN6 GPE to do the real work.
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GEN6 GPE (Graphics Processing Engine) is a low-level interface to emit 3D
commands and states.
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