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path: root/src/gallium/drivers/ilo/ilo_resource.h
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* ilo: EOL unmaintained older gallium intel driverEdward O'Callaghan2017-02-031-187/+0
| | | | | | | | This is no longer actively maintained and is just accumulating bitrot. Signed-off-by: Edward O'Callaghan <[email protected]> Acked-by: Chia-I Wu <[email protected]>
* ilo: replace pipe_format by gen_surface_formatChia-I Wu2015-06-261-0/+1
| | | | | Replace pipe_format by gen_surface_format in ilo_image. Change how depth format is specified in ilo_state_zs.
* ilo: remove ilo_bufferChia-I Wu2015-06-261-2/+1
| | | | | | | | | | Since the addition of ilo_vma, it was used only to pad a bo for sampling engine surfaces. Replace it entirely with these functions ilo_state_surface_buffer_size() ilo_state_vertex_buffer_size() ilo_state_index_buffer_size() ilo_state_sol_buffer_size()
* ilo: introduce ilo_vmaChia-I Wu2015-06-261-8/+13
| | | | | This cleans up the code a bit and makes ilo_state_vector_resource_renamed() simpler and more robust. It also allows a single bo to back mulitple VMAs.
* ilo: add ilo_image_can_enable_aux()Chia-I Wu2015-05-021-24/+0
| | | | It replaces ilo_texture_can_enable_hiz().
* ilo: improve readability of ilo_imageChia-I Wu2015-05-021-1/+1
| | | | Improve docs, rename struct fields, and reorder walk types. No real changes.
* ilo: add ilo_buffer.h to coreChia-I Wu2015-05-021-13/+10
| | | | Rename the original ilo_buffer to ilo_buffer_resource to avoid name conflict.
* ilo: move BOs from ilo_texture to ilo_imageChia-I Wu2015-05-021-5/+2
| | | | We want to work with ilo_image instead of ilo_texture in core.
* ilo: move ilo_layout.[ch] to core as ilo_image.[ch]Chia-I Wu2015-05-021-2/+2
| | | | Move files and s/layout/image/.
* ilo: move intel_winsys.h to coreChia-I Wu2015-05-021-1/+1
| | | | | Add a new subdirectory and start moving files that do not depend on ilo_screen/ilo_context to it.
* ilo: migrate to ilo_layoutChia-I Wu2014-08-191-44/+10
| | | | Embed an ilo_layout in ilo_texture, and remove now duplicated members.
* ilo: add ilo_resource_get_bo() helperChia-I Wu2014-07-281-0/+10
| | | | We will need it in the following commit.
* ilo: clean up resource bo renamingChia-I Wu2014-07-241-2/+2
| | | | | s/alloc_bo/rename_bo/ as that is what the functions do. Simplify bo allocation and move the complexity to bo renaming.
* ilo: move away from drm_intel_bo_alloc_tiledChia-I Wu2014-07-151-11/+4
| | | | | We want to know the exact sizes of the BOs, and the driver has the knowledge to do so. Refactoring of the resource allocation code is needed though.
* ilo: replace bo alloc flags by initial domainsChia-I Wu2014-03-101-2/+0
| | | | | | The only alloc flag is INTEL_ALLOC_FOR_RENDER, which can as well be expressed by specifying the initial write domain. The change makes it obvious that we failed to set INTEL_ALLOC_FOR_RENDER in several places.
* ilo: add slice clear valueChia-I Wu2014-02-221-1/+29
| | | | | It is needed for 3DSTATE_CLEAR_PARAMS, and can also be used to track what value the slice has been cleared to.
* ilo: better readability and doc for texture flagsChia-I Wu2014-02-221-0/+32
| | | | | Improve comments for the flags, and explicitly separate their uses in slice flags and resolve flags.
* ilo: disable HiZ for misaligned levelsChia-I Wu2014-01-141-3/+21
| | | | | | | | | | | | | | We need to disable HiZ for non-8x4 aligned levels, except for level 0, layer 0. For the very first layer we can adjust Width and Height fields of 3DSTATE_DEPTH_BUFFER to make it aligned. Specifically, add ILO_TEXTURE_HIZ and set the flag only for properly aligned levels. ilo_texture_can_enable_hiz() is updated to check for the flag. In tex_layout_validate(), align the depth bo to 8x4 so that we can adjust Width/Height of 3DSTATE_DEPTH_BUFFER without introducing out-of-bound access. Finally in rectlist blitter, add the ability to adjust 3DSTATE_DEPTH_BUFFER.
* ilo: use a helper to determine if HiZ is enabledChia-I Wu2014-01-141-0/+7
| | | | | Add ilo_texture_can_enable_hiz and replace all checks for tex->hiz.bo by calls to ilo_texture_can_enable_hiz().
* ilo: simplify ilo_texture_set_slice_flags()Chia-I Wu2014-01-141-5/+3
| | | | | Call ilo_texture_get_slice() for the last slice so that we can get rid of the duplicated assert().
* ilo: add flags to texture slicesChia-I Wu2014-01-081-0/+29
| | | | | The flags are used to mark who (CPU, BLT, or RENDER) has accessed the resource and how (READ or WRITE).
* ilo: rename and add an accessor for texture slicesChia-I Wu2014-01-081-6/+21
| | | | | Rename ilo_texture::slice_offsets to ilo_texture::slices and add an accessor, ilo_texture_get_slice().
* ilo: add support for HiZ allocationChia-I Wu2014-01-081-0/+5
| | | | Add tex_create_hiz() to create HiZ bo. It is not really called yet.
* ilo: add support for stencil resources on GEN7+Chia-I Wu2013-05-161-0/+2
| | | | | | For allocations, we need to support stencil-only and separate stencil resources. For mapping, we need to support software tiling and packing/unpacking for separate stencil resources.
* ilo: simplify ilo_texture_get_slice_offset()Chia-I Wu2013-05-151-1/+1
| | | | Always return a tile-aligned offset. Also fix for W tiling.
* ilo: rework ilo_textureChia-I Wu2013-05-141-12/+24
| | | | | Use ilo_buffer for buffer resources and ilo_texture for texture resources. A major cleanup is necessitated by the separation.
* ilo: rename ilo_resource to ilo_textureChia-I Wu2013-05-141-8/+8
| | | | In preparation for the introduction of ilo_buffer.
* ilo: move transfer-related functions to a new fileChia-I Wu2013-05-141-3/+2
| | | | | | Resource mapping is distinct from resource allocation, and is going to get more and more complex. Move the related functions to a new file to make the separation clear.
* ilo: allow bo format to differ from that requestedChia-I Wu2013-05-091-0/+1
| | | | | For separate stencil buffer or formats not supported natively, the real format of the bo may differ from that requested.
* ilo: use UMS layout for render targetsChia-I Wu2013-05-011-0/+2
| | | | | As we do not advertise MSAA support, this change should not make any difference yet.
* ilo: support and prefer compact array spacingChia-I Wu2013-05-011-0/+4
| | | | | There is no reason to waste the memory when the HW can support compact array spacing (ARYSPC_LOD0).
* ilo: add GEN6 GPEChia-I Wu2013-04-261-0/+5
| | | | | GEN6 GPE (Graphics Processing Engine) is a low-level interface to emit 3D commands and states.
* ilo: hook up pipe screen resource functionsChia-I Wu2013-04-261-0/+46
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* ilo: new pipe driver for Intel GEN6+Chia-I Wu2013-04-261-0/+42
This commit adds some boilerplate code. The header files found under include/ are copied from i965.
generated by cgit v1.2.3 (git 2.39.1) at 2024-12-03 19:38:10 +0000