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path: root/src/gallium/drivers/ilo/ilo_gpe_gen6.c
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* ilo: add support for TBOs on GEN6Chia-I Wu2013-05-271-8/+26
| | | | This hunk was missing in the last commit.
* ilo: set more fields of 3DSTATE_DEPTH_BUFFERChia-I Wu2013-05-221-48/+120
| | | | | | | | Set lod/layer related fields of 3DSTATE_DEPTH_BUFFER. Since we always point to a single level/layer, those fields are always zero and this commit effectively makes no change. While at it, make it easier to disable manual slice offset calculation.
* ilo: correctly set view extent in SURFACE_STATEChia-I Wu2013-05-221-41/+59
| | | | | | | The view extent was set to be the same as the depth while it should be set to the number of layers. It makes a difference for 3D textures. Also use this as a chance to clean up the code.
* ilo: emit 3DSTATE_STENCIL_BUFFER on GEN7+Chia-I Wu2013-05-161-6/+13
| | | | | | Whether HiZ is enalbed or not, separate stencil is supported and enforced on GEN7+. Now that we support separate stencil resources, we know how to emit 3DSTATE_STENCIL_BUFFER.
* ilo: add support for stencil resources on GEN7+Chia-I Wu2013-05-161-0/+3
| | | | | | For allocations, we need to support stencil-only and separate stencil resources. For mapping, we need to support software tiling and packing/unpacking for separate stencil resources.
* ilo: simplify ilo_texture_get_slice_offset()Chia-I Wu2013-05-151-2/+2
| | | | Always return a tile-aligned offset. Also fix for W tiling.
* ilo: rework ilo_textureChia-I Wu2013-05-141-24/+16
| | | | | Use ilo_buffer for buffer resources and ilo_texture for texture resources. A major cleanup is necessitated by the separation.
* ilo: rename ilo_resource to ilo_textureChia-I Wu2013-05-141-63/+63
| | | | In preparation for the introduction of ilo_buffer.
* ilo: use UMS layout for render targetsChia-I Wu2013-05-011-0/+3
| | | | | As we do not advertise MSAA support, this change should not make any difference yet.
* ilo: support and prefer compact array spacingChia-I Wu2013-05-011-0/+3
| | | | | There is no reason to waste the memory when the HW can support compact array spacing (ARYSPC_LOD0).
* ilo: move device limits to ilo_dev_info or to GPEsChia-I Wu2013-05-011-5/+48
| | | | It seems a bit weird to have device limits in a context.
* ilo: use ilo_dev_info in GPE and 3D pipelineChia-I Wu2013-05-011-183/+183
| | | | | We need only dev->gen and dev->gt, but it makes sense to expose other information to the pipeline.
* ilo: add GEN6 GPEChia-I Wu2013-04-261-0/+4570
GEN6 GPE (Graphics Processing Engine) is a low-level interface to emit 3D commands and states.