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* i915g: enable x-tiling for render targetsDaniel Vetter2010-12-021-4/+0
| | | | | | Signed-off-by: Daniel Vetter <[email protected]> Reviewed-by: Jakob Bornecrantz <[email protected]> Signed-off-by: Jakob Bornecrantz <[email protected]>
* i915g: switch rendering to mipmapped textures to (x,y) offsetsDaniel Vetter2010-12-023-9/+29
| | | | | | | | | | | | | Byte offsets simply don't work with tiled render targets when using tiling bits. Luckily we can cox the hw into doing the right thing with the DRAWING_RECT command by disabling the drawing rect offset for the depth buffer. Minor fixes by Jakob Bornecrantz. Signed-off-by: Daniel Vetter <[email protected]> Reviewed-by: Jakob Bornecrantz <[email protected]> Signed-off-by: Jakob Bornecrantz <[email protected]>
* i915g: enable X-tiling for texturesDaniel Vetter2010-12-023-0/+27
| | | | | | | | | Tiling is rather fragile in general and results in pure blackness when unlucky. Hence add a new option to disable tiling. Signed-off-by: Daniel Vetter <[email protected]> Reviewed-by: Jakob Bornecrantz <[email protected]> Signed-off-by: Jakob Bornecrantz <[email protected]>
* i915g: don't pot-align stride for tiled buffersDaniel Vetter2010-12-021-2/+3
| | | | | | | | | libdrm will do this for us, if it's required (i.e. if tiling is possible). Signed-off-by: Daniel Vetter <[email protected]> Reviewed-by: Jakob Bornecrantz <[email protected]> Signed-off-by: Jakob Bornecrantz <[email protected]>
* i915g: postpone mipmap/face offset calculationDaniel Vetter2010-12-023-27/+43
| | | | | | | | | | | | | | | | | | | | libdrm-intel can refuse to tile buffers for various reasons. For potentially tiled buffers the stride is therefore only known after the iws->buffer_create_tiled call. Unconditionally rounding up to whatever tiling requires wastes space, so rework the code to not use tex->stride in the layout code. Luckily only the mimap/face offset calculation uses it which can easily be solved by storing an (x, y) coordinate pair. Furthermore this will be usefull later for properly supporting rendering into the different levels of tiled mipmap textures. v2: switch to nblocks(x|y): More in line with gallium and better suited for rendering into mipmap textures. Signed-off-by: Daniel Vetter <[email protected]> Reviewed-by: Jakob Bornecrantz <[email protected]> Signed-off-by: Jakob Bornecrantz <[email protected]>
* i915g: implement unfenced relocs for textures using tiling bitsDaniel Vetter2010-12-023-5/+20
| | | | | | Signed-off-by: Daniel Vetter <[email protected]> Reviewed-by: Jakob Bornecrantz <[email protected]> Signed-off-by: Jakob Bornecrantz <[email protected]>
* i915g: implement unfenced color&depth buffer using tiling bitsDaniel Vetter2010-12-022-8/+22
| | | | | | | | v2: Clarify tiling bit calculation as suggested by Chris Wilson. Signed-off-by: Daniel Vetter <[email protected]> Reviewed-by: Jakob Bornecrantz <[email protected]> Signed-off-by: Jakob Bornecrantz <[email protected]>
* i915g: return tiling in iws->buffer_from_handleDaniel Vetter2010-12-022-1/+5
| | | | | | | | | | This is needed to properly implement tiling flags. And the gem implemention fo buffer_from_handle already calls get_tiling, so it's for free. Signed-off-by: Daniel Vetter <[email protected]> Reviewed-by: Jakob Bornecrantz <[email protected]> Signed-off-by: Jakob Bornecrantz <[email protected]>
* i915g: prepare winsys/batchbuffer for execbuf2Daniel Vetter2010-12-025-10/+13
| | | | | | | | Wire up a fenced parameter, switch all relocations to _FENCED Signed-off-by: Daniel Vetter <[email protected]> Reviewed-by: Jakob Bornecrantz <[email protected]> Signed-off-by: Jakob Bornecrantz <[email protected]>
* i915g: switch to tiled allocations, kill set_fenceDaniel Vetter2010-12-022-23/+2
| | | | | | | | | This way relaxed fencing is handled by libdrm. And buffers _can't_ ever change their tiling. Signed-off-by: Daniel Vetter <[email protected]> Reviewed-by: Jakob Bornecrantz <[email protected]> Signed-off-by: Jakob Bornecrantz <[email protected]>
* i915g: add winsys function to create tiled buffersDaniel Vetter2010-12-021-0/+14
| | | | | | | | | | | | | | Different kernels have different restrictions for tiled buffers. Hence use the libdrm abstraction to calculate the necessary stride and height alignment requirements. Not yet used. v2: Incorporate review comments from Jakob Bornecrantz Signed-off-by: Daniel Vetter <[email protected]> Reviewed-by: Jakob Bornecrantz <[email protected]> Signed-off-by: Jakob Bornecrantz <[email protected]>
* i915g: drop alignment parameter from iws->buffer_createDaniel Vetter2010-12-023-4/+4
| | | | | | | | | | | | It's unnecessary. The kernel gem ignores it totally and we can't run on the old userspace fake bo manager due to lack of dri2. Also drop the redundant name string from the sw winsys as suggested by Jakob Bornecrantz Signed-off-by: Daniel Vetter <[email protected]> Reviewed-by: Jakob Bornecrantz <[email protected]> Signed-off-by: Jakob Bornecrantz <[email protected]>
* gallium: add PIPE_SHADER_CAP_SUBROUTINESMarek Olšák2010-11-221-0/+2
| | | | | | | | | | | This fixes piglit/glsl-vs-main-return and glsl-fs-main-return for the drivers which don't support RET (i915g, r300g, r600g, svga). ir_to_mesa does not currently generate subroutines, but it's a matter of time till it's added. It would then break all the drivers which don't implement them, so this CAP makes sense. Signed-off-by: Marek Olšák <[email protected]>
* i915g: kill RGBA/X formatsDaniel Vetter2010-11-211-4/+0
| | | | | | | | It's intel, so always little endian! Reviewed-by: Jakob Bornecrantz <[email protected]> Signed-off-by: Daniel Vetter <[email protected]> Signed-off-by: Jakob Bornecrantz <[email protected]>
* i915g: add pineview pci idsDaniel Vetter2010-11-212-0/+10
| | | | | | Reviewed-by: Jakob Bornecrantz <[email protected]> Signed-off-by: Daniel Vetter <[email protected]> Signed-off-by: Jakob Bornecrantz <[email protected]>
* i915g: s/hw_tiled/tilingDaniel Vetter2010-11-212-6/+7
| | | | | | | | | | More in line with other intel drivers. Change to use enum by Jakob Bornecrantz. Reviewed-by: Jakob Bornecrantz <[email protected]> Signed-off-by: Daniel Vetter <[email protected]> Signed-off-by: Jakob Bornecrantz <[email protected]>
* i915g: rip out ->sw_tiledDaniel Vetter2010-11-214-15/+0
| | | | | | | | | | | | | | | | | | It looks like this was meant to facilitate unfenced access to textures/ color/renderbuffers. It's totally incomplete and fundamentally broken on a few levels: - broken: The kernel needs to about every tiled bo to fix up bit17 swizzling on swap-in. - unflexible: fenced/unfenced relocs from execbuffer2 do the same, much simpler. - unneeded: with relaxed fencing tiled gem bos are as memory-efficient as this trick. Hence kill it. Reviewed-by: Jakob Bornecrantz <[email protected]> Signed-off-by: Daniel Vetter <[email protected]> Signed-off-by: Jakob Bornecrantz <[email protected]>
* i915g: fill out CAPs for indirect addressingMarek Olšák2010-11-121-0/+5
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* scons: Add aliases for several pipe drivers.José Fonseca2010-11-021-4/+2
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* scons: Revamp how to specify targets to build.José Fonseca2010-11-011-1/+1
| | | | | | | | | | | | | | | | | | | | | | Use scons target and dependency system instead of ad-hoc options. Now is simply a matter of naming what to build. For example: scons libgl-xlib scons libgl-gdi scons graw-progs scons llvmpipe and so on. And there is also the possibility of scepcified subdirs, e.g. scons src/gallium/drivers If nothing is specified then everything will be build. There might be some rough corners over the next days. Please bare with me.
* gallium/i915: remove duplicated includeNicolas Kaiser2010-09-301-1/+0
| | | | | | Remove duplicated include. Signed-off-by: Brian Paul <[email protected]>
* i915g: Fix 'control reaches end of non-void function' warning.Vinson Lee2010-09-131-1/+2
| | | | | | Fixes the following GCC warning. i915_screen.c: In function 'i915_get_shader_param': i915_screen.c:184: warning: control reaches end of non-void function
* i915: Fix "implicit declaration of function 'draw_get_shader_param'" warning.Vinson Lee2010-09-131-0/+1
| | | | | | Fixes the following GCC warning. i915_screen.c: In function 'i915_get_shader_param': i915_screen.c:147: warning: implicit declaration of function 'draw_get_shader_param'
* gallium: introduce get_shader_param (ALL DRIVERS CHANGED) (v3)Luca Barbieri2010-09-141-0/+44
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Changes in v3: - Also change trace, which I forgot about Changes in v2: - No longer adds tessellation shaders Currently each shader cap has FS and VS versions. However, we want a version of them for geometry, tessellation control, and tessellation evaluation shaders, and want to be able to easily query a given cap type for a given shader stage. Since having 5 duplicates of each shader cap is unmanageable, add a new get_shader_param function that takes both a shader cap from a new enum and a shader stage. Drivers with non-unified shaders will first switch on the shader and, within each case, switch on the cap. Drivers with unified shaders instead first check whether the shader is supported, and then switch on the cap. MAX_CONST_BUFFERS is now per-stage. The geometry shader cap is removed in favor of checking whether the limit of geometry shader instructions is greater than 0, which is also used for tessellation shaders. WARNING: all drivers changed and compiled but only nvfx tested
* gallium: Use draw_set_index_buffer and others.Chia-I Wu2010-08-252-17/+8
| | | | | | Update all drivers to use draw_set_index_buffer, draw_set_mapped_index_buffer, and draw_vbo. Remove draw_set_mapped_element_buffer and draw_set_mapped_element_buffer_range.
* gallium: make all checks for PIPE_TEXTURE_2D check for PIPE_TEXTURE_RECT tooLuca Barbieri2010-08-201-1/+4
| | | | | | | Searched for them with: git grep -E '[!=]=.*PIPE_TEXTURE_2D|PIPE_TEXTURE_2D.*[!=]=|case.*PIPE_TEXTURE_2D' Behavior hasn't been changed.
* galahad, i915g: Copy over constant buffer index check.Corbin Simpson2010-08-201-2/+0
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* galahad, i915g: Move over a few state asserts.Corbin Simpson2010-08-201-3/+0
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* gallium: Avoid void pointer arithmetic.Chia-I Wu2010-07-291-2/+2
| | | | This fixes fdo bug #29286.
* gallium: Keep only pipe_context::draw_vbo.Chia-I Wu2010-07-291-62/+0
| | | | | | | That is, remove pipe_context::draw_arrays, pipe_context::draw_elements, pipe_context::draw_arrays_instanced, pipe_context::draw_elements_instanced, pipe_context::draw_range_elements.
* gallium: Implement draw_vbo and set_index_buffer for all drivers.Chia-I Wu2010-07-293-17/+68
| | | | | | | | | | | | | | | Some drivers define a generic function that is called by all drawing functions. To implement draw_vbo for such drivers, either draw_vbo calls the generic function or the prototype of the generic function is changed to match draw_vbo. Other drivers have no such generic function. draw_vbo is implemented by calling either draw_arrays and draw_elements. For most drivers, set_index_buffer does not mark the state dirty for tracking. Instead, the index buffer state is emitted whenever draw_vbo is called, just like the case with draw_elements. It surely can be improved.
* i915g: Set total_nblocksy in from_handleJakob Bornecrantz2010-07-221-0/+1
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* i915g: Add some debug prints in texture codeJakob Bornecrantz2010-07-221-6/+10
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* i915g: Ifdef out debug code on non-debug buildsJakob Bornecrantz2010-07-221-0/+5
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* i915g: Remove unnecessary header.Vinson Lee2010-07-041-1/+0
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* i915g: Minor cleanupsJakob Bornecrantz2010-07-042-9/+16
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* i915g: Make batchbuffer flush function not be inlineJakob Bornecrantz2010-07-043-15/+28
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* i915g: Rename texture state to map stateJakob Bornecrantz2010-07-041-23/+23
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* i915g: Move fragment state to its own fileJakob Bornecrantz2010-07-046-17/+64
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* i915g: Move static state to its own fileJakob Bornecrantz2010-07-044-18/+50
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* i915g: Don't dirty dynamic state if it hasn't changedJakob Bornecrantz2010-07-041-1/+4
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* i915g: Don't flush after blitJakob Bornecrantz2010-07-041-2/+0
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* i915g: Don't flush empty batchbuffersJakob Bornecrantz2010-07-041-2/+0
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* Merge branch 'gallium-drm-driver-drescriptor'Jakob Bornecrantz2010-06-283-7/+14
|\ | | | | | | | | | | | | | | | | Conflicts: src/gallium/state_trackers/egl/x11/native_dri2.c src/gallium/state_trackers/egl/x11/native_x11.c src/gallium/state_trackers/egl/x11/native_x11.h src/gallium/state_trackers/xorg/xorg_driver.c src/gallium/winsys/radeon/drm/radeon_drm.c
| * i915g: Move bootstrap code to targetsJakob Bornecrantz2010-06-063-7/+14
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* | i915g: Revert debug hunks from last commitJakob Bornecrantz2010-06-221-2/+2
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* | i915g: Reduce state emission by using a index biasJakob Bornecrantz2010-06-221-27/+122
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* | i915g: Drop fifo code in vbufJakob Bornecrantz2010-06-221-43/+2
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* | i915g: Change state code in vbuf codeJakob Bornecrantz2010-06-221-12/+23
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* | i915g: Rework debug print codeJakob Bornecrantz2010-06-2211-82/+190
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