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* freedreno/a3xx: fix blending of L8 formatIlia Mirkin2015-09-231-0/+2
| | | | | | | | | Even though luminance formats don't have alpha, we still want the alpha output to go to the blender. This fixes the luminance blending tests. Signed-off-by: Ilia Mirkin <[email protected]> Cc: "11.0" <[email protected]> (cherry picked from commit 545a3cbb011e0e7722c2accb330c0994aea5cc38)
* freedreno/a4xx: formats updateRob Clark2015-09-011-5/+5
| | | | | | | Fixes glamor, which wants to use R8 integer textures. Signed-off-by: Rob Clark <[email protected]> (cherry picked from commit 000e225360c020e8b3de142c4c898baad321d242)
* freedreno: update generated headersRob Clark2015-09-015-5/+8
| | | | | Signed-off-by: Rob Clark <[email protected]> (cherry picked from commit afb6c24a207fe7b9917644b940e4c5d1870c5c92)
* freedreno/a3xx: add basic clip plane supportIlia Mirkin2015-08-313-1/+24
| | | | | | | | | | The hardware is capable of dealing with GL1-style user clip planes. No clip vertex, no clip distances. Fixes a number of ucp tests, as well as neverball. Signed-off-by: Ilia Mirkin <[email protected]> Cc: "11.0" <[email protected]> (cherry picked from commit 58e24b4761ec8c348bf6825c2355a6e047599306)
* util/ra: Make allocating conflict lists optionalJason Ekstrand2015-08-181-1/+1
| | | | | | | | | Since i965 is now using make_reg_conflicts_transitive and doesn't need q-value computations, they are disabled on i965. They are enabled everywhere else so that they get the old behavior. This reduces the time spent in eglInitialize() on BDW by around 10-15%. Reviewed-by: Eric Anholt <[email protected]>
* freedreno: use fd_pipe_wait_timeout()Rob Clark2015-08-182-21/+1
| | | | | | | | To properly support the case of waiting on a fence with a 0 timeout, we still need to call down to the kernel. Which requires the use of the new fd_pipe_wait_timeout() API. Signed-off-by: Rob Clark <[email protected]>
* freedreno: fence fixRob Clark2015-08-183-4/+8
| | | | | | | Don't take current timestamp/fence from current ring, as we might have already rolled over to new rb. Signed-off-by: Rob Clark <[email protected]>
* freedreno/a3xx: add s3tc texture format supportIlia Mirkin2015-08-171-0/+9
| | | | Signed-off-by: Ilia Mirkin <[email protected]>
* freedreno/a3xx: fix up logic for handling block formatsIlia Mirkin2015-08-173-5/+7
| | | | | | | This only appears in cubemaps which have have packed layers, so are very sensitive to any layout disagreement between sw and hw. Signed-off-by: Ilia Mirkin <[email protected]>
* freedreno/a3xx: double the polygon offset valueIlia Mirkin2015-08-171-1/+1
| | | | | | A few other drivers do this, fixes the gl-1.4-polygon-offset piglit test Signed-off-by: Ilia Mirkin <[email protected]>
* freedreno/a3xx: add per-texture seamless cubemap controlIlia Mirkin2015-08-162-1/+2
| | | | | | | The default is to enable seamless cubemap filtering, but there's a bit to turn it off. Signed-off-by: Ilia Mirkin <[email protected]>
* freedreno/a4xx: add cube map array supportIlia Mirkin2015-08-154-4/+14
| | | | Signed-off-by: Ilia Mirkin <[email protected]>
* freedreno/a4xx: fix srgb render targetsRob Clark2015-08-153-8/+22
| | | | | | Also fixes mipmap level generation for srgb textures. Signed-off-by: Rob Clark <[email protected]>
* freedreno: update generated headersRob Clark2015-08-155-14/+30
| | | | Signed-off-by: Rob Clark <[email protected]>
* freedreno: expose OES exts for float linear filteringIlia Mirkin2015-08-141-2/+4
| | | | | | a4xx can do both float and half-float, while a3xx can only do half-float Signed-off-by: Ilia Mirkin <[email protected]>
* gallium: add an interface for EXT_depth_bounds_testMarek Olšák2015-08-141-0/+1
| | | | | Reviewed-by: Roland Scheidegger <[email protected]> Reviewed-by: Brian Paul <[email protected]>
* gallium: add support for GLES texture float extensions (v3)Marek Olšák2015-08-141-0/+2
| | | | | | | | | | | | Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=74329 v2: add a CAP for half floats drivers should not expose the CAPs if they don't support the formats v3: update relnotes Reviewed-by: Edward O'Callaghan <[email protected]> Reviewed-by: Roland Scheidegger <[email protected]>
* freedreno/a4xx: format updatesRob Clark2015-08-121-4/+4
| | | | Signed-off-by: Rob Clark <[email protected]>
* freedreno/a3xx+a4xx: add texture buffer object supportRob Clark2015-08-127-11/+41
| | | | | | | | | Basic texture buffer support. Should be straightforward to add first/ last_element support. And with a bit of work in ir3 emulate larger texture buffer sizes. But this seems to be enough for stk gl31 render paths. Signed-off-by: Rob Clark <[email protected]>
* freedreno/ir3: 'keeps' need neighbors found tooRob Clark2015-08-121-0/+5
| | | | | | | | | This shows up with a glamor shader, which does a TXF and uses the result for conditional kill. Before we wouldn't group the fanin (collect) neighbors which need to be allocated adjacently at RA, resulting in badness. Signed-off-by: Rob Clark <[email protected]>
* freedreno/ir3/print: print left/right neighbors tooRob Clark2015-08-121-0/+14
| | | | | | When debugging compiler, this is useful to see. Signed-off-by: Rob Clark <[email protected]>
* freedreno/ir3: use nir pass to lower const to scalarRob Clark2015-08-121-0/+1
| | | | Signed-off-by: Rob Clark <[email protected]>
* freedreno/a4xx: point-size and spritelist fixesRob Clark2015-08-127-50/+46
| | | | | | | | | a4xx needs similar treatment as 995f55a6 Also fixup a few point-size and vpsrepl issues and drop fix_blit_fp() hack previously needed for mem2gmem. Signed-off-by: Rob Clark <[email protected]>
* freedreno: cap cleanupsRob Clark2015-08-122-16/+16
| | | | | | | | Move a few things around to group stuff that is common to a3xx/a4xx together. Also, introduce is_ir3() for things that are more specific to the compiler / shader-ISA than to the gpu generation. Signed-off-by: Rob Clark <[email protected]>
* freedreno/a4xx: add s8/z32/z32_s8x24 supportRob Clark2015-08-104-37/+151
| | | | Signed-off-by: Rob Clark <[email protected]>
* freedreno: update generated headersRob Clark2015-08-105-5/+183
| | | | Signed-off-by: Rob Clark <[email protected]>
* freedreno/a4xx: fix vpsrepl for blit shadersRob Clark2015-08-101-5/+14
| | | | Signed-off-by: Rob Clark <[email protected]>
* freedreno/a4xx: clear cached fp when switching blit progRob Clark2015-08-101-0/+2
| | | | | | | | | For gmem restore (mem2gmem), we swap blit programs, in order to have a different frag shader for depth vs color restore. But we weren't actually clearing the cached fp, so it would not actually change the frag shader as expected. Signed-off-by: Rob Clark <[email protected]>
* freedreno/a3xx: clear cached fp when switching blit progRob Clark2015-08-101-0/+2
| | | | | | | | | For gmem restore (mem2gmem), we swap blit programs, in order to have a different frag shader for depth vs color restore. But we weren't actually clearing the cached fp, so it would not actually change the frag shader as expected. Signed-off-by: Rob Clark <[email protected]>
* freedreno/a4xx: add independent blend function supportRob Clark2015-08-042-8/+10
| | | | | | needed for MRT Signed-off-by: Rob Clark <[email protected]>
* freedreno/a4xx: MRT supportRob Clark2015-08-0412-132/+212
| | | | Signed-off-by: Rob Clark <[email protected]>
* freedreno: move the half-precision logic into coreRob Clark2015-08-044-31/+38
| | | | | | | | Both a3xx and a4xx need the same logic to decide if half-precision can be used for blit shaders. So move it to core and simplify things a bit with a helper that considers all render targets. Signed-off-by: Rob Clark <[email protected]>
* freedreno: simplify/cleanup resource status trackingRob Clark2015-08-044-48/+71
| | | | | | | | | Collapse dirty/reading bools into status bitmask (and drop writing which should really be the same as dirty). And use 'used_resources' list for all tracking, including zsbuf/cbufs, rather than special casing the color and depth/stencil buffers. Signed-off-by: Rob Clark <[email protected]>
* freedreno: fix stream-out caps vec4->componentsRob Clark2015-08-041-2/+2
| | | | | | Should be in units of components, not vec4's Signed-off-by: Rob Clark <[email protected]>
* freedreno: small bit of cleanup about max rendertargetsRob Clark2015-08-0413-17/+40
| | | | | | | | We hard-coded 4 or 8 as the max in various places. Switch it all to a define since the limit will go up with a4xx (and maybe even again in the future?) Signed-off-by: Rob Clark <[email protected]>
* freedreno/ir3: add transform-feedback supportRob Clark2015-07-274-4/+230
| | | | Signed-off-by: Rob Clark <[email protected]>
* freedreno/ir3: track "keeps" in irRob Clark2015-07-274-23/+17
| | | | | | | | | | | | Previously we had a fixed array to track kills, since they don't generate an SSA value, and then cheated by stuffing them in the outputs array before sending things through depth/sched/etc. But store instructions will need similar treatment. So convert this over to a more general array of instructions that must be kept and fix up the places that were previously relying on kills being in the output array. Signed-off-by: Rob Clark <[email protected]>
* freedreno/ir3: add support for store instructionsRob Clark2015-07-273-6/+43
| | | | | | | | | | For store instructions, the "dst" register is a read register, not a written register. (Ie. it is the address to store to.) Lets not confuse register allocation, scheduling, etc, with these details. Instead just leave a dummy instr->regs[0], and take "dst" from instr->regs[1] and srcs following. Signed-off-by: Rob Clark <[email protected]>
* freedreno/ir3: cleanup driver-param stuffRob Clark2015-07-273-10/+31
| | | | | | | | | Add 'enum ir3_driver_param' to track driver-param slots, and a create_driver_param() helper to avoid having the knowledge about where driver params are placed in const regs spread throughout the code as we add additional driver-params. Signed-off-by: Rob Clark <[email protected]>
* freedreno: add transform-feedback stateRob Clark2015-07-274-3/+95
| | | | Signed-off-by: Rob Clark <[email protected]>
* freedreno: add resource tracking support for written buffersRob Clark2015-07-274-12/+17
| | | | | | | | With stream-out (transform-feedback) we have the case where resources are *written* by the gpu, which needs basically the same tracking to figure out when rendering must be flushed. Signed-off-by: Rob Clark <[email protected]>
* freedreno/a3xx+a4xx: add support for vtxcnt semanticRob Clark2015-07-274-14/+31
| | | | | | This will be used for stream-out (transform-feedback) Signed-off-by: Rob Clark <[email protected]>
* freedreno/ir3: add stream-output support to cmdline compilerRob Clark2015-07-271-4/+22
| | | | | | A bit hard-coded configuration at the moment, but sufficient for now. Signed-off-by: Rob Clark <[email protected]>
* freedreno/ir3: drop unused create_input() argRob Clark2015-07-271-11/+8
| | | | Signed-off-by: Rob Clark <[email protected]>
* freedreno/ir3: move emit_const to ir3Rob Clark2015-07-2712-229/+263
| | | | | | | | | | | | | | | Details of the cmdstream packets are different between a3xx and a4xx, but the logic about the layout of const registers is the same, as that is dictated by the ir3 shader compiler. So rather than duplicating logic that is tightly coupled to ir3 between a3xx and a4xx, move this into ir3 and use per-generation callbacks for to build the cmdstream packets. This should make it easier to pass additional const regs (such as for transform feedback). And it also keeps the layout internal to ir3 in case we want to make the layout more dynamic some day. Signed-off-by: Rob Clark <[email protected]>
* freedreno/ir3: bit of shader API refactoringRob Clark2015-07-277-22/+25
| | | | | | | | | | | | Since for transform-feedback, we'll need more than just the TGSI tokens from the state object, just pass the entire state object to ir3_shader_create(). This also cleans things up a bit for some day in the future when we could take shader either as TGSI or directly NIR (for ex, glsl2nir or spirv2nir paths). In the same spirit, drop extra args from ir3_compile_shader_nir() (since it can anyways get what it needs from the ir3_shader_variant). Signed-off-by: Rob Clark <[email protected]>
* freedreno/ir3: updated cat6 encodingRob Clark2015-07-275-113/+230
| | | | | | | Sync updated cat6 encoding from freedreno.git, needed to properly encode store instructions. Signed-off-by: Rob Clark <[email protected]>
* gallium: replace INLINE with inlineIlia Mirkin2015-07-2120-29/+29
| | | | | | | | | | | | | | | | Generated by running: git grep -l INLINE src/gallium/ | xargs sed -i 's/\bINLINE\b/inline/g' git grep -l INLINE src/mesa/state_tracker/ | xargs sed -i 's/\bINLINE\b/inline/g' git checkout src/gallium/state_trackers/clover/Doxyfile and manual edits to src/gallium/include/pipe/p_compiler.h src/gallium/README.portability to remove mentions of the inline define. Signed-off-by: Ilia Mirkin <[email protected]> Acked-by: Marek Olšák <[email protected]>
* gallium: add PIPE_CAP_MAX_SHADER_PATCH_VARYINGSMarek Olšák2015-07-161-0/+1
| | | | Reviewed-by: Ilia Mirkin <[email protected]>
* freedreno/a4xx: occlusion query supportRob Clark2015-07-101-1/+85
| | | | Signed-off-by: Rob Clark <[email protected]>
generated by cgit v1.2.3 (git 2.39.1) at 2024-12-26 11:47:46 +0000