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* freedreno/ir3: fix load_front_face conversionIlia Mirkin2017-07-121-6/+3
| | | | | | | | | | | | | | The comments are correct - we get -1 and 0. However by adding 1, we convert this into 0,1. This mostly works for conditionals, but when negated, this will yield the wrong result. Instead just negate the values (as they are backwards -- -1 means back instead of front). Fixes tests/shaders/glsl-fs-frontfacing-not.shader_test and dEQP-GLES3.functional.shaders.builtin_variable.frontfacing on A530. The latter also tested on A306 by Rob Clark. Signed-off-by: Ilia Mirkin <[email protected]>
* a5xx: fix condition for updating *_FS_OUTPUT_CNTLIlia Mirkin2017-07-091-1/+1
| | | | | | | | | | | The register values depend on the currently set program, so make sure to revalidate when the program changes. Fixes glsl-1.10-fragdepth as well as dEQP-GLES3.functional.shaders.fragdepth.compare.* Signed-off-by: Ilia Mirkin <[email protected]> Reviewed-by: Rob Clark <[email protected]>
* a5xx: remove no-longer-accurate border color layout commentIlia Mirkin2017-07-081-32/+1
| | | | | | | | Better to just point at the bcolor_entry struct which has our current understanding encoded into it. Also add an assert to ensure that the struct remains the expected size. Signed-off-by: Ilia Mirkin <[email protected]>
* a5xx: fix border color for depth formatsIlia Mirkin2017-07-081-1/+5
| | | | Signed-off-by: Ilia Mirkin <[email protected]>
* a5xx: add border color clamping, add packed border color formatsIlia Mirkin2017-07-081-11/+59
| | | | Signed-off-by: Ilia Mirkin <[email protected]>
* a5xx: fix border colors for swizzled texture formatsIlia Mirkin2017-07-081-14/+14
| | | | Signed-off-by: Ilia Mirkin <[email protected]>
* a5xx: fix integer texture border colorsIlia Mirkin2017-07-081-4/+2
| | | | Signed-off-by: Ilia Mirkin <[email protected]>
* a5xx: fix primitive restartIlia Mirkin2017-07-082-12/+23
| | | | Signed-off-by: Ilia Mirkin <[email protected]>
* a5xx: add support for rendering to RGB10A2_UNORM formatsIlia Mirkin2017-07-071-3/+3
| | | | Signed-off-by: Ilia Mirkin <[email protected]>
* a5xx: set uint/sint bits for mrt output registerIlia Mirkin2017-07-072-2/+8
| | | | Signed-off-by: Ilia Mirkin <[email protected]>
* a5xx: add backface stencil emissionIlia Mirkin2017-07-074-9/+27
| | | | Signed-off-by: Ilia Mirkin <[email protected]>
* a5xx: enable polygon offset clampsIlia Mirkin2017-07-041-1/+3
| | | | | | | This is already set and emitted by the code. Signed-off-by: Ilia Mirkin <[email protected]> Acked-by: Rob Clark <[email protected]>
* a5xx: implement logicop supportIlia Mirkin2017-07-043-7/+13
| | | | | | | The former 0x60 hardcoded in is equivalent to ROP_COPY with the shift. Signed-off-by: Ilia Mirkin <[email protected]> Acked-by: Rob Clark <[email protected]>
* a5xx: enable polygon mode selectionIlia Mirkin2017-07-044-7/+24
| | | | | Signed-off-by: Ilia Mirkin <[email protected]> Acked-by: Rob Clark <[email protected]>
* a5xx: disable ARB_depth_clamp for nowIlia Mirkin2017-07-041-1/+3
| | | | | | | | We need to figure out how to implement it properly. Right now it doesn't work at all. Signed-off-by: Ilia Mirkin <[email protected]> Acked-by: Rob Clark <[email protected]>
* a5xx: fix clip_halfz supportIlia Mirkin2017-07-043-4/+7
| | | | | Signed-off-by: Ilia Mirkin <[email protected]> Acked-by: Rob Clark <[email protected]>
* a5xx: improve 3d texture samplingIlia Mirkin2017-07-041-3/+0
| | | | | | | | | At least the first level works now. Eventually the later levels stop working, there appears to be some alignment issue. But this improves the situation immensely. Signed-off-by: Ilia Mirkin <[email protected]> Acked-by: Rob Clark <[email protected]>
* a5xx: remove one of the MIPFILTER_LINEAR bitsIlia Mirkin2017-07-041-1/+0
| | | | | | | | | It doesn't appear to do what we want. Removing this bit makes lodclamp-between as well as a number of dEQP tests pass, with no visible ill effect. Signed-off-by: Ilia Mirkin <[email protected]> Acked-by: Rob Clark <[email protected]>
* a5xx: enable formats newly added to the headersIlia Mirkin2017-07-041-69/+69
| | | | | | | | | This enables S3TC, BPTC, ETC2, and ASTC texture decoding. Additionally this enables RGB32 texture buffer objects, as well as 11_11_10_FLOAT and 10_10_10_2 vertex formats (and related extensions). Signed-off-by: Ilia Mirkin <[email protected]> Acked-by: Rob Clark <[email protected]>
* a5xx: include color swap when decoding verticesIlia Mirkin2017-07-041-0/+1
| | | | | | | This fixes support for BGRA vertex formats Signed-off-by: Ilia Mirkin <[email protected]> Acked-by: Rob Clark <[email protected]>
* a5xx: update headersIlia Mirkin2017-07-041-10/+47
| | | | | Signed-off-by: Ilia Mirkin <[email protected]> Acked-by: Rob Clark <[email protected]>
* Android: use symlinks for driver loadingRob Herring2017-06-291-0/+1
| | | | | | | | | Instead of having special driver loading logic for Android, create symlinks to gallium_dri.so so we can use the standard loading logic. Reviewed-by: Eric Anholt <[email protected]> Reviewed-by: Emil Velikov <[email protected]> Signed-off-by: Rob Herring <[email protected]>
* gallium: add PIPE_CAP_BINDLESS_TEXTURESamuel Pitoiset2017-06-141-0/+1
| | | | | | | | | Whether bindless texture operations are supported by the underlying driver. Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Marek Olšák <[email protected]> Reviewed-by: Nicolai Hähnle <[email protected]>
* util: Port nir_array functionality to u_dynarrayThomas Helland2017-06-071-3/+3
| | | | | Reviewed-by: Marek Olšák <[email protected]> Reviewed-by: Eric Engestrom <[email protected]>
* util/u_queue: add an option to set the minimum thread priorityMarek Olšák2017-06-071-1/+1
| | | | Reviewed-by: Nicolai Hähnle <[email protected]>
* freedreno/a5xx: set SP_BLEND_CONTROL properlyRob Clark2017-06-073-1/+4
| | | | Signed-off-by: Rob Clark <[email protected]>
* freedreno/a5xx: LRZ supportRob Clark2017-06-0714-14/+234
| | | | Signed-off-by: Rob Clark <[email protected]>
* freedreno: drop timestamp fieldRob Clark2017-06-072-3/+0
| | | | | | unused. Signed-off-by: Rob Clark <[email protected]>
* freedreno/a5xx: refactor out helper for LRZ flushRob Clark2017-06-073-11/+19
| | | | Signed-off-by: Rob Clark <[email protected]>
* freedreno: reshuffle FD_MESA_DEBUG bitmaskRob Clark2017-06-071-3/+3
| | | | Signed-off-by: Rob Clark <[email protected]>
* freedreno: update generated headersRob Clark2017-06-077-17/+31
| | | | Signed-off-by: Rob Clark <[email protected]>
* gallium: Add a cap to check if the driver supports ARB_post_depth_coverageLyude2017-06-021-0/+1
| | | | | Reviewed-by: Marek Olšák <[email protected]> Reviewed-by: Ilia Mirkin <[email protected]>
* freedreno/a5xx: drop WFIs in emit_marker5()Rob Clark2017-05-301-5/+0
| | | | | | | | | Results in always having at least one WFI between draws, which was slowing stk down by ~5% and ~10% in xonotic. (also drop bogus assert while we're at it.) Signed-off-by: Rob Clark <[email protected]>
* freedreno/a5xx: timestamp / time-elapsed queriesRob Clark2017-05-302-1/+97
| | | | Signed-off-by: Rob Clark <[email protected]>
* freedreno/a5xx: rename query result structRob Clark2017-05-301-23/+22
| | | | | | Going to want the same thing for timestamp queries. Signed-off-by: Rob Clark <[email protected]>
* freedreno: update generated headersRob Clark2017-05-306-18/+624
| | | | Signed-off-by: Rob Clark <[email protected]>
* freedreno: fix fence creation fail if no renderingRob Clark2017-05-281-13/+1
| | | | | | | | | Android tries to create a FENCE_FD fence without any rendering. And then falls over when that fails. So just always create an initial batch. Fixes: e4ad8695 ("freedreno: fix crash when flush() but no rendering") Signed-off-by: Rob Clark <[email protected]>
* freedreno/ir3: switch to NIR by defaultRob Clark2017-05-232-16/+2
| | | | | | | | | | | Now that we lower vars to regs, we no longer regress for anything that does complex dereferences. (With tgsi, derefers are already lowered before tgsi_to_nir, but not with glsl_to_nir.) In fact it actually fixes a few things to bypass tgsi. So make NIR the default (finally!) Signed-off-by: Rob Clark <[email protected]>
* freedreno/ir3: lower arrays to regsRob Clark2017-05-232-150/+185
| | | | | | | | | | | Instead of using load/store_var intrinsics, which can have complex derefs in the case of multi-dimensional arrays, lower these to regs and handle the direct/indirect loads in get_src() and stores in put_dst(). This should let us switch to using nir by default. Signed-off-by: Rob Clark <[email protected]>
* freedreno/ir3: add put_dst()Rob Clark2017-05-231-0/+24
| | | | Signed-off-by: Rob Clark <[email protected]>
* freedreno/ir3: code-motionRob Clark2017-05-231-55/+55
| | | | Signed-off-by: Rob Clark <[email protected]>
* freedreno/ir3: fix cmdline compilerRob Clark2017-05-231-2/+0
| | | | | | | | standalone_compiler_cleanup() frees the glsl types, among other things, so it needs to come after nir->ir3. But since we exit after dumping the disassembly, it is easier to just not call it at all. Signed-off-by: Rob Clark <[email protected]>
* freedreno/ir3: add missing nir_opt_copy_prop_vars() passRob Clark2017-05-231-0/+1
| | | | Signed-off-by: Rob Clark <[email protected]>
* freedreno/ir3: need different compiler options for a5xxRob Clark2017-05-234-5/+28
| | | | | | vertex_id_zero_based differs.. Signed-off-by: Rob Clark <[email protected]>
* freedreno/a5xx: remove copapasta from a4xxRob Clark2017-05-231-2/+1
| | | | | | | Won't ever hit this w/ a420 gpu, so this is dead code. Need to get astc working to know whether to rip this out entirely or not. Signed-off-by: Rob Clark <[email protected]>
* freedreno: only support SSBOs with nirRob Clark2017-05-231-0/+3
| | | | | | | tgsi_to_nir does not support them. Note that compute shaders already force nir. Signed-off-by: Rob Clark <[email protected]>
* freedreno/a5xx: add some missing texture formatsRob Clark2017-05-231-51/+51
| | | | Signed-off-by: Rob Clark <[email protected]>
* freedreno/a5xx: provoking vertexRob Clark2017-05-236-44/+40
| | | | Signed-off-by: Rob Clark <[email protected]>
* freedreno: update generated headersRob Clark2017-05-236-55/+64
| | | | Signed-off-by: Rob Clark <[email protected]>
* gallium: add PIPE_CAP_ALLOW_MAPPED_BUFFERS_DURING_EXECUTIONMarek Olšák2017-05-171-0/+1
| | | | | | for skipping mapped-buffer checking in every GL draw call Reviewed-by: Nicolai Hähnle <[email protected]>
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