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* util/u_queue: add an option to set the minimum thread priorityMarek Olšák2017-06-071-1/+1
| | | | Reviewed-by: Nicolai Hähnle <[email protected]>
* freedreno/a5xx: set SP_BLEND_CONTROL properlyRob Clark2017-06-073-1/+4
| | | | Signed-off-by: Rob Clark <[email protected]>
* freedreno/a5xx: LRZ supportRob Clark2017-06-0714-14/+234
| | | | Signed-off-by: Rob Clark <[email protected]>
* freedreno: drop timestamp fieldRob Clark2017-06-072-3/+0
| | | | | | unused. Signed-off-by: Rob Clark <[email protected]>
* freedreno/a5xx: refactor out helper for LRZ flushRob Clark2017-06-073-11/+19
| | | | Signed-off-by: Rob Clark <[email protected]>
* freedreno: reshuffle FD_MESA_DEBUG bitmaskRob Clark2017-06-071-3/+3
| | | | Signed-off-by: Rob Clark <[email protected]>
* freedreno: update generated headersRob Clark2017-06-077-17/+31
| | | | Signed-off-by: Rob Clark <[email protected]>
* gallium: Add a cap to check if the driver supports ARB_post_depth_coverageLyude2017-06-021-0/+1
| | | | | Reviewed-by: Marek Olšák <[email protected]> Reviewed-by: Ilia Mirkin <[email protected]>
* freedreno/a5xx: drop WFIs in emit_marker5()Rob Clark2017-05-301-5/+0
| | | | | | | | | Results in always having at least one WFI between draws, which was slowing stk down by ~5% and ~10% in xonotic. (also drop bogus assert while we're at it.) Signed-off-by: Rob Clark <[email protected]>
* freedreno/a5xx: timestamp / time-elapsed queriesRob Clark2017-05-302-1/+97
| | | | Signed-off-by: Rob Clark <[email protected]>
* freedreno/a5xx: rename query result structRob Clark2017-05-301-23/+22
| | | | | | Going to want the same thing for timestamp queries. Signed-off-by: Rob Clark <[email protected]>
* freedreno: update generated headersRob Clark2017-05-306-18/+624
| | | | Signed-off-by: Rob Clark <[email protected]>
* freedreno: fix fence creation fail if no renderingRob Clark2017-05-281-13/+1
| | | | | | | | | Android tries to create a FENCE_FD fence without any rendering. And then falls over when that fails. So just always create an initial batch. Fixes: e4ad8695 ("freedreno: fix crash when flush() but no rendering") Signed-off-by: Rob Clark <[email protected]>
* freedreno/ir3: switch to NIR by defaultRob Clark2017-05-232-16/+2
| | | | | | | | | | | Now that we lower vars to regs, we no longer regress for anything that does complex dereferences. (With tgsi, derefers are already lowered before tgsi_to_nir, but not with glsl_to_nir.) In fact it actually fixes a few things to bypass tgsi. So make NIR the default (finally!) Signed-off-by: Rob Clark <[email protected]>
* freedreno/ir3: lower arrays to regsRob Clark2017-05-232-150/+185
| | | | | | | | | | | Instead of using load/store_var intrinsics, which can have complex derefs in the case of multi-dimensional arrays, lower these to regs and handle the direct/indirect loads in get_src() and stores in put_dst(). This should let us switch to using nir by default. Signed-off-by: Rob Clark <[email protected]>
* freedreno/ir3: add put_dst()Rob Clark2017-05-231-0/+24
| | | | Signed-off-by: Rob Clark <[email protected]>
* freedreno/ir3: code-motionRob Clark2017-05-231-55/+55
| | | | Signed-off-by: Rob Clark <[email protected]>
* freedreno/ir3: fix cmdline compilerRob Clark2017-05-231-2/+0
| | | | | | | | standalone_compiler_cleanup() frees the glsl types, among other things, so it needs to come after nir->ir3. But since we exit after dumping the disassembly, it is easier to just not call it at all. Signed-off-by: Rob Clark <[email protected]>
* freedreno/ir3: add missing nir_opt_copy_prop_vars() passRob Clark2017-05-231-0/+1
| | | | Signed-off-by: Rob Clark <[email protected]>
* freedreno/ir3: need different compiler options for a5xxRob Clark2017-05-234-5/+28
| | | | | | vertex_id_zero_based differs.. Signed-off-by: Rob Clark <[email protected]>
* freedreno/a5xx: remove copapasta from a4xxRob Clark2017-05-231-2/+1
| | | | | | | Won't ever hit this w/ a420 gpu, so this is dead code. Need to get astc working to know whether to rip this out entirely or not. Signed-off-by: Rob Clark <[email protected]>
* freedreno: only support SSBOs with nirRob Clark2017-05-231-0/+3
| | | | | | | tgsi_to_nir does not support them. Note that compute shaders already force nir. Signed-off-by: Rob Clark <[email protected]>
* freedreno/a5xx: add some missing texture formatsRob Clark2017-05-231-51/+51
| | | | Signed-off-by: Rob Clark <[email protected]>
* freedreno/a5xx: provoking vertexRob Clark2017-05-236-44/+40
| | | | Signed-off-by: Rob Clark <[email protected]>
* freedreno: update generated headersRob Clark2017-05-236-55/+64
| | | | Signed-off-by: Rob Clark <[email protected]>
* gallium: add PIPE_CAP_ALLOW_MAPPED_BUFFERS_DURING_EXECUTIONMarek Olšák2017-05-171-0/+1
| | | | | | for skipping mapped-buffer checking in every GL draw call Reviewed-by: Nicolai Hähnle <[email protected]>
* freedreno/gmem: fix hw binning hangs with large render targetsRob Clark2017-05-163-3/+13
| | | | | | | | On all 3 gens, we have 4 bits for width and height in the VSC pipe config. And overflow results in setting width and/or height to zero which causes hangs. Signed-off-by: Rob Clark <[email protected]>
* freedreno/ir3: fix crash with atomicsRob Clark2017-05-161-2/+9
| | | | | | Atomics can have a result value. And sometimes it is even used. Signed-off-by: Rob Clark <[email protected]>
* freedreno/a5xx: remove unneeded assertRob Clark2017-05-161-3/+0
| | | | Signed-off-by: Rob Clark <[email protected]>
* freedreno/a5xx: fallback to slow-clear for z32Rob Clark2017-05-164-11/+36
| | | | | | | We probably *could* do this with blit path, but I think it would involve clobbering settings from batch->gmem (see emit_zs()). Signed-off-by: Rob Clark <[email protected]>
* Revert "freedreno: use bypass if only clears"Rob Clark2017-05-141-4/+1
| | | | | | | Causing issues with stk on a4xx.. still probably a good idea, but seems some debugging is needed first. This reverts commit 3ab072d3c8643c66d8e07e63df970b792728bac6.
* freedreno: fix crash when flush() but no renderingRob Clark2017-05-141-0/+6
| | | | | | | | | | If we haven't created a batch, just bail in pipe->flush(), since there is nothing to do. Fixes crash in warsow, which creates a whole bunch of contexts used for nothing but texture uploads. Signed-off-by: Rob Clark <[email protected]>
* freedreno: fix indexbuffer uploadRob Clark2017-05-146-15/+26
| | | | | | | | My fault for not having time to test Marek's patches while they were on list. Fixes: 330d0607 ("gallium: remove pipe_index_buffer and set_index_buffer") Signed-off-by: Rob Clark <[email protected]>
* freedreno/a5xx: hw binning supportRob Clark2017-05-139-51/+185
| | | | Signed-off-by: Rob Clark <[email protected]>
* freedreno: update generated headersRob Clark2017-05-136-29/+297
| | | | Signed-off-by: Rob Clark <[email protected]>
* freedreno: use bypass if only clearsRob Clark2017-05-131-1/+4
| | | | | | | Some things trigger batches that only contain a clear (like glmark2 startup). No point to use GMEM for this. Signed-off-by: Rob Clark <[email protected]>
* Android: push driver build details to driver makefilesRob Herring2017-05-111-0/+5
| | | | | | | | | | | | | src/gallium/targets/dri/Android.mk contains lots of conditional for individual drivers. Let's move these details into the individual driver makefiles. In the process, align the make driver conditionals with automake (i.e. HAVE_GALLIUM_*). Signed-off-by: Rob Herring <[email protected]> [Emil Velikov: add the radeon winsys for radeonsi] Signed-off-by: Emil Velikov <[email protected]>
* gallium: add PIPE_CAP_CAN_BIND_CONST_BUFFER_AS_VERTEXMarek Olšák2017-05-101-0/+1
| | | | | | | The next patch will use it. This is really for svga and GL2-level drivers. Tested-by: Edmondo Tommasina <[email protected]> Reviewed-by: Brian Paul <[email protected]>
* gallium: remove pipe_index_buffer and set_index_bufferMarek Olšák2017-05-1014-80/+55
| | | | | | | | | | | | | | pipe_draw_info::indexed is replaced with index_size. index_size == 0 means non-indexed. Instead of pipe_index_buffer::offset, pipe_draw_info::start is used. For indexed indirect draws, pipe_draw_info::start is added to the indirect start. This is the only case when "start" affects indirect draws. pipe_draw_info::index is a union. Use either index::resource or index::user depending on the value of pipe_draw_info::has_user_indices. v2: fixes for nine, svga
* gallium: decrease the size of pipe_vertex_buffer - 24 -> 16 bytesMarek Olšák2017-05-108-13/+13
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* nir: Embed the shader_info in the nir_shader againJason Ekstrand2017-05-092-3/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | Commit e1af20f18a86f52a9640faf2d4ff8a71b0a4fa9b changed the shader_info from being embedded into being just a pointer. The idea was that sharing the shader_info between NIR and GLSL would be easier if it were a pointer pointing to the same shader_info struct. This, however, has caused a few problems: 1) There are many things which generate NIR without GLSL. This means we have to support both NIR shaders which come from GLSL and ones that don't and need to have an info elsewhere. 2) The solution to (1) raises all sorts of ownership issues which have to be resolved with ralloc_parent checks. 3) Ever since 00620782c92100d77c660f9783504c6d80fa1d58, we've been using nir_gather_info to fill out the final shader_info. Thanks to cloning and the above ownership issues, the nir_shader::info may not point back to the gl_shader anymore and so we have to do a copy of the shader_info from NIR back to GLSL anyway. All of these issues go away if we just embed the shader_info in the nir_shader. There's a little downside of having to copy it back after calling nir_gather_info but, as explained above, we have to do that anyway. Acked-by: Timothy Arceri <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]>
* freedreno: fix clang error in fd_get_compute_paramRob Herring2017-05-091-1/+1
| | | | | | | | | | | | With commit 10c17f23b752 ("freedreno: core compute state support"), Android builds fail with the following error: external/mesa3d/src/gallium/drivers/freedreno/freedreno_screen.c:610:17: error: format string is not a string literal (potentially insecure) [-Werror,-Wformat-security] sprintf(ret, ir); ^~ Signed-off-by: Rob Herring <[email protected]> Signed-off-by: Rob Clark <[email protected]>
* freedreno/a3xx: fix hang w/ large render targets and small gmemRob Clark2017-05-063-0/+7
| | | | | | | | | Possibly other gen's have a similar limit. Fixes glmark2 -b shadow with larger resolutions on devices with small gmem (for example, fullscreen 1080p on 8x16/db410c). Cc: [email protected] Signed-off-by: Rob Clark <[email protected]>
* freedreno/ir3: add macro to declare variable length arraysRob Clark2017-05-061-18/+21
| | | | | | We have enough of these, that we should stop open coding this. Signed-off-by: Rob Clark <[email protected]>
* freedreno/a5xx: compute shader supportRob Clark2017-05-049-5/+264
| | | | Signed-off-by: Rob Clark <[email protected]>
* freedreno: core compute state supportRob Clark2017-05-047-6/+216
| | | | Signed-off-by: Rob Clark <[email protected]>
* freedreno/ir3: compute shader supportRob Clark2017-05-044-19/+154
| | | | Signed-off-by: Rob Clark <[email protected]>
* freedreno/a5xx: SSBO supportRob Clark2017-05-043-7/+114
| | | | | | | | | | To simplify things for now, since all the gfx shader stages share a single SSBO state block, only advertise SSBO support for fragment shader (and compute when we have that). We could possibly use a fixed- partitioning of the SSBO index space to support SSBOs on other stages without having to resort to shader variants. Signed-off-by: Rob Clark <[email protected]>
* freedreno/ir3: SSBO/atomic supportRob Clark2017-05-046-13/+309
| | | | | | | | TODO cwabbott pointed out a write-after-read hazzard, which effects both this and arrays. A write needs to depend on *all* reads since the last write, not just the last read. Signed-off-by: Rob Clark <[email protected]>
* freedreno: core SSBO supportRob Clark2017-05-045-0/+73
| | | | | | The generation-independent support for binding shader buffer objects. Signed-off-by: Rob Clark <[email protected]>
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