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* freedreno: update generated headersRob Clark2014-09-124-4/+6
| | | | Signed-off-by: Rob Clark <[email protected]>
* freedreno/a3xx: handle rendering to layer != 0Rob Clark2014-09-121-2/+12
| | | | Signed-off-by: Rob Clark <[email protected]>
* gallium: add a texture target to sampler view and a CAP to use itIlia Mirkin2014-09-121-0/+1
| | | | | | | | | | This allows a sampler view to have a different texture target than the underlying resource. This will be used to implement the type casting between 2d arrays and cube maps as specified in ARB_texture_view. Signed-off-by: Ilia Mirkin <[email protected]> Reviewed-by: Roland Scheidegger <[email protected]> Reviewed-by: Marek Olšák <[email protected]>
* freedreno/a3xx: enable hw primitive-restartRob Clark2014-09-094-9/+20
| | | | | | | | | | Since software primitive-restart emulation is going to be removed (and anyways, mostly seemed to be crash prone in combination with u_primconvert and oddball scenarios (like PIPE_PRIM_POLYGON with only a single vertex), might as well do it in hardware (which fortunately didn't turn out to be too hard to figure out). Signed-off-by: Rob Clark <[email protected]>
* freedreno: update generated headersRob Clark2014-09-094-13/+18
| | | | Signed-off-by: Rob Clark <[email protected]>
* freedreno/ir3: fix potential segfault in RARob Clark2014-09-091-2/+6
| | | | | | | | | | | | | | | | | | | | | | Triggered by shaders like: FRAG PROPERTY FS_COLOR0_WRITES_ALL_CBUFS 1 DCL OUT[0], COLOR DCL CONST[0] DCL TEMP[0..2], LOCAL 0: IF CONST[0].xxxx :0 1: MOV TEMP[0], TEMP[1] 2: ELSE :0 3: MOV TEMP[0], TEMP[2] 4: ENDIF 5: MOV OUT[0], TEMP[0] 6: END not really a sane shader, although driver segfaulting is probably not the appropriate response. Signed-off-by: Rob Clark <[email protected]>
* freedreno: don't overflow cmdstream buffer so muchRob Clark2014-09-091-0/+15
| | | | | | | | | | | | | | We currently aren't too clever about dealing with running out of cmdstream buffer space. Since we use a single buffer for both drawing and tiling commands, we need to ensure there is enough space at the tail of the cmdstream buffer to fit the tiling commands. Until we get more clever, the easy solution is a threshold to trigger flushing rendering even if the application does not trigger flush (swap, changing render target, etc). This way we at least don't crash for apps that do several thousand draw calls (like some piglit tests do). Signed-off-by: Rob Clark <[email protected]>
* freedreno/ir3: add no-copy-propagate fallback stepRob Clark2014-09-093-11/+21
| | | | | | | | | | | Most of the things the new compiler still has trouble with basically amount to cp stage removing too many copies. But without the cp stage, the shaders the new compiler produces are still better (perf and correctness) than the old compiler. So a simple thing to do until I have more time to work on it is first trying falling back to new compiler without cp, before finally falling back to old compiler. Signed-off-by: Rob Clark <[email protected]>
* gallium/freedreno: ship all files in the tarballEmil Velikov2014-09-052-12/+65
| | | | | | | | | | | - include all headers in Makefile.sources - sort the list(s) - bundle the android build Cc: [email protected] Cc: Rob Clark <[email protected]> Signed-off-by: Emil Velikov <[email protected]> Acked-by: Matt Turner <[email protected]>
* freedreno/ir3: fix constlen with relative addressingRob Clark2014-09-043-3/+15
| | | | | | | | We can't rely on the value from the assembler if relative addressing is used. So instead use the max of declared-consts (which does not include compiler immediates) and what we get from the assembler (which does). Signed-off-by: Rob Clark <[email protected]>
* freedreno/ir3: fix error in bail logicRob Clark2014-09-041-2/+4
| | | | | | | | | | | all_delayed will also be true if we didn't attempt to schedule anything due to no more instructions using current addr/pred. We rely on coming in to block_sched_undelayed() to detect and clean up when there are no more uses of the current addr/pred, which isn't necessarily an error. This fixes a regression introduced in b823abed. Signed-off-by: Rob Clark <[email protected]>
* freedreno/ir3: bit of debugRob Clark2014-09-041-4/+16
| | | | | | Make it easier to figure out which compiler stage failed. Signed-off-by: Rob Clark <[email protected]>
* Eliminate several cases of multiplication in arguments to callocCarl Worth2014-09-032-2/+2
| | | | | | | | | | | | | | | | | | | | | | In commit 32f2fd1c5d6088692551c80352b7d6fa35b0cd09, several calls to _mesa_calloc(x) were replaced with calls to calloc(1, x). This is strictly equivalent to what the code was doing previously. But for cases where "x" involves multiplication, now that we are explicitly using the two-argument calloc, we can do one step better and replace: calloc(1, A * B); with: calloc(A, B); The advantage of the latter is that calloc will detect any overflow that would have resulted from the multiplication and will fail the allocation, (whereas the former would return a small allocation). So this fix can change potentially exploitable buffer overruns into segmentation faults. Reviewed-by: Matt Turner <[email protected]>
* freedreno/ir3: add DDX/DDYRob Clark2014-09-011-4/+53
| | | | Signed-off-by: Rob Clark <[email protected]>
* freedreno/ir3: don't keep IR aroundRob Clark2014-09-011-1/+6
| | | | | | | Once we've assembled the shader, no need to keep the intermediate around. Signed-off-by: Rob Clark <[email protected]>
* freedreno/ir3: fix potential null ptr derefRob Clark2014-08-301-1/+2
| | | | | | Fix potential segfault in debug code. Signed-off-by: Rob Clark <[email protected]>
* freedreno/ir3: add TXBRob Clark2014-08-301-0/+5
| | | | Signed-off-by: Rob Clark <[email protected]>
* freedreno/ir3: detect scheduler failRob Clark2014-08-303-4/+21
| | | | | | | | | | | | | | | | | | | | There are some cases where the scheduler can get itself into impossible situations, by scheduling the wrong write to pred or addr register first. (Ie. it could end up being unable to schedule any instruction if some instruction which depends on the current addr/reg value also depends on another addr/reg value.) To solve this we'd need to be able to insert extra mov instructions (which would also help when register assignment gets into impossible situations). To do that, we'd need to move the nop padding from sched into legalize. But to start with, just detect when we get into an impossible situation and bail, rather than sitting forever in an infinite loop. This way it will at least fall back to the old compiler, which might even work if you are lucky. Signed-off-by: Rob Clark <[email protected]>
* gallium: add cap for MAX_VERTEX_ATTRIB_STRIDETimothy Arceri2014-08-271-0/+3
| | | | | Signed-off-by: Timothy Arceri <[email protected]> Reviewed-by: Roland Scheidegger <[email protected]>
* freedreno/a2xx: fix segfaultRob Clark2014-08-241-0/+1
| | | | Signed-off-by: Rob Clark <[email protected]>
* freedreno/a3xx: handle first/last level properlyRob Clark2014-08-243-9/+13
| | | | | | Fixes some assumptions about first_level being zero. Signed-off-by: Rob Clark <[email protected]>
* freedreno: implement pipe_flush_resource()Rob Clark2014-08-241-1/+5
| | | | Signed-off-by: Rob Clark <[email protected]>
* freedreno: don't ignore src/dst levelRob Clark2014-08-241-39/+63
| | | | | | Don't ignore src/dst_level in pipe_copy_region. Signed-off-by: Rob Clark <[email protected]>
* gallium: Add and handle PIPE_CAP_CONDITIONAL_RENDER_INVERTEDTobias Klausmann2014-08-191-0/+1
| | | | | | Reviewed-by: Ilia Mirkin <[email protected]> Reviewed-by: Roland Scheidegger <[email protected]> Signed-off-by: Tobias Klausmann <[email protected]>
* gallium/freedreno: handle query_renderer capsEmil Velikov2014-08-151-0/+12
| | | | | | | | | | Provide the real vendor and and hardcode the device id as 0xffffffff as the devices currently using freedreno are non-pci. The device features UMA. Cc: Rob Clark <[email protected]> Signed-off-by: Emil Velikov <[email protected]> Reviewed-by: Rob Clark <[email protected]>
* gallium: add opcodes/cap for fine derivative supportIlia Mirkin2014-08-141-0/+1
| | | | | | | Signed-off-by: Ilia Mirkin <[email protected]> Reviewed-by: Marek Olšák <[email protected]> (v1) Reviewed-by: Roland Scheidegger <[email protected]> (v1) v2: Reuse opcode gaps as suggested by Marek
* android: gallium/freedreno: add preliminary buildEmil Velikov2014-08-131-0/+44
| | | | | | | | | | | | | | | | | | For all the people interested in testing the freedreno driver on their Android devices. The next commit will hook these up within the libEGL driver (via the gallium-egl backend). There may be some rough edges but those can be sorted when a willing builder/tester comes along. v2: - s/freefreno/freedreno/. Spotted by Matt Turner. - Use the installed libdrm headers. Cc: "10.1 10.2" <[email protected]> Cc: Rob Clark <[email protected]> Cc: [email protected] Signed-off-by: Emil Velikov <[email protected]>
* automake: gallium/freedreno: drop spurious include dirsEmil Velikov2014-08-132-4/+2
| | | | | | | | | | | Rather than including two extra folders only for two headers, just prefix the headers and be done with it. Cc: "10.1 10.2" <[email protected]> Cc: Rob Clark <[email protected]> Cc: [email protected] Signed-off-by: Emil Velikov <[email protected]> Reviewed-by: Rob Clark <[email protected]>
* gallium: remove PIPE_SHADER_CAP_MAX_ADDRSMarek Olšák2014-08-111-2/+0
| | | | | | | | | | | | | | | This limit is fixed in Mesa core and cannot be changed. It only affects ARB_vertex_program and ARB_fragment_program. The minimum value for ARB_vertex_program is 1 according to the spec. The maximum value for ARB_vertex_program is limited to 1 by Mesa core. The value should be zero for ARB_fragment_program, because it doesn't support ARL. Finally, drivers shouldn't mess with these values arbitrarily. Reviewed-by: Ilia Mirkin <[email protected]>
* gallium: rename shader cap MAX_CONSTS to MAX_CONST_BUFFER_SIZEMarek Olšák2014-07-281-2/+2
| | | | | | | | | | This new name isn't so confusing. I also changed the gallivm limit, because it looked wrong. Reviewed-by: Brian Paul <[email protected]> v2: use sizeof(float[4])
* freedreno: fix typo in gpu version checkRob Clark2014-07-251-1/+1
| | | | | | | Opps, I should use larger fonts, I guess. Reported-by: Ilia Mirkin <[email protected]> Signed-off-by: Rob Clark <[email protected]>
* freedreno/ir3: split out shader compiler from a3xxRob Clark2014-07-2525-477/+580
| | | | | | | | | | | | | | | | | | | | | | Move the bits we want to share between generations from fd3_program to ir3_shader. So overall structure is: fdN_shader_stateobj -> ir3_shader -> ir3_shader_variant -> ir3 |- ... \- ir3_shader_variant -> ir3 So the ir3_shader becomes the topmost generation neutral object, which manages the set of variants each of which generates, compiles, and assembles it's own ir. There is a bit of additional renaming to s/fd3_compiler/ir3_compiler/, etc. Keep the split between the gallium level stateobj and the shader helper object because it might be a good idea to pre-compute some generation specific register values (ie. anything that is independent of linking). Signed-off-by: Rob Clark <[email protected]>
* freedreno/a3xx/compiler: rename ir3_shader to ir3Rob Clark2014-07-2512-55/+55
| | | | | | | | First step of reoganization split out compiler (so it can be shared between a3xx and a4xx). Rename ir3_shader -> ir3 (since we'll want the name ir3_shader for a higher level object). Signed-off-by: Rob Clark <[email protected]>
* freedreno/a3xx/compiler: scheduler vs pred regRob Clark2014-07-252-3/+51
| | | | | | | The scheduler also needs to be aware of predicate register (p0) in addition to address register (a0). Signed-off-by: Rob Clark <[email protected]>
* freedreno/a3xx/compiler: little cleanupsRob Clark2014-07-254-39/+19
| | | | | | Remove some obsolete comments, rename deref->addr. Signed-off-by: Rob Clark <[email protected]>
* freedreno/a3xx: enable/disable wa's based on patch-levelRob Clark2014-07-254-8/+34
| | | | | | | | It seems like for the most part, different behaviors, workarounds, etc, should be conditional on GPU patch revision (ie. a320.0 vs a320.2) rather than GPU id (a320 vs a330). Signed-off-by: Rob Clark <[email protected]>
* freedreno/a3xx/compiler: make IR heap dyanmicRob Clark2014-07-252-8/+43
| | | | | | | | | | | | The fixed size heap is a remnant of the fdre-a3xx assembler. Yet it is convenient for being able to free the entire data structure in one shot without worrying about leaking nodes. Change it to dynamically grow the heap size (adding chunks) as needed so we don't have an artificial upper limit on shader size (other than hw limits) and don't always have to allocate worst-case size. Signed-off-by: Rob Clark <[email protected]>
* freedreno/a3xx/compiler: fix p0 (kill, etc)Rob Clark2014-07-231-1/+2
| | | | | | | Don't assert (debug builds) or assign random uninitialized value for predicate register (p0).. that screws up kill, etc. Signed-off-by: Rob Clark <[email protected]>
* freedreno/a3xx: more vtx formatsRob Clark2014-07-231-0/+17
| | | | | | | | Actually what we currently handle is just the SCALED versions, and not the int versions. The difference probably matters more when we actually support integer in the compiler. Signed-off-by: Rob Clark <[email protected]>
* freedreno/a3xx/compiler: const file relative addressingRob Clark2014-07-238-68/+203
| | | | | | | | | | | | | | | | | | Teach new compiler scheduling and register assignment how to deal with relative addressing. This gets us what we need to avoid falling back to old compiler for CONST[ADDR[0].x+n]. It is also a prerequisite for temp file relative addressing, although that is going to also need some cleverness in register assignment to keep arrays grouped together. NOTE: doing address calculation in full precision and then narrowing to s16 in the mov to addr reg seems to sometimes cause lockups (and sometimes work?!). It seems more reliable to do the address calculation in s16, like the blob does. Which means teaching RA how to deal with mixed half and full precision allocation. Fortunately that didn't turn out to be too hard, so that is a nice bonus which we could probably take better advantage of elsewhere. Signed-off-by: Rob Clark <[email protected]>
* freedreno/a3xx/compiler: move functionRob Clark2014-07-231-35/+35
| | | | Signed-off-by: Rob Clark <[email protected]>
* freedreno/a3xx: add back a few stallsRob Clark2014-07-231-0/+8
| | | | | | | | | | | Technically we should not need these. CP_LOAD_STATE can be pipelined. But removing them broke a few piglit tests, like fbo-depth- GL_DEPTH_COMPONENT24-readpixels. I expect these are just masking a problem elsewhere, or perhaps they are only needed under some more specific circumstances. But until that is understood properly, give back a bit of the perf boost we got from c63450e8. Signed-off-by: Rob Clark <[email protected]>
* freedreno: update generated headersRob Clark2014-07-234-14/+14
| | | | Signed-off-by: Rob Clark <[email protected]>
* gallium: rename PIPE_CAP_TGSI_VS_LAYER to also have _VIEWPORTIlia Mirkin2014-07-031-1/+1
| | | | | | | | | Now that this cap is used to determine the availability of both, adjust its name to reflect the new reality. Signed-off-by: Ilia Mirkin <[email protected]> Reviewed-by: Roland Scheidegger <[email protected]> Reviewed-by: Marek Olšák <[email protected]>
* gallium: add facilities for indirect drawingChristoph Bumiller2014-07-021-0/+1
| | | | | | v2: Added comments to util_draw_indirect, clarified and fixed map size. Removed unlikely().
* gallium: add a cap for max vertex streamsIlia Mirkin2014-07-011-0/+1
| | | | | | | Signed-off-by: Ilia Mirkin <[email protected]> Reviewed-by: Marek Olšák <[email protected]> Reviewed-by: Brian Paul <[email protected]> Reviewed-by: Roland Scheidegger <[email protected]>
* gallium: add an index argument to create_queryIlia Mirkin2014-07-011-1/+1
| | | | | | Signed-off-by: Ilia Mirkin <[email protected]> Reviewed-by: Marek Olšák <[email protected]> Reviewed-by: Roland Scheidegger <[email protected]>
* freedreno: use util_copy_framebuffer_state()Rob Clark2014-06-221-12/+1
| | | | Signed-off-by: Rob Clark <[email protected]>
* freedreno/a3xx: WFI fixes/cleanupRob Clark2014-06-225-48/+41
| | | | | | | | | | | | | | | Blob driver seems to need WFI in some cases after CP_EVENT_WRITE, implying that this is asynchronous and should reset needs_wfi. Also, CP_INVALIDATE_STATE seems to need WFI. But CP_LOAD_STATE does not. The blob driver also puts WFIs before writing GRAS_CL_VPORT registers. The latter may be a work-around, as these registers should be banked/ context registers. I haven't yet found a lockup that this averts, but I expect viewport to change infrequently so out of paranoia I will keep these for now. Signed-off-by: Rob Clark <[email protected]>
* freedreno/a3xx: vtx formatsRob Clark2014-06-132-63/+79
| | | | | | Add support for more vertex buffer formats. Signed-off-by: Rob Clark <[email protected]>
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