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* freedreno: cleanup some cruft left over from fdreRob Clark2013-04-202-133/+1
| | | | | | | | The standalone shader assembler needed some meta-data to know about attributes/varyings/etc, to do the shader linkage. We don't need these parts with gallium/tgsi, so just get rid of it. Signed-off-by: Rob Clark <Rob Clark [email protected]>
* st/mesa: optionally apply texture swizzle to border color v2Christoph Bumiller2013-04-181-0/+1
| | | | | | | | | | | | This is the only sane solution for nv50 and nvc0 (really, trust me), but since on other hardware the border colour is tightly coupled with texture state they'd have to undo the swizzle, so I've added a cap. The dependency of update_sampler on the texture updates was introduced to avoid doing the apply_depthmode to the swizzle twice. v2: Moved swizzling helper to u_format.c, extended the CAP to provide more accurate information.
* freedreno: use autogenerated register defsRob Clark2013-04-0523-1617/+2116
| | | | | | | | | | | | | Switch to use the envytools generated headers for register/bitfield definitions. This is the first step in preparing to add a3xx support, since it avoids having conflicting names for a3xx and a2xx registers. And since I'm using envytools for a3xx it is simpler to just use it for everything. This shouldn't cause any functional change, it is really just a lot of renaming. Signed-off-by: Rob Clark <[email protected]>
* gallium: add PIPE_CAP_QUERY_PIPELINE_STATISTICSChristoph Bumiller2013-04-031-0/+1
| | | | Reviewed-by: Marek Olšák <[email protected]>
* freedreno: use u_debug for debug env varsRob Clark2013-03-251-3/+10
| | | | Signed-off-by: Rob Clark <[email protected]>
* freedreno: prefer sw upload for texturesRob Clark2013-03-251-0/+2
| | | | | | | Since we are UMA, in most cases the GPU blit doesn't make much sense for texture upload. Signed-off-by: Rob Clark <[email protected]>
* freedreno: track maximal scissor boundsRob Clark2013-03-259-136/+162
| | | | | | | | | | Optimize out parts of the render target that are scissored out by taking into account maximal scissor bounds in fd_gmem_render_tiles(). This is a big win on things like gnome-shell which frequently do partial screen updates. Signed-off-by: Rob Clark <[email protected]>
* freedreno: add pipe->blitRob Clark2013-03-211-3/+48
| | | | Signed-off-by: Rob Clark <[email protected]>
* gallium: add TGSI_SEMANTIC_TEXCOORD,PCOORD v3Christoph Bumiller2013-03-201-0/+2
| | | | | | | | | | | | | | | This makes it possible to identify gl_TexCoord and gl_PointCoord for drivers where sprite coordinate replacement is restricted. The new PIPE_CAP_TGSI_TEXCOORD decides whether these varyings should be hidden behind the GENERIC semantic or not. With this patch only nvc0 and nv30 will request that they be used. v2: introduce a CAP so other drivers don't have to bother with the new semantic v3: adapt to introduction gl_varying_slot enum
* freedreno: clear fixesRob Clark2013-03-192-5/+16
| | | | | | Some fixes for clearing only depth or only stencil. Signed-off-by: Rob Clark <[email protected]>
* freedreno: gallium driver for adrenoRob Clark2013-03-1140-0/+9778
Currently works on a220. Others in the a2xx family look pretty similar and should be pretty straightforward to support with the same driver. The a3xx has a new shader ISA, and while many registers appear similar, the register addresses have been completely shuffled around. I am not sure yet whether it is best to support with the same driver, but different compiler, or whether it should be split into a different driver. v1: original v2: build file updates from review comments, and remove GPL licensed header files from msm kernel v3: smarter temp/pred register assignment, fix clear and depth/stencil format issues, resource_transfer fixes, scissor fixes Signed-off-by: Rob Clark <[email protected]>