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* gallium: Add support for multiple viewportsZack Rusin2013-05-251-4/+8
| | | | | | | | | | | | Gallium supported only a single viewport/scissor combination. This commit changes the interface to allow us to add support for multiple viewports/scissors. Signed-off-by: Zack Rusin <[email protected]> Reviewed-by: Marek Olšák <[email protected]> Reviewed-by: José Fonseca<[email protected]> Reviewed-by: Brian Paul <[email protected]> Reviewed-by: Roland Scheidegger <[email protected]>
* freedreno: scissor fixRob Clark2013-05-231-0/+11
| | | | | | | Don't assume the state-tracker will set the scissor after the framebuffer state is changed. Signed-off-by: Rob Clark <[email protected]>
* freedreno: implement pipe->resource_copy_region()Rob Clark2013-05-231-8/+43
| | | | Signed-off-by: Rob Clark <[email protected]>
* gallium: fix type of flags in pipe_context::flush()Chia-I Wu2013-05-041-1/+1
| | | | | | | | | | | | | | | | It should be unsigned, not enum pipe_flush_flags. Fixed a build error: src/gallium/state_trackers/egl/android/native_android.cpp:426:29: error: invalid conversion from 'int' to 'pipe_flush_flags' [-fpermissive] v2: replace all occurrences of enum pipe_flush_flags by unsigned Signed-off-by: Chia-I Wu <[email protected]> Reviewed-by: Marek Olšák <[email protected]> [olv: document the parameter now that the type is unsigned]
* freedreno: fix rebase screw-upRob Clark2013-04-291-1/+1
| | | | | | Add back 2nd arg to emit_vertexbufs() which got lost in rebase. Signed-off-by: Rob Clark <[email protected]>
* freedreno: use writecombine buffersRob Clark2013-04-251-1/+2
| | | | | | | Better than uncached for writes, which are common for vertex buffer upload, etc. Signed-off-by: Rob Clark <[email protected]>
* freedreno: don't patch and re-emit same shader as muchRob Clark2013-04-255-64/+65
| | | | | | | | New textures or vertex buffers don't always require patching and re-emitting the shaders. So do a better job of figuring out when we actually have to patch the shader. Signed-off-by: Rob Clark <[email protected]>
* freedreno: fix bogus IMM const reg indexRob Clark2013-04-242-3/+3
| | | | | | | | We were assigning incorrect const register for immediates, and potentially writing immediate const to the wrong location. This fixes an incorrect-rendering bug with xonotic. Signed-off-by: Rob Clark <[email protected]>
* freedreno: clear fixes and debuggingRob Clark2013-04-244-1/+29
| | | | | | | | Set a few extra registers to make sure we are in proper state for clearing. And also add some debug options to mark all state dirty in clear and gmem operations to aid in debugging. Signed-off-by: Rob Clark <[email protected]>
* freedreno: fix texture fetch typeRob Clark2013-04-244-2/+10
| | | | | | | There is a bit we need to set for 2D vs 3D fetch, to tell the hw whether there are two or there valid input components. Signed-off-by: Rob Clark <[email protected]>
* freedreno: fix temp register usageRob Clark2013-04-241-48/+52
| | | | | | | | | | | | | | | The previous approach of using the dst register as an intermediate temporary doesn't work in a lot of cases. For example, if the dst register is the same as one of the src registers. For now, just simplify it and always allocate a new register to use as an intermediate. In some cases this will result in more registers used than required. I think the best solution would be to implement an optimization pass to reduce the number of registers used, which would also solve the problem we have now of not being able to use GPRs that are assigned for TGSI_FILE_INPUT. Signed-off-by: Rob Clark <[email protected]>
* freedreno: use u_math macros/helpers moreRob Clark2013-04-246-25/+20
| | | | | | | | | Get rid of a few self-defined macros: ALIGN() -> align() min() -> MIN2() max() -> MAX2() Signed-off-by: Rob Clark <[email protected]>
* freedreno: implement fd_screen_destroy()Rob Clark2013-04-241-6/+26
| | | | | | | | Opps, didn't notice that I had left it stubbed out. Also, make things fail a bit more gracefully when things go wrong. Signed-off-by: Rob Clark <[email protected]>
* freedreno: set SWAP bit based on formatRob Clark2013-04-241-7/+19
| | | | | | | | Really this should be set based on buffer format, not on color vs depth/stencil. Probably there should be more formats that set the bit as we add support for more render target formats. Signed-off-by: Rob Clark <[email protected]>
* gallium: Replace gl_rasterization_rules with lower_left_origin and ↵José Fonseca2013-04-231-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | half_pixel_center. Squashed commit of the following: commit 04c5fa2cbb8e89d6f2fa5a75af1cca03b1f6b852 Author: José Fonseca <[email protected]> Date: Tue Apr 23 17:37:18 2013 +0100 gallium: s/lower_left_origin/bottom_edge_rule/ commit 4dff4f64fa83b9737def136fffd161d55e4f1722 Author: José Fonseca <[email protected]> Date: Tue Apr 23 17:35:04 2013 +0100 gallium: Move diagram to docs. commit 442a63012c8c3c3797f45e03f2ca20ad5f399832 Author: James Benton <[email protected]> Date: Fri May 11 17:50:55 2012 +0100 gallium: Replace gl_rasterization_rules with lower_left_origin and half_pixel_center. This change is necessary to achieve correct results when using OpenGL FBOs. Reviewed-by: Marek Olšák <[email protected]>
* freedreno: move ir -> ir2Rob Clark2013-04-206-283/+283
| | | | | | | | There will be a new IR for a3xx, which has a very different shader ISA (more scalar oriented). So rename to avoid conflicts later when I start adding a3xx support to the gallium driver. Signed-off-by: Rob Clark <Rob Clark [email protected]>
* freedreno: cleanup some cruft left over from fdreRob Clark2013-04-202-133/+1
| | | | | | | | The standalone shader assembler needed some meta-data to know about attributes/varyings/etc, to do the shader linkage. We don't need these parts with gallium/tgsi, so just get rid of it. Signed-off-by: Rob Clark <Rob Clark [email protected]>
* st/mesa: optionally apply texture swizzle to border color v2Christoph Bumiller2013-04-181-0/+1
| | | | | | | | | | | | This is the only sane solution for nv50 and nvc0 (really, trust me), but since on other hardware the border colour is tightly coupled with texture state they'd have to undo the swizzle, so I've added a cap. The dependency of update_sampler on the texture updates was introduced to avoid doing the apply_depthmode to the swizzle twice. v2: Moved swizzling helper to u_format.c, extended the CAP to provide more accurate information.
* freedreno: use autogenerated register defsRob Clark2013-04-0523-1617/+2116
| | | | | | | | | | | | | Switch to use the envytools generated headers for register/bitfield definitions. This is the first step in preparing to add a3xx support, since it avoids having conflicting names for a3xx and a2xx registers. And since I'm using envytools for a3xx it is simpler to just use it for everything. This shouldn't cause any functional change, it is really just a lot of renaming. Signed-off-by: Rob Clark <[email protected]>
* gallium: add PIPE_CAP_QUERY_PIPELINE_STATISTICSChristoph Bumiller2013-04-031-0/+1
| | | | Reviewed-by: Marek Olšák <[email protected]>
* freedreno: use u_debug for debug env varsRob Clark2013-03-251-3/+10
| | | | Signed-off-by: Rob Clark <[email protected]>
* freedreno: prefer sw upload for texturesRob Clark2013-03-251-0/+2
| | | | | | | Since we are UMA, in most cases the GPU blit doesn't make much sense for texture upload. Signed-off-by: Rob Clark <[email protected]>
* freedreno: track maximal scissor boundsRob Clark2013-03-259-136/+162
| | | | | | | | | | Optimize out parts of the render target that are scissored out by taking into account maximal scissor bounds in fd_gmem_render_tiles(). This is a big win on things like gnome-shell which frequently do partial screen updates. Signed-off-by: Rob Clark <[email protected]>
* freedreno: add pipe->blitRob Clark2013-03-211-3/+48
| | | | Signed-off-by: Rob Clark <[email protected]>
* gallium: add TGSI_SEMANTIC_TEXCOORD,PCOORD v3Christoph Bumiller2013-03-201-0/+2
| | | | | | | | | | | | | | | This makes it possible to identify gl_TexCoord and gl_PointCoord for drivers where sprite coordinate replacement is restricted. The new PIPE_CAP_TGSI_TEXCOORD decides whether these varyings should be hidden behind the GENERIC semantic or not. With this patch only nvc0 and nv30 will request that they be used. v2: introduce a CAP so other drivers don't have to bother with the new semantic v3: adapt to introduction gl_varying_slot enum
* freedreno: clear fixesRob Clark2013-03-192-5/+16
| | | | | | Some fixes for clearing only depth or only stencil. Signed-off-by: Rob Clark <[email protected]>
* freedreno: gallium driver for adrenoRob Clark2013-03-1140-0/+9778
Currently works on a220. Others in the a2xx family look pretty similar and should be pretty straightforward to support with the same driver. The a3xx has a new shader ISA, and while many registers appear similar, the register addresses have been completely shuffled around. I am not sure yet whether it is best to support with the same driver, but different compiler, or whether it should be split into a different driver. v1: original v2: build file updates from review comments, and remove GPL licensed header files from msm kernel v3: smarter temp/pred register assignment, fix clear and depth/stencil format issues, resource_transfer fixes, scissor fixes Signed-off-by: Rob Clark <[email protected]>
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