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path: root/src/gallium/drivers/freedreno/ir3
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* nir: Rename image intrinsics to image_varJason Ekstrand2018-03-232-20/+20
* freedreno/ir3: start dealing with half-precisionRob Clark2018-03-053-30/+81
* freedreno/ir3: fix fixing-up register footprintRob Clark2018-03-052-18/+27
* freedreno/ir3: ignore return jumpRob Clark2018-03-051-0/+1
* freedreno/ir3: small cleanupRob Clark2018-03-051-3/+3
* freedreno/ir3: cmdline compiler updates for spv shadersRob Clark2018-03-051-0/+7
* nir: add lower_ldexp to nir compiler optionsTimothy Arceri2018-02-281-0/+1
* freedreno/ir3: fix use_count refcnt'ing issueRob Clark2018-02-201-0/+1
* freedreno/ir3: intra-block schedulingRob Clark2018-02-101-22/+104
* freedreno/ir3: "boost" the depth of if/else conditionRob Clark2018-02-101-5/+6
* freedreno/ir3: account for arrays in delayslot calcRob Clark2018-02-101-2/+30
* freedreno/ir3: more clever legalize algorithmRob Clark2018-02-101-42/+96
* freedreno/ir3: track block predecessorsRob Clark2018-02-102-7/+25
* freedreno/ir3: clean up dangling false-dep'sRob Clark2018-02-102-0/+46
* freedreno/ir3: handle IMMED for mad 2nd src special caseRob Clark2018-02-101-2/+4
* freedreno/ir3: remove ir3 phi instructionRob Clark2018-02-108-205/+16
* freedreno/ir3: remove lower_if_else passRob Clark2018-02-102-326/+0
* freedreno/ir3: add experimental GCM passRob Clark2018-02-101-0/+7
* freedreno/ir3: change opt passesRob Clark2018-02-101-0/+14
* freedreno/ir3: use peephole select passRob Clark2018-02-101-1/+1
* freedreno/ir3: lower phi webs to regsRob Clark2018-02-101-2/+1
* freedreno/ir3: separate arrays from groupsRob Clark2018-02-101-0/+8
* freedreno/ir3: make block/instruction serialno per-shaderRob Clark2018-02-102-4/+6
* freedreno/ir3: add spirv support to cmdline compilerRob Clark2018-02-101-3/+60
* freedreno/ir3: don't lower fsatRob Clark2018-02-103-1/+23
* freedreno/ir3: add encoding/decoding for (sat) bitRob Clark2018-02-104-12/+42
* freedreno/ir3: extend liverange of arraysRob Clark2018-02-101-0/+11
* freedreno/ir3: avoid extra mov's for "arrays"Rob Clark2018-02-101-3/+23
* freedreno/ir3: a couple more array fixesRob Clark2018-02-101-2/+15
* freedreno/ir3: keep array storesRob Clark2018-02-101-0/+6
* freedreno/ir3: propagate barrier informationRob Clark2018-02-101-0/+5
* freedreno/ir3: remove pointless statementRob Clark2018-02-101-3/+0
* freedreno/ir3: some more debug printsRob Clark2018-02-102-0/+36
* freedreno/ir3: fix printing of relative branch offsetsRob Clark2018-02-102-3/+3
* freedreno/ir3: be more clever with if/else jumpsRob Clark2018-02-101-1/+16
* freedreno/ir3: avoid some spurious sync bitsRob Clark2018-02-101-1/+3
* freedreno/ir3: print # of sync bits for shaderdbRob Clark2018-02-103-2/+18
* nir: add lower_all_io_to_temps flagTimothy Arceri2018-01-311-0/+1
* freedreno/ir3: "soft" depth scheduling for SFU instructionsRob Clark2018-01-141-9/+21
* freedreno/ir3: handle VTXID_BASE for indirect drawsRob Clark2017-12-191-2/+41
* freedreno/ir3: add ctx->mem_to_mem()Rob Clark2017-12-191-14/+2
* freedreno/a5xx: use vertex_id_zero_baseRob Clark2017-12-191-19/+0
* freedreno/ir3: handle input/output componentRob Clark2017-12-051-4/+6
* freedreno/ir3: relax barriersRob Clark2017-12-031-2/+2
* freedreno/ir3: all mem instructions have WAR hazzardRob Clark2017-12-031-1/+1
* freedreno/ir3: add a pass to lower tg4 to txl, enable gather on a4xxIlia Mirkin2017-11-254-2/+148
* freedreno/ir3: add texture gather supportRob Clark2017-11-181-1/+12
* freedreno/ir3: don't create split/fo if only writing .xRob Clark2017-11-121-0/+6
* freedreno/a5xx: indirect gridsRob Clark2017-11-122-9/+58
* freedreno/ir3: moar better schedulerRob Clark2017-11-125-58/+227
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