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* freedreno/a6xx: remove fd6_shader_stateobjRob Clark2018-10-083-23/+10
| | | | | | | Earlier gen's already got this cleanup, but a6xx was still off on a branch then. Signed-off-by: Rob Clark <[email protected]>
* freedreno/a6xx: hwbinningRob Clark2018-10-024-96/+144
| | | | Signed-off-by: Rob Clark <[email protected]>
* freedreno: update generated headersRob Clark2018-10-021-22/+33
| | | | Signed-off-by: Rob Clark <[email protected]>
* freedreno/a6xx: Build up draw dword0 outside visibilty if statementKristian H. Kristensen2018-09-271-17/+18
| | | | | | | | Pulling this logic out means we can share the logic and avoid a couple of temporary variables that helped make things clearer before. Note that in either vismode case, we always program vismode 0. Signed-off-by: Kristian H. Kristensen <[email protected]>
* freedreno/a6xx: Simplify draw_emit() branches a bitKristian H. Kristensen2018-09-271-16/+8
| | | | | | | | Now that we've copied the emit logic into each branch of the if (info->index_size) statement, we can simplify the logic a bit according to which case we're in. Signed-off-by: Kristian H. Kristensen <[email protected]>
* freedreno/a6xx: Copy OUT_RING() part into each branch of the index ifKristian H. Kristensen2018-09-271-17/+29
| | | | Signed-off-by: Kristian H. Kristensen <[email protected]>
* freedreno/a6xx: Split fd6_draw_emit into direct and indirect pathsKristian H. Kristensen2018-09-271-36/+46
| | | | | | | This splits the two code paths into separate functions and moves the "if (info->indirect)" test into draw_impl(). Signed-off-by: Kristian H. Kristensen <[email protected]>
* freedreno/a6xx: Inline fd6_draw()Kristian H. Kristensen2018-09-271-31/+17
| | | | | | Simplify the code a bit by inlining this helper. Signed-off-by: Kristian H. Kristensen <[email protected]>
* freedreno/a6xx: Move emit_marker and wfi to draw_impl()Kristian H. Kristensen2018-09-271-17/+12
| | | | | | | This way the markers clearly bracket the draw call and isn't duplicated for both direct and indirect draw code. Signed-off-by: Kristian H. Kristensen <[email protected]>
* freedreno/a6xx: Move inline functions out of fd6_draw.hKristian H. Kristensen2018-09-273-108/+110
| | | | | | Only used in fd6_draw.c so put them there. Signed-off-by: Kristian H. Kristensen <[email protected]>
* freedreno/a6xx: fix shaders w/ >= 24 regsRob Clark2018-09-271-1/+1
| | | | | | | | Possibly these bits mean something else now. Blob always seems to use FOUR_QUADS, and changing to TWO_QUADS seems to cause different threads to overlap registers. Signed-off-by: Rob Clark <[email protected]>
* freedreno/a6xx: fix gl_FragCoord.wRob Clark2018-09-271-2/+6
| | | | Signed-off-by: Rob Clark <[email protected]>
* freedreno: handle invalidated buffers harderRob Clark2018-09-271-0/+3
| | | | | | Do a better job of skipping mem2gmem/gmem2mem.. Signed-off-by: Rob Clark <[email protected]>
* freedreno/a6xx: fix constlenRob Clark2018-09-271-7/+6
| | | | | | | | | Fix a few bits of confusion, as with previous gen's constlen is aligned to 4, and value in bitfield is left-shifted by 2 (ie. divided by 4). But this is done by the CONSTLEN() accessor/builder fxn, so don't do it twice. Also HLSQ_FS_CNTL.CONSTLEN is not special. Signed-off-by: Rob Clark <[email protected]>
* freedreno/a6xx: backface stencil stateRob Clark2018-09-272-2/+4
| | | | Signed-off-by: Rob Clark <[email protected]>
* freedreno/a6xx: fix gpu crash with separate-stencilRob Clark2018-09-271-1/+1
| | | | | | | Fixes a crash in (of all things) dEQP-GLES2.info.vendor with --deqp-surface-type=fbo.. Signed-off-by: Rob Clark <[email protected]>
* freedreno/a6xx: fix MRT configRob Clark2018-09-271-7/+7
| | | | Signed-off-by: Rob Clark <[email protected]>
* freedreno: simplify pctx->clear()Rob Clark2018-09-271-5/+0
| | | | | | | | | | | | This is defined to always clear the entire surface(s) specified, regardless of scissor state.. mesa/st will turn scissored clears into a draw. So rip about a bunch of unnecessary machinery. Also remove a comment that was obsolete since using u_blitter to turn clear into draw (for the cases where there isn't a hw blitter fast-path). Signed-off-by: Rob Clark <[email protected]>
* freedreno: fix scissor state emitRob Clark2018-09-271-1/+2
| | | | | | | The effective scissor changes based on rasterizer->scissor flag, so we need to re-emit scissor state when rasterizer state changes. Signed-off-by: Rob Clark <[email protected]>
* freedreno: update generated headersRob Clark2018-09-272-308/+1057
| | | | Signed-off-by: Rob Clark <[email protected]>
* freedreno/a6xx: fix mem2gmem for zsbufRob Clark2018-09-051-1/+4
| | | | Signed-off-by: Rob Clark <[email protected]>
* freedreno/a6xx: bordercolor fixesRob Clark2018-09-051-4/+25
| | | | | | | | | Port fixes from a5xx (f0715442) TODO maybe this should move to shared code, since it seems to be the same. Signed-off-by: Rob Clark <[email protected]>
* freedreno: fix context teardown harderRob Clark2018-09-051-2/+2
| | | | | | | | The border_color_uploaders need to be torn down before the transfer_pool is destroyed. Fixes: e11e9d63943 freedreno: fix context teardown race Signed-off-by: Rob Clark <[email protected]>
* freedreno/a6xx: fix debug build crashRob Clark2018-09-051-0/+7
| | | | | | Porting 0c8d9e923aa9239e20f9bc969faf9caa0b85237f to a6xx. Signed-off-by: Rob Clark <[email protected]>
* freedreno: fix context teardown raceRob Clark2018-08-201-2/+2
| | | | | | | | We could still have batches queued up to flush, so fd_context_destroy() (which will kill and sync on the flush_queue) before deleting buffers that might be referenced from fdN_gmem() from context of flush_queue. Signed-off-by: Rob Clark <[email protected]>
* freedreno/a6xx: streamoutRob Clark2018-08-173-45/+62
| | | | Signed-off-by: Rob Clark <[email protected]>
* freedreno/a6xx: fragz fixesRob Clark2018-08-171-7/+3
| | | | Signed-off-by: Rob Clark <[email protected]>
* freedreno/a6xx: scissor fixesRob Clark2018-08-172-4/+4
| | | | Signed-off-by: Rob Clark <[email protected]>
* freedreno: update generated headersRob Clark2018-08-173-9/+14
| | | | Signed-off-by: Rob Clark <[email protected]>
* freedreno/a6xx: fix srgbRob Clark2018-08-171-7/+13
| | | | Signed-off-by: Rob Clark <[email protected]>
* freedreno: Add a6xx backendKristian H. Kristensen2018-08-1628-0/+6260
| | | | | | | | | | This adds a freedreno backend for the a6xx generation GPUs, which at the time of this commit is about 98% GLES2 conformant. Much remains to be done - both performance work and feature work towards more recent GLES versions, but this is a good start. Signed-off-by: Kristian H. Kristensen <[email protected]> Signed-off-by: Rob Clark <[email protected]>
* freedreno: update generated headersRob Clark2018-08-161-0/+4638
pull in a6xx registers Signed-off-by: Rob Clark <[email protected]>
generated by cgit v1.2.3 (git 2.39.1) at 2024-12-03 15:37:30 +0000