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* nir: Offset vertex_id by first_vertex instead of base_vertexNeil Roberts2018-04-191-1/+1
| | | | | | | | | | | | | | | | | | base_vertex will be zero for non-indexed calls and in that case we need vertex_id to be offset by the ‘first’ parameter instead. That is what we get with first_vertex. This is true for both GL and Vulkan. The freedreno driver is also setting vertex_id_zero_based on nir_options. In order to avoid breakage this patch switches the relevant code to handle SYSTEM_VALUE_FIRST_VERTEX so that it can retain the same behavior. v2: change a3xx/fd3_emit.c and a4xx/fd4_emit.c from SYSTEM_VALUE_BASE_VERTEX to SYSTEM_VALUE_FIRST_VERTEX (Kenneth). Reviewed-by: Ian Romanick <[email protected]> Cc: Rob Clark <[email protected]> Acked-by: Marek Olšák <[email protected]>
* freedreno: update generated headersRob Clark2018-01-141-4/+4
| | | | Signed-off-by: Rob Clark <[email protected]>
* freedreno/ir3: add ctx->mem_to_mem()Rob Clark2017-12-191-0/+21
| | | | | | | | For dealing with indirect-draw + gl_VertexID, we'll introduce another case where we need to use CP_MEM_TO_MEM. Rather than adding more if(a5xx)/else make this a ctx vfunc. Signed-off-by: Rob Clark <[email protected]>
* freedreno: update generated headersRob Clark2017-12-171-16/+163
| | | | Signed-off-by: Rob Clark <[email protected]>
* gallium/u_upload_mgr: allow drivers to specify pipe_resource::flagsMarek Olšák2017-12-051-1/+1
| | | | Reviewed-by: Nicolai Hähnle <[email protected]>
* freedreno: remove use of u_transferRob Clark2017-12-043-4/+4
| | | | | | | Freedreno doesn't treat buffers and images differently, so it's use was kind of pointless. Signed-off-by: Rob Clark <[email protected]>
* freedreno/a4xx: add ARB_framebuffer_no_attachments supportIlia Mirkin2017-11-251-0/+5
| | | | | Signed-off-by: Ilia Mirkin <[email protected]> Reviewed-by: Rob Clark <[email protected]>
* freedreno/a4xx: add indirect draw supportIlia Mirkin2017-11-251-0/+29
| | | | | | | | This is a copy of the a5xx logic. Fails a few tests, but basic functionality is there. Signed-off-by: Ilia Mirkin <[email protected]> Reviewed-by: Rob Clark <[email protected]>
* freedreno/a4xx: add stencil texturing supportIlia Mirkin2017-11-253-12/+35
| | | | | | | Copied from a5xx, should be identical. Signed-off-by: Ilia Mirkin <[email protected]> Reviewed-by: Rob Clark <[email protected]>
* freedreno: update generated headersRob Clark2017-11-171-2/+2
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* freedreno: update generated headersRob Clark2017-11-141-2/+2
| | | | Signed-off-by: Rob Clark <[email protected]>
* freedreno: update generated headersRob Clark2017-11-121-3/+3
| | | | Signed-off-by: Rob Clark <[email protected]>
* freedreno: rename pipe -> vsc_pipeRob Clark2017-10-241-4/+4
| | | | | | | | To add context priority support we need to have an fd_pipe per context, rather than per-screen. Which conflicts with existing ctx->pipe (which is actually a visibility stream pipe (hw resource). So just rename it. Signed-off-by: Rob Clark <[email protected]>
* freedreno: pass context flags through to fd_context_init()Rob Clark2017-10-241-1/+1
| | | | | | Prep work for later patch. Signed-off-by: Rob Clark <[email protected]>
* freedreno: compile fixNicolai Hähnle2017-09-181-1/+1
| | | | | Fixes: 3f6b3d9db ("gallium: add PIPE_QUERY_OCCLUSION_PREDICATE_CONSERVATIVE") Reported-by: Jan Vesely <[email protected]>
* gallium: add PIPE_QUERY_OCCLUSION_PREDICATE_CONSERVATIVENicolai Hähnle2017-09-181-0/+8
| | | | | | | | | | | | | | | | | To be able to properly distinguish between GL_ANY_SAMPLES_PASSED and GL_ANY_SAMPLES_PASSED_CONSERVATIVE. This patch goes through all drivers, having them treat the two query types identically, except: 1. radeon incorrectly enabled conservative mode on PIPE_QUERY_OCCLUSION_PREDICATE. We now do it correctly, only on PIPE_QUERY_OCCLUSION_PREDICATE_CONSERVATIVE. 2. st/mesa uses the new query type. Fixes dEQP-GLES31.functional.fbo.no_attachments.* Reviewed-by: Marek Olšák <[email protected]>
* freedreno: update generated headersRob Clark2017-06-071-2/+2
| | | | Signed-off-by: Rob Clark <[email protected]>
* freedreno: update generated headersRob Clark2017-05-301-3/+41
| | | | Signed-off-by: Rob Clark <[email protected]>
* freedreno: update generated headersRob Clark2017-05-231-9/+9
| | | | Signed-off-by: Rob Clark <[email protected]>
* freedreno/gmem: fix hw binning hangs with large render targetsRob Clark2017-05-161-3/+4
| | | | | | | | On all 3 gens, we have 4 bits for width and height in the VSC pipe config. And overflow results in setting width and/or height to zero which causes hangs. Signed-off-by: Rob Clark <[email protected]>
* freedreno: fix indexbuffer uploadRob Clark2017-05-141-1/+1
| | | | | | | | My fault for not having time to test Marek's patches while they were on list. Fixes: 330d0607 ("gallium: remove pipe_index_buffer and set_index_buffer") Signed-off-by: Rob Clark <[email protected]>
* freedreno: update generated headersRob Clark2017-05-131-3/+3
| | | | Signed-off-by: Rob Clark <[email protected]>
* gallium: remove pipe_index_buffer and set_index_bufferMarek Olšák2017-05-103-16/+16
| | | | | | | | | | | | | | pipe_draw_info::indexed is replaced with index_size. index_size == 0 means non-indexed. Instead of pipe_index_buffer::offset, pipe_draw_info::start is used. For indexed indirect draws, pipe_draw_info::start is added to the indirect start. This is the only case when "start" affects indirect draws. pipe_draw_info::index is a union. Use either index::resource or index::user depending on the value of pipe_draw_info::has_user_indices. v2: fixes for nine, svga
* gallium: decrease the size of pipe_vertex_buffer - 24 -> 16 bytesMarek Olšák2017-05-101-1/+1
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* freedreno: update generated headersRob Clark2017-04-221-2/+2
| | | | Signed-off-by: Rob Clark <[email protected]>
* freedreno: make hw-query a helperRob Clark2017-04-222-0/+12
| | | | | | | | | For a5xx (and actually some queries on a4xx) we can accumulate results in the cmdstream, so we don't need this elaborate mechanism of tracking per-tile query results. So make it into vfuncs so generation specific backend can use it when it makes sense. Signed-off-by: Rob Clark <[email protected]>
* freedreno: refactor dirty state handlingRob Clark2017-04-183-7/+9
| | | | | | | | In particular, move per-shader-stage info out to a seperate array of enum's indexed by shader stage. This will make it easier to add more shader stages as well as new per-stage state (like SSBOs). Signed-off-by: Rob Clark <[email protected]>
* freedreno/ir3: split out per-stage emit_consts fxnsRob Clark2017-04-181-2/+2
| | | | | | | | | This makes it easier to deal with adding additional stages which have their own driver-params. The duplicated code this introduces can be refactored out after a later patch moves to per-shader-stage dirty flags. Signed-off-by: Rob Clark <[email protected]>
* freedreno: add helper to mark all state cleanRob Clark2017-04-182-15/+7
| | | | | | | | Note that this involves juggling around a bit when we emit and clear texture state. So split out from the patch that adds the helper to set all state dirty. Signed-off-by: Rob Clark <[email protected]>
* freedreno: make texture state an arrayRob Clark2017-04-181-2/+2
| | | | | | | | Make this an array indexed by shader stage, as is done elsewhere for other per-shader-stage state. This will simplify things as more shader stages are eventually added. Signed-off-by: Rob Clark <[email protected]>
* freedreno/ir3: refactor out helpers for comparing shader keysRob Clark2017-04-181-28/+4
| | | | | | | | | | | | Each of the ir3 users has *basically* the same logic for comparing the previous and current shader key, to see which, if any, shader state needs to be marked dirty due to shader variant change. The difference between gen's was just that some lowering flags never get set on certain generations. But it doesn't really hurt to include the extra checks (because both keys would have false). Signed-off-by: Rob Clark <[email protected]>
* freedreno: extract helper for stage->sb for a4xx+Rob Clark2017-04-172-14/+3
| | | | Signed-off-by: Rob Clark <[email protected]>
* freedreno/{a4xx,a5xx}: switch to CP_LOAD_STATE4Rob Clark2017-04-172-66/+66
| | | | | | | The layout of CP_LOAD_STATE packet is slightly different on a4xx+. Switch to the a4xx+ specific CP_LOAD_STATE4 to get the correct encoding. Signed-off-by: Rob Clark <[email protected]>
* freedreno: update generated headersRob Clark2017-04-171-11/+11
| | | | Signed-off-by: Rob Clark <[email protected]>
* freedreno: update generated headersRob Clark2017-01-221-1/+1
| | | | | Signed-off-by: Rob Clark <[email protected]> Cc: "17.0" <[email protected]>
* freedreno: update generated headersRob Clark2017-01-101-1/+1
| | | | Signed-off-by: Rob Clark <[email protected]>
* freedreno: update generated headersRob Clark2016-12-271-7/+6
| | | | | | | Pull in a5xx streamout related regs. Also fixes a couple incorrect register definitions. Signed-off-by: Rob Clark <[email protected]>
* freedreno/ir3: rework location of driver constantsRob Clark2016-12-271-3/+6
| | | | | | | | | | | Rework how we lay out driver constants (driver-params, UBO/TFBO buffer addresses, immediates) for more flexibility. For a5xx+ we need to deal with the fact that gpu ptrs are 64b instead of 32b, which makes the fixed offset scheme not work so well. While we are dealing with that we might also make the layout more dynamic to account for varying # of UBOs, etc. Signed-off-by: Rob Clark <[email protected]>
* freedreno: fdN_gmem_restore_format() is not gen specificRob Clark2016-12-183-26/+2
| | | | | | | | | | Refactor out into a common helper, since this is the same across generations when we need equiv z/s gmem restore format. Next patch needs this in a5xx, rather than creating yet another helper push this into core. Signed-off-by: Rob Clark <[email protected]>
* freedreno: update generated headersRob Clark2016-12-181-2/+2
| | | | Signed-off-by: Rob Clark <[email protected]>
* freedreno: update generated headersRob Clark2016-12-061-2/+20
| | | | Signed-off-by: Rob Clark <[email protected]>
* freedreno: update generated headersRob Clark2016-11-303-31/+36
| | | | | | Pull in a5xx Signed-off-by: Rob Clark <[email protected]>
* freedreno/ir3: don't offset inloc by 8Rob Clark2016-11-301-8/+5
| | | | | | | | | On a3xx/a4xx, the SP_VS_VPC_DST_REG.OUTLOCn is offset by 8, so we used to add this offset into fs->inputs[n].inloc. But a5xx drops this extra offset-by-8. So instead make inloc zero based and add the offset when we emit OUTLOCn values (for the gen's that need the offset). Signed-off-by: Rob Clark <[email protected]>
* freedreno/a4xx: use new shader linkage helperRob Clark2016-11-301-27/+16
| | | | Signed-off-by: Rob Clark <[email protected]>
* freedreno/a4xx: make _emit_const() staticRob Clark2016-11-273-6/+2
| | | | Signed-off-by: Rob Clark <[email protected]>
* freedreno/a3xx+a4xx: fix clip-plane lowering stateRob Clark2016-10-071-0/+3
| | | | | | | If enabled clip-planes have changed, we need to mark program state dirty. Signed-off-by: Rob Clark <[email protected]>
* gallium: remove PIPE_BIND_TRANSFER_READ/WRITEMarek Olšák2016-09-081-5/+0
| | | | | | | | not used in any useful way Reviewed-by: Eric Anholt <[email protected]> Reviewed-by: Nicolai Hähnle <[email protected]> Reviewed-by: Roland Scheidegger <[email protected]>
* gallium: Use enum pipe_shader_type in set_sampler_views()Kai Wasserbäch2016-08-291-1/+1
| | | | | Signed-off-by: Kai Wasserbäch <[email protected]> Reviewed-by: Brian Paul <[email protected]>
* gallium: Use enum pipe_shader_type in bind_sampler_states() (v2)Kai Wasserbäch2016-08-291-1/+1
| | | | | | | | | | | v1 → v2: - Fixed indentation (noted by Brian Paul) - Removed second assert from nouveau's switch statements (suggested by Brian Paul) Signed-off-by: Kai Wasserbäch <[email protected]> Reviewed-by: Samuel Pitoiset <[email protected]> Reviewed-by: Brian Paul <[email protected]>
* a4xx: make sure to actually clamp depth as requestedIlia Mirkin2016-08-192-2/+29
| | | | | | | | | | | We were previously ... not clamping. I guess this meant that everything got clamped to 1/0, which was enough to pass the existing tests. Or perhaps the clamping would only happen to the rasterized depth value and not the frag shader's output depth value. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=97231 Signed-off-by: Ilia Mirkin <[email protected]> Cc: [email protected]
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