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* freedreno: move ir3 to common locationRob Clark2018-11-273-3/+5
| | | | | | | | | | | | | | | | Move (most of) the ir3 compiler to src/freedreno/ir3 so that it can be re-used by some future vulkan driver. The parts that are gallium specific have been refactored out and remain in the gallium driver. Getting the move done now so that it can happen before further refactoring to support a6xx specific instructions. NOTE also removes ir3_cmdline compiler tool from autotools build since that was easier than fixing it and I normally use meson build. Waiting patiently for the day that we can remove *everything* from the autotools build. Signed-off-by: Rob Clark <[email protected]>
* freedreno/ir3: split up ir3_shaderRob Clark2018-11-271-1/+1
| | | | | | | Split the parts that are gallium specific into ir3_gallium so the rest can move to a common location outside of gallium. Signed-off-by: Rob Clark <[email protected]>
* freedreno: shader_t -> gl_shader_stageRob Clark2018-11-272-8/+8
| | | | | | | | | Just massive search/replace for the most part. Step towards removing ir3 dependency on disasm.h which is shared by a2xx. One step closer to being able to move ir3 out of gallium. Signed-off-by: Rob Clark <[email protected]>
* freedreno: update generated headersRob Clark2018-11-061-3/+3
| | | | Signed-off-by: Rob Clark <[email protected]>
* freedreno: import libdrm_freedreno + redesign submitRob Clark2018-10-261-2/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | In the pursuit of lowering driver overhead, it became clear that some amount of redesign of how libdrm_freedreno constructs the submit ioctl would be needed. In particular, as the gallium driver is starting to make heavier use of CP_SET_DRAW_STATE state groups/objects, the over- head of tracking cmd buffers and relocs becomes too much. And for "streaming" state, which isn't ever reused (like uniform uploads) the overhead of allocating/freeing ringbuffer[1] objects is too high. This redesign makes two main changes: 1) Introduces a fd_submit object for tracking bos and cmds table for the submit ioctl, making ringbuffer objects more light- weight. This was previously done in the ringbuffer. But we have many ringbuffer instances involved in a submit (gmem + draw + potentially 1000's of state-group rbs), and only need a single bos and cmds table. (Reloc table is still per-rb) The submit is also a convenient place for a slab allocator for ringbuffer objects. Other options would have required locking because, while we can guarantee allocations will only happen on a single thread, free's could happen either on the application thread or the flush_queue thread. With the slab allocator in the submit object, any frees that happen on the flush_queue thread happen after we know that the application thread is done with the submit. 2) Introduce a new "softpin" msm_ringbuffer_sp implementation that does not use relocs and only has cmds table entries for IB1 (ie. the cmdstream buffers that kernel needs to CP_INDIRECT_BUFFER to from the RB). To do this properly will require some updates on the kernel side, so whether you get the softpin or legacy submit/ringbuffer implementation at runtime depends on your kernel version. To make all these changes in libdrm would basically require adding a libdrm_freedreno2, so this is a good point to just pull the libdrm code into mesa. Plus it allows for using mesa's hashtable, slab allocator, etc. And it lets us have asserts enabled for debug mesa buids but omitted for release builds. And it makes life easier if further API changes become necessary. At this point I haven't tried to pull in the kgsl backend. Although I left the level of vfunc indirection which would make it possible to have other backends. (And this was convenient to keep to allow for the "softpin" ringbuffer to coexist.) NOTE: if bisecting a build error takes you here, try a clean build. There are a bunch of ways things can go wrong if you still have libdrm_freedreno cflags. [1] "ringbuffer" is probably a bad name, the only level of cmdstream buffer that is actually a ring is RB managed by kernel. User- space cmdstream is all IB1/IB2 and state-groups. Reviewed-by: Kristian H. Kristensen <[email protected]> Reviewed-by: Eric Engestrom <[email protected]> Signed-off-by: Rob Clark <[email protected]>
* freedreno/ir3: move binning_pass out of shader variant keyRob Clark2018-10-174-13/+16
| | | | | | | | | | | Prep work for a following patch, that introduces a cache to map from program state (all shader stages) plus variant key to pre-baked hw state (which could be emit'd via CP_SET_DRAW_STATE, for example). To do that, we really want the variant key to be immutable, and to treat the binning pass shader as an extra shader stage, rather than as a VS variant. Signed-off-by: Rob Clark <[email protected]>
* freedreno/ir3: track # of samplers used by shaderRob Clark2018-10-171-1/+1
| | | | | | | This is useful for a6xx to avoid program state from depending on bound tex/samp state. Signed-off-by: Rob Clark <[email protected]>
* freedreno: Remove the Emacs mode linesNeil Roberts2018-10-1722-44/+0
| | | | | | | | | | | | | | | These are not necessary because the corresponding settings are set via the .dir-locals.el file anyway. Most of them were missing a ‘:’ after “tab-width” which was making Emacs display an annoying warning whenever you open the file. This patch was made with: sed -ri '/-\*- mode:/,/^$/d' \ $(find src/gallium/{drivers,winsys} -name \*.\[ch\] \ -exec grep -l -- '-\*- mode:' {} \+) Signed-off-by: Rob Clark <[email protected]>
* freedreno: update generated headersRob Clark2018-10-081-5/+5
| | | | Signed-off-by: Rob Clark <[email protected]>
* freedreno: update generated headersRob Clark2018-10-021-3/+3
| | | | Signed-off-by: Rob Clark <[email protected]>
* freedreno: handle invalidated buffers harderRob Clark2018-09-271-0/+5
| | | | | | Do a better job of skipping mem2gmem/gmem2mem.. Signed-off-by: Rob Clark <[email protected]>
* freedreno: update generated headersRob Clark2018-09-271-4/+4
| | | | Signed-off-by: Rob Clark <[email protected]>
* gallium: split depth_clip into depth_clip_near & depth_clip_farMarek Olšák2018-09-063-4/+4
| | | | for AMD_depth_clamp_separate.
* freedreno: fix context teardown harderRob Clark2018-09-051-2/+2
| | | | | | | | The border_color_uploaders need to be torn down before the transfer_pool is destroyed. Fixes: e11e9d63943 freedreno: fix context teardown race Signed-off-by: Rob Clark <[email protected]>
* freedreno: fix context teardown raceRob Clark2018-08-201-2/+2
| | | | | | | | We could still have batches queued up to flush, so fd_context_destroy() (which will kill and sync on the flush_queue) before deleting buffers that might be referenced from fdN_gmem() from context of flush_queue. Signed-off-by: Rob Clark <[email protected]>
* freedreno: update generated headersRob Clark2018-08-171-3/+3
| | | | Signed-off-by: Rob Clark <[email protected]>
* freedreno: update generated headersRob Clark2018-08-161-11/+11
| | | | | | pull in a6xx registers Signed-off-by: Rob Clark <[email protected]>
* freedreno/ir3: stop hard-coding FS input regsRob Clark2018-08-141-5/+13
| | | | | | | | | | We originally did this because at the time we didn't know all the bitfields to configure where various frag shader sysval's went. But we do. So switch to using sysvals for all the frag shader inputs. Signed-off-by: Rob Clark <[email protected]>
* freedreno: move free() into fdN_context_destroy()Rob Clark2018-08-141-0/+2
| | | | | | | | Following patches will be doing further cleanup after calling fd_context_destroy() so it is easier if we move the free() into the per-gen backend code. Signed-off-by: Rob Clark <[email protected]>
* gallium: add storage_sample_count parameter into is_format_supportedMarek Olšák2018-07-311-0/+4
| | | | Tested-by: Dieter Nützel <[email protected]>
* freedreno: register usage queriesRob Clark2018-07-181-1/+6
| | | | | | | Avg number of (half) regs per draw, so we can corrolate fps dips to shader register usage. Signed-off-by: Rob Clark <[email protected]>
* gallium/util: remove dummy function util_format_is_supportedMarek Olšák2018-06-291-2/+1
| | | | Reviewed-by: Eric Engestrom <[email protected]>
* freedreno: update generated headersRob Clark2018-06-211-5/+5
| | | | Signed-off-by: Rob Clark <[email protected]>
* freedreno/a5xx: fix crash in ↵Rob Clark2018-06-191-1/+10
| | | | | | | | | | | dEQP-GLES31.stress.vertex_attribute_binding.buffer_bounds.bind_vertex_buffer_offset_near_wrap_10 This is kind of a hack, but really the only problem is the debug_assert() in OUT_RELOC(). But the debug_assert() is useful to catch real issues. So just add some #ifdef DEBUG code to filter things out before we hit the assert. Signed-off-by: Rob Clark <[email protected]>
* freedreno: update generated headersRob Clark2018-06-111-11/+13
| | | | Signed-off-by: Rob Clark <[email protected]>
* freedreno/a3xx: remove fd3_shader_stateobjRob Clark2018-05-153-26/+13
| | | | | | Extra level of indirection that serves no purpose. Signed-off-by: Rob Clark <[email protected]>
* nir: Offset vertex_id by first_vertex instead of base_vertexNeil Roberts2018-04-191-1/+1
| | | | | | | | | | | | | | | | | | base_vertex will be zero for non-indexed calls and in that case we need vertex_id to be offset by the ‘first’ parameter instead. That is what we get with first_vertex. This is true for both GL and Vulkan. The freedreno driver is also setting vertex_id_zero_based on nir_options. In order to avoid breakage this patch switches the relevant code to handle SYSTEM_VALUE_FIRST_VERTEX so that it can retain the same behavior. v2: change a3xx/fd3_emit.c and a4xx/fd4_emit.c from SYSTEM_VALUE_BASE_VERTEX to SYSTEM_VALUE_FIRST_VERTEX (Kenneth). Reviewed-by: Ian Romanick <[email protected]> Cc: Rob Clark <[email protected]> Acked-by: Marek Olšák <[email protected]>
* freedreno: update generated headersRob Clark2018-01-141-4/+4
| | | | Signed-off-by: Rob Clark <[email protected]>
* freedreno: update generated headersRob Clark2017-12-171-4/+4
| | | | Signed-off-by: Rob Clark <[email protected]>
* gallium/u_upload_mgr: allow drivers to specify pipe_resource::flagsMarek Olšák2017-12-051-1/+1
| | | | Reviewed-by: Nicolai Hähnle <[email protected]>
* freedreno: remove use of u_transferRob Clark2017-12-042-4/+4
| | | | | | | Freedreno doesn't treat buffers and images differently, so it's use was kind of pointless. Signed-off-by: Rob Clark <[email protected]>
* freedreno: update generated headersRob Clark2017-11-171-2/+2
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* freedreno: update generated headersRob Clark2017-11-141-2/+2
| | | | Signed-off-by: Rob Clark <[email protected]>
* freedreno: update generated headersRob Clark2017-11-121-3/+3
| | | | Signed-off-by: Rob Clark <[email protected]>
* freedreno: rename pipe -> vsc_pipeRob Clark2017-10-241-2/+2
| | | | | | | | To add context priority support we need to have an fd_pipe per context, rather than per-screen. Which conflicts with existing ctx->pipe (which is actually a visibility stream pipe (hw resource). So just rename it. Signed-off-by: Rob Clark <[email protected]>
* freedreno: pass context flags through to fd_context_init()Rob Clark2017-10-241-1/+1
| | | | | | Prep work for later patch. Signed-off-by: Rob Clark <[email protected]>
* gallium: add PIPE_QUERY_OCCLUSION_PREDICATE_CONSERVATIVENicolai Hähnle2017-09-181-0/+8
| | | | | | | | | | | | | | | | | To be able to properly distinguish between GL_ANY_SAMPLES_PASSED and GL_ANY_SAMPLES_PASSED_CONSERVATIVE. This patch goes through all drivers, having them treat the two query types identically, except: 1. radeon incorrectly enabled conservative mode on PIPE_QUERY_OCCLUSION_PREDICATE. We now do it correctly, only on PIPE_QUERY_OCCLUSION_PREDICATE_CONSERVATIVE. 2. st/mesa uses the new query type. Fixes dEQP-GLES31.functional.fbo.no_attachments.* Reviewed-by: Marek Olšák <[email protected]>
* freedreno: update generated headersRob Clark2017-06-071-2/+2
| | | | Signed-off-by: Rob Clark <[email protected]>
* freedreno: update generated headersRob Clark2017-05-301-3/+3
| | | | Signed-off-by: Rob Clark <[email protected]>
* freedreno: update generated headersRob Clark2017-05-231-9/+9
| | | | Signed-off-by: Rob Clark <[email protected]>
* freedreno/gmem: fix hw binning hangs with large render targetsRob Clark2017-05-161-0/+3
| | | | | | | | On all 3 gens, we have 4 bits for width and height in the VSC pipe config. And overflow results in setting width and/or height to zero which causes hangs. Signed-off-by: Rob Clark <[email protected]>
* freedreno: fix indexbuffer uploadRob Clark2017-05-141-4/+4
| | | | | | | | My fault for not having time to test Marek's patches while they were on list. Fixes: 330d0607 ("gallium: remove pipe_index_buffer and set_index_buffer") Signed-off-by: Rob Clark <[email protected]>
* freedreno: update generated headersRob Clark2017-05-131-3/+3
| | | | Signed-off-by: Rob Clark <[email protected]>
* gallium: remove pipe_index_buffer and set_index_bufferMarek Olšák2017-05-102-3/+4
| | | | | | | | | | | | | | pipe_draw_info::indexed is replaced with index_size. index_size == 0 means non-indexed. Instead of pipe_index_buffer::offset, pipe_draw_info::start is used. For indexed indirect draws, pipe_draw_info::start is added to the indirect start. This is the only case when "start" affects indirect draws. pipe_draw_info::index is a union. Use either index::resource or index::user depending on the value of pipe_draw_info::has_user_indices. v2: fixes for nine, svga
* gallium: decrease the size of pipe_vertex_buffer - 24 -> 16 bytesMarek Olšák2017-05-101-1/+1
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* freedreno/a3xx: fix hang w/ large render targets and small gmemRob Clark2017-05-061-0/+3
| | | | | | | | | Possibly other gen's have a similar limit. Fixes glmark2 -b shadow with larger resolutions on devices with small gmem (for example, fullscreen 1080p on 8x16/db410c). Cc: [email protected] Signed-off-by: Rob Clark <[email protected]>
* freedreno: update generated headersRob Clark2017-04-221-2/+2
| | | | Signed-off-by: Rob Clark <[email protected]>
* freedreno: make hw-query a helperRob Clark2017-04-222-0/+12
| | | | | | | | | For a5xx (and actually some queries on a4xx) we can accumulate results in the cmdstream, so we don't need this elaborate mechanism of tracking per-tile query results. So make it into vfuncs so generation specific backend can use it when it makes sense. Signed-off-by: Rob Clark <[email protected]>
* freedreno: refactor dirty state handlingRob Clark2017-04-183-7/+9
| | | | | | | | In particular, move per-shader-stage info out to a seperate array of enum's indexed by shader stage. This will make it easier to add more shader stages as well as new per-stage state (like SSBOs). Signed-off-by: Rob Clark <[email protected]>
* freedreno/ir3: split out per-stage emit_consts fxnsRob Clark2017-04-181-2/+2
| | | | | | | | | This makes it easier to deal with adding additional stages which have their own driver-params. The duplicated code this introduces can be refactored out after a later patch moves to per-shader-stage dirty flags. Signed-off-by: Rob Clark <[email protected]>
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