| Commit message (Collapse) | Author | Age | Files | Lines |
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Acked-by: Dave Airlie <[email protected]>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3307>
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Reviewed-by: Roland Scheidegger <[email protected]>
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SPV_AMD_shader_image_load_store_lod allows to use a lod parameter
with OpImageRead, OpImageWrite and OpImageSparseRead.
According to the specification, this parameter should be a 32-bit
integer. It is initialized to 0 when no lod parameter is found
during SPIR-V->NIR translation.
Signed-off-by: Samuel Pitoiset <[email protected]>
Reviewed-by: Bas Nieuwenhuizen <[email protected]>
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This just adds support for getting the draw count from the
indirect buffer.
Reviewed-by: Roland Scheidegger <[email protected]>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3234>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3234>
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ARB_indirect_parameters needs drivers to deal with mutli_draw_indirect
themselves.
Reviewed-by: Roland Scheidegger <[email protected]>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3234>
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This decreases CPU overhead, because u_vbuf is completely bypassed
in those cases.
Acked-by: Alyssa Rosenzweig <[email protected]>
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These will be reused.
Acked-by: Alyssa Rosenzweig <[email protected]>
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Acked-by: Alyssa Rosenzweig <[email protected]>
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Signed-off-by: Gert Wollny <[email protected]>
Reviewed-by: Eric Anholt <[email protected]>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3286>
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The r600/nir backend is in C++ and needs to include this file.
Signed-off-by: Gert Wollny <[email protected]>
Reviewed-by: Eric Anholt <[email protected]>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3286>
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Signed-off-by: Thong Thai <[email protected]>
Reviewed-by: Leo Liu <[email protected]>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3153>
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Since 18a8c3f7f11 we don't create a driver CSO if there are any
incompatible elements, so only ask backends to delete it if it exists.
Fixes multiple CTS crashes in V3D.
Fixes: 18a8c3f7f11 ("u_vbuf: Only create driver CSO if no incompatible elements")
Reviewed-by: Alejandro Piñeiro <[email protected]>
Reviewed-by: Christian Gmeiner <[email protected]>
Reviewed-by: Marek Olšák <[email protected]>
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This reverts commit c6ef79c488bb5fffde31e7065fd3e575f3c25fb5.
It broke torcs.
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Tessellation Control and Evaluation shaders are implementing
tessellation and require special handling of their inputs
and outputs.
TCS can write out not only per-vertex, but also per-patch
(per-primitive) attributes and tessellation factor values
that control the tessellator.
TES can read TCS outputs, plus must be feeded with new
system values (tessellation coordinates) that are
outputs of the tessellator fixed function.
TCS can also contain calls to barrier() function (similar
to compute shaders).
Reviewed-by: Roland Scheidegger <[email protected]>
Reviewed-by: Alok Hota <[email protected]>
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This just adds the NIR paths for shader group vote.
v2: drop feq for now. (Roland)
Reviewed-by: Roland Scheidegger <[email protected]>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3213>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3213>
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Pointed out by Ilia.
Fixes: 84ba00877496 (gallivm: add 64-bit const int creator.)
Reviewed-by: Ilia Mirkin <[email protected]>
Acked-by: Alyssa Rosenzweig <[email protected]>
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Acked-by: Roland Scheidegger <[email protected]>
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This fixes some CL upsample tests, which lower into packing that needs
lowering.
Acked-by: Roland Scheidegger <[email protected]>
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other sized undefs caused llvm asserts
Acked-by: Roland Scheidegger <[email protected]>
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This is prep work for when vec8/16 have landed.
Acked-by: Roland Scheidegger <[email protected]>
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Acked-by: Roland Scheidegger <[email protected]>
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We have to pass the main block size into the coroutine
and into the shader.
Acked-by: Roland Scheidegger <[email protected]>
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We have to pass the work_dim given by the user into the shader.
Acked-by: Roland Scheidegger <[email protected]>
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Translate to compute for now.
Acked-by: Roland Scheidegger <[email protected]>
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This adds the convert to 8/16 and support for 8/16 comparsions
Acked-by: Roland Scheidegger <[email protected]>
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This allows these to be used with non 32-bit types.
Acked-by: Roland Scheidegger <[email protected]>
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Acked-by: Roland Scheidegger <[email protected]>
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compute shaders need kernel input support
Acked-by: Roland Scheidegger <[email protected]>
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Acked-by: Roland Scheidegger <[email protected]>
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Some of the latest changes are causing the following build error on Android:
```
external/mesa3d/src/gallium/auxiliary/nir/nir_to_tgsi_info.c:403:6:
error: redefinition of 'nir_tgsi_scan_shader'
void nir_tgsi_scan_shader(const struct nir_shader *nir,
^
external/mesa3d/src/gallium/auxiliary/nir/nir_to_tgsi_info.h:37:20:
note: previous definition is here
static inline void nir_tgsi_scan_shader(const struct nir_shader *nir,
^
```
Include nir_to_tgsi_info.c and nir_to_tgsi_info.h into the build
only if LLVM is enabled.
Signed-off-by: Roman Stratiienko <[email protected]>
Reviewed-by: Tapani Pälli <[email protected]>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/2978>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/2978>
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Return true in u_vbuf_get_caps if the number of vertex buffers is below
the minimum required for proper OpenGL 2.0.
Signed-off-by: Paul Cercueil <[email protected]>
Reviewed-by: Marek Olšák <[email protected]>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/2807>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/2807>
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In the case of unroll_indices, we can regard all non-constant
vertex buffers with only non-instance vertex elements as incompatible
and thus free.
Signed-off-by: Paul Cercueil <[email protected]>
Reviewed-by: Marek Olšák <[email protected]>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/2807>
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Put CONST, VERTEX and INSTANCE attributes into one vertex buffer if
necessary due to hardware constraints.
Signed-off-by: Wladimir J. van der Laan <[email protected]>
Signed-off-by: Paul Cercueil <[email protected]>
Reviewed-by: Marek Olšák <[email protected]>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/2807>
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Signed-off-by: Paul Cercueil <[email protected]>
Reviewed-by: Marek Olšák <[email protected]>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/2807>
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More vertex buffers are used than the hardware supports. In
principle, we only need to make sure that less vertex buffers are
used, and mark some of the latter vertex buffers as incompatible.
For now, mark all vertex buffers as incompatible.
Signed-off-by: Paul Cercueil <[email protected]>
Reviewed-by: Marek Olšák <[email protected]>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/2807>
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Make it possible to limit the number of vertex buffers as there exist
GPUs with less then 32 supported vertex buffers.
Signed-off-by: Wladimir J. van der Laan <[email protected]>
Signed-off-by: Paul Cercueil <[email protected]>
Reviewed-by: Marek Olšák <[email protected]>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/2807>
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Add PIPE_CAP_MAX_VERTEX_BUFFERS param, which defaults to 16.
Signed-off-by: Christian Gmeiner <[email protected]>
Signed-off-by: Paul Cercueil <[email protected]>
Reviewed-by: Marek Olšák <[email protected]>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/2807>
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This code is taken from the TGSI paths, and should fix the regression
seens with GLES2
v2: use the udiv path which has d3d10 defined return.
Reviewed-by: Roland Scheidegger <[email protected]>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/2303>
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This makes u_vbuf_get_minmax_index_mapped return min = 0 / max = 0
when info->count == 0.
That should never happen anyway, but this commit makes it at least
return a sane value that callers expect, and also allows us - and
GCC - to assume count != 0 for optimization purposes.
Reviewed-by: Alyssa Rosenzweig <[email protected]>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3050>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3050>
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With this patch, GCC generates vectorized code that does the comparisons
without converting the indices to 32-bit first.
This optimization makes the aforementioned function almost twice as fast
for ARM NEON, and should speed up vectorised code on other platforms.
Without vectorisation, the function is still a percent or two faster,
but slightly larger.
Reviewed-by: Eric Anholt <[email protected]>
Reviewed-by: Alyssa Rosenzweig <[email protected]>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3050>
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This can also be useful for other hardware which has similar limitations
on vertex count per single draw.
The Mali400 has a similar limitation and can reuse this.
Signed-off-by: Erico Nunes <[email protected]>
Reviewed-by: Eric Anholt <[email protected]>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/2445>
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At least on Mali Utgard, index buffers need to be aligned on 0x40.
To avoid duplicating this, add an alignment parameter.
Keep the previous default for the other existing users.
Signed-off-by: Erico Nunes <[email protected]>
Reviewed-by: Eric Anholt <[email protected]>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/2445>
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Should be harmless, but UBSAN complains about it and fills the logs with
noise.
../src/gallium/auxiliary/util/u_inlines.h:110:8: runtime error: member access within null pointer of type 'struct pipe_surface'"}
#0 0xaaccf186 in pipe_surface_reference ../src/gallium/auxiliary/util/u_inlines.h:110"}
#1 0xaaccf186 in util_copy_framebuffer_state ../src/gallium/auxiliary/util/u_framebuffer.c:105"}
#2 0xaabfb60e in cso_set_framebuffer ../src/gallium/auxiliary/cso_cache/cso_context.c:723"}
#3 0xaae195ce in st_update_framebuffer_state ../src/mesa/state_tracker/st_atom_framebuffer.c:207"}
#4 0xaae12316 in st_validate_state ../src/mesa/state_tracker/st_atom.c:261"}
#5 0xaae31302 in st_Clear ../src/mesa/state_tracker/st_cb_clear.c:438"}
#6 0x4c3d0e in deqp::gles2::TestCaseWrapper::iterate(tcu::TestCase*) (/deqp/modules/gles2/deqp-gles2+0x2ad0e)"}
#7 0x828cf2 in tcu::TestSessionExecutor::iterateTestCase(tcu::TestCase*) (/deqp/modules/gles2/deqp-gles2+0x38fcf2)"}
#8 0x8295f0 in tcu::TestSessionExecutor::iterate() (/deqp/modules/gles2/deqp-gles2+0x3905f0)"}
#9 0x810aac in tcu::App::iterate() (/deqp/modules/gles2/deqp-gles2+0x377aac)"}
#10 0x4c1d4c in main (/deqp/modules/gles2/deqp-gles2+0x28d4c)"}
#11 0xb64b6aa8 in __libc_start_main (/lib/arm-linux-gnueabihf/libc.so.6+0x1aaa8)"}
Signed-off-by: Tomeu Vizoso <[email protected]>
Reviewed-by: Alyssa Rosenzweig <[email protected]>
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base vertex should be 0 for non-indexed draws according to the
piglit tests.
Reviewed-by: Roland Scheidegger <[email protected]>
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Reviewed-by: Roland Scheidegger <[email protected]>
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Reviewed-by: Roland Scheidegger <[email protected]>
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This fixes some isinf/isnan tests copying what the tgsi code
paths do for float compares
Reviewed-by: Roland Scheidegger <[email protected]>
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Reviewed-by: Roland Scheidegger <[email protected]>
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The previous fix worked when the second channel wasn't exposed, but
a couple of piglit tests have inputs with just the y/z chans, no x/w.
Partly Fixes piglit ext_transform_feedback-immediate-reuse-index-buffer
with llvmpipe/nir
Fixes: 5363cda52b84 ("gallivm: add swizzle support where one channel isn't defined.")
Reviewed-by: Roland Scheidegger <[email protected]>
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Switch to using texcoord intrinsic support.
Reviewed-by: Roland Scheidegger <[email protected]>
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