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* android: make libbacktrace optional on USE_LIBBACKTRACETapani Pälli2019-02-271-2/+5
| | | | | | | | | | | | Otherwise with VNDK enabled we fail linking: src/gallium/targets/dri/Android.mk: error: gallium_dri (native:vendor) should not link to libbacktrace.vendor (native:vndk_private) Option makes it possible to use libbacktrace only when VNDK is not enabled. Signed-off-by: Tapani Pälli <[email protected]> Reviewed-by: Jordan Justen <[email protected]>
* gallium/u_tests: use a compute-only context to test GCN compute ringMarek Olšák2019-02-261-5/+3
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* gallium/auxiliary/vl: Fix duplicate symbol build errors.Vinson Lee2019-02-222-6/+6
| | | | | | | | | | | | | | | | | | CXXLD gallium_dri.la duplicate symbol _compute_shader_video_buffer in: ../../../../src/gallium/auxiliary/.libs/libgalliumvl.a(libgalliumvl_la-vl_compositor.o) ../../../../src/gallium/auxiliary/.libs/libgalliumvl.a(libgalliumvl_la-vl_compositor_cs.o) duplicate symbol _compute_shader_weave in: ../../../../src/gallium/auxiliary/.libs/libgalliumvl.a(libgalliumvl_la-vl_compositor.o) ../../../../src/gallium/auxiliary/.libs/libgalliumvl.a(libgalliumvl_la-vl_compositor_cs.o) duplicate symbol _compute_shader_rgba in: ../../../../src/gallium/auxiliary/.libs/libgalliumvl.a(libgalliumvl_la-vl_compositor.o) ../../../../src/gallium/auxiliary/.libs/libgalliumvl.a(libgalliumvl_la-vl_compositor_cs.o) Fixes: 9364d66cb7f7 ("gallium/auxiliary/vl: Add video compositor compute shader render") Signed-off-by: Vinson Lee <[email protected]> Reviewed-by: Emil Velikov <[email protected]> Reviewed-by: James Zhu <[email protected]>
* tgsi: don't set tgsi_info::uses_bindless_images for constbufs and hw atomicsMarek Olšák2019-02-221-1/+3
| | | | | | | | This might have decreased performance for radeonsi/tgsi, because most most shaders claimed they used bindless. Cc: 18.3 19.0 <[email protected]> Reviewed-by: Ilia Mirkin <[email protected]>
* iris: Initial commit of a new 'iris' driver for Intel Gen8+ GPUs.Kenneth Graunke2019-02-213-1/+29
| | | | | | | | | | | | | | | This commit introduces a new Gallium driver for Intel Gen8+ GPUs, named 'iris_dri.so' after the hardware. Developed by: - Kenneth Graunke (overall driver) - Dave Airlie (shaders, conditional render, overflow query, Gen8 port) - Chris Wilson (fencing, pinned memory, ...) - Jordan Justen (compute shaders) - Jason Ekstrand (image load store) - Caio Marcelo de Oliveira Filho (tessellation control passthrough) - Rafael Antognolli (auxiliary buffer fixes) - The rest of the i965 contributors and the Mesa community
* gallium/auxiliary/vl: Fix transparent issue on compute shader with rgbaJames Zhu2019-02-211-10/+7
| | | | | | | | | | | Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=109646 Problem 1,4: they are caused by imcomplete blend comute shader implementation. So Reverts rgba back to frament shader. Fixes: 9364d66cb7f7 (Add video compositor compute shader render) Signed-off-by: James Zhu <[email protected]> Reviewed-by: Leo Liu <[email protected]> Tested-by: Bruno Milreu <[email protected]>
* gallium/u_upload_mgr: allow use of FLUSH_EXPLICIT with persistent mappingsMarek Olšák2019-02-202-6/+31
| | | | | | | for radeonsi Reviewed-by: Nicolai Hähnle <[email protected]> Tested-by: Dieter Nützel <[email protected]>
* gallium/u_threaded: always unmap const_uploaderMarek Olšák2019-02-201-0/+1
| | | | | | | | radeonsi will require this. It's a no-op for drivers supporting persistent mappings. Reviewed-by: Nicolai Hähnle <[email protected]> Tested-by: Dieter Nützel <[email protected]>
* gallium/auxiliary/vl: Add video compositor compute shader renderJames Zhu2019-02-152-28/+83
| | | | | | | | Add compute shader initilization, assign and cleanup in vl_compositor API. Set video compositor compute shader render as default when pipe support it. Signed-off-by: James Zhu <[email protected]> Reviewed-by: Christian König <[email protected]>
* gallium/auxiliary/vl: Add compute shader to support video compositor renderJames Zhu2019-02-155-0/+469
| | | | | | | Add compute shader to support video compositor render. Signed-off-by: James Zhu <[email protected]> Acked-by: Christian König <[email protected]>
* gallium/auxiliary/vl: Rename csc_matrix and increase its size.James Zhu2019-02-153-7/+7
| | | | | | | | Rename csc_matrix to shader_params, and increase shader_params size to store more constants for compute shader, Signed-off-by: James Zhu <[email protected]> Reviewed-by: Christian König <[email protected]>
* gallium/auxiliary/vl: Split vl_compositor graphic shaders from vl_compositor APIJames Zhu2019-02-155-688/+821
| | | | | | | | Split vl_compositor graphic shaders from vl_compositor API in order to share vl_compositor API with vl_compositor compute shader later. Signed-off-by: James Zhu <[email protected]> Reviewed-by: Christian König <[email protected]>
* gallium/auxiliary/vl: Move dirty define to header fileJames Zhu2019-02-152-9/+8
| | | | | | | Move dirty define to header file to share with compute shader. Signed-off-by: James Zhu <[email protected]> Reviewed-by: Christian König <[email protected]>
* gallium/aux: add PIPE_CAP_MAX_VARYINGS to u_screenAlok Hota2019-02-131-0/+3
| | | | | | | | Allows drivers using `u_pipe_screen_get_param_defaults` to use a fallback value for the new pipe cap. Default value of 8 based on GL 2.1 MAX_VARYING_FLOATS Reviewed-by: Eric Anholt <[email protected]>
* gallium/u_threaded: fix EXPLICIT_FLUSH for flush offsets > 0Marek Olšák2019-02-111-1/+2
| | | | | Cc: 18.3 19.0 <[email protected]> Reviewed-by: Nicolai Hähnle <[email protected]>
* kmsro: Silence warning if missingAlyssa Rosenzweig2019-02-081-1/+0
| | | | | | | | | | | | | | Regardless of whether the build uses kmsro, kmsro is the default driver descriptor when the static loader is used. Thus, in an edge case where the static loader is used, no static targets are loaded, and kmsro is not compiled, a spurious warning is printed. There's no harm in executing the stub function in this case, but it's not "an error" to not have kmsro in the build; the driver missing warning should not printed kmsro. Signed-off-by: Alyssa Rosenzweig <[email protected]> Reviewed-by: Eric Anholt <[email protected]> Reviewed-by: Karol Herbst <[email protected]>
* gallium: Add a PIPE_CAP_NIR_COMPACT_ARRAYS capability bit.Kenneth Graunke2019-02-051-0/+1
| | | | | | | | | Iris would like to use compact arrays for tesslevels and clip/cull distances. radeonsi will likely want to switch to these at some point, since it'll be necessary for GL_ARB_gl_spirv support, but it's not ready for them just yet. Reviewed-by: Timothy Arceri <[email protected]>
* nir: Move V3D's "the shader was TGSI, ignore FS output types" flag to NIR.Eric Anholt2019-02-051-0/+3
| | | | | | | | | | | | | | Ken's rework of mesa/st builtins to NIR means that we'll have more NIR shaders with color output types that are mismatched with the render target types. Since this is behavior that GLSL doesn't require, add it as a shader_info option so the driver can know that it needs to ignore the FS output's base type in favor of the actual render target's. This prevents needing additional variants in several mesa/st paths (clear, pbo upload, pbo download), given that the driver already has to handle the variants for any TGSI being passed to it (from u_blitter, for example). Reviewed-by: Rob Clark <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]>
* panfrost: Initial stub for Panfrost driverAlyssa Rosenzweig2019-02-053-0/+31
| | | | | | | | | | | | | This patch adds an initial stub for the Gallium driver, containing simple screen functions and the majority of the driver headers but no actual functionality. It further adds the winsys glue for linking in this stub driver via kmsro on Rockchip/Amlogic boards. Signed-off-by: Alyssa Rosenzweig <[email protected]> Acked-by: Jason Ekstrand <[email protected]> Acked-by: Rob Clark <[email protected]> Acked-by: Eric Anholt <[email protected]> Acked-by: Emil Velikov <[email protected]>
* gallium: wrap u_screen in extern "C" for c++Dylan Baker2019-01-301-0/+8
| | | | | Some drivers (notabily SWR) are written in C++, and as such they need access to C headers with extern "C". So lets add that.
* Switch imx to kmsro and remove the imx winsysRob Herring2019-01-282-28/+0
| | | | | | | The kmsro winsys is equivalent to the imx winsys, so we can switch to it and remove the imx one. Signed-off-by: Rob Herring <[email protected]>
* pipe-loader: Fallback to kmsro driver when no matching driver name foundRob Herring2019-01-281-5/+8
| | | | | | | | | | If we can't find a driver matching by name, then use the kmsro driver. This removes the need for needing a driver descriptor for every possible KMS driver. Signed-off-by: Rob Herring <[email protected]> Reviewed-by: Alyssa Rosenzweig <[email protected]> Reviewed-by: Eric Anholt <[email protected]>
* pl111: Rename the pl111 driver to "kmsro".Eric Anholt2019-01-283-8/+8
| | | | | | | | | | | | The vc4 driver can do prime sharing to many different KMS-only devices, such as the various tinydrm drivers for SPI-attached displays. Rename the driver away from "pl111" to represent what it will actually support: various sorts of KMS displays with the renderonly layer used to attach a GPU. Reviewed-by: Eric Engestrom <[email protected]> Reviewed-by: Christian Gmeiner <[email protected]> Acked-by: Emil Velikov <[email protected]>
* Gallium: Add new CAPS to indicate whether a driver can switch SRGB writeGert Wollny2019-01-281-0/+2
| | | | | | | | | | | | | | Add a new cap that indicates whether the drivers supports enabling/disabling the conversion from linear space to sRGB for a framebuffer attachment. In Driver terms that this CAP indicates whether the driver can switcht between a linear and and a sRGB surface format for draw destinations witout changing the sourface itself. v2: rename CAP to DEST_SURFACE_SRGB_CONTROL to reflect its purpouse better (pointed out by Ilia Mirkin) Signed-off-by: Gert Wollny <[email protected]> Reviewed-by: Marek Olšák <[email protected]>
* freedreno: add renderonly scanoutJonathan Marek2019-01-261-1/+1
| | | | | | | | | | This allows creating a fd_screen with a renderonly object which will be used to allocated scanout resources. Signed-off-by: Jonathan Marek <[email protected]> Reviewed-by: Eric Anholt <[email protected]> [slight tweak to fix uninitialized 'prsc' in debug print] Signed-off-by: Rob Clark <[email protected]>
* gallium: Make sure we return is_unorm/is_snorm for compressed formats.Eric Anholt2019-01-254-24/+36
| | | | | | | | | | | | | | | The util helpers were looking for a non-void channels in a non-mixed format and returning its snorm/unorm state. However, compressed formats don't have non-void channels, so they always returned false. V3D wants to use util_format_is_[su]norm for its border color clamping workarounds, so fix the functions to return the right answer for these. This now means that we ignore .is_mixed. I could retain the is_mixed check, but it doesn't seem like a useful feature -- the only code I could find that might care is freedreno's blit, which has some notes about how things are wonky in this area anyway. Reviewed-by: <Roland Scheidegger [email protected]>
* gallium: Fix comment about possible colorspaces.Eric Anholt2019-01-251-1/+1
| | | | | | Two typos, and missing one of the colorspaces. Reviewed-by: <Roland Scheidegger [email protected]>
* gallivm: Return true from arch_rounding_available() if NEON is availableMatt Turner2019-01-241-1/+3
| | | | | | | | LLVM uses the single instruction "FRINTI" to implement llvm.nearbyint. Fixes the rounding tests of lp_test_arit. Bug: https://bugs.gentoo.org/665570 Reviewed-by: Roland Scheidegger <[email protected]>
* gallium: Add PIPE_CAP_GLSL_TESS_LEVELS_AS_INPUTSCaio Marcelo de Oliveira Filho2019-01-231-0/+3
| | | | | | | | | | | | In the Intel backend, it makes the most sense to treat gl_TessLevelInner and gl_TessLevelOuter as ordinary shader inputs. For Radeon, it makes more sense to treat them as system values which get special handling. We already have a compiler option for this, but the Iris driver will need a capability bit so we can set it appropriately. Reviewed-by: Kenneth Graunke <[email protected]> Reviewed-by: Jordan Justen <[email protected]>
* gallium/util: add util_format_snorm8_to_sint8 (from radeonsi)Marek Olšák2019-01-222-0/+43
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* gallium: add SINT formats to have exact counterparts to SNORM formatsMarek Olšák2019-01-221-0/+4
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* nir: add bit_size parameter to system values with multiple allowed bit sizesKarol Herbst2019-01-211-1/+1
| | | | | | | | | v2: add assert to verify we have at least one valid bit_size v3: fix use of load_front_face in nir_lower_two_sided_color and tgsi_to_nir Signed-off-by: Karol Herbst <[email protected]> Reviewed-by: Jason Ekstrand <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]>
* nir: replace more nir_load_system_value calls with builder functionsKarol Herbst2019-01-211-2/+1
| | | | | | Signed-off-by: Karol Herbst <[email protected]> Reviewed-by: Jason Ekstrand <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]>
* nir: rename nir_var_private to nir_var_shader_tempKarol Herbst2019-01-191-1/+1
| | | | | | | | Signed-off-by: Karol Herbst <[email protected]> Acked-by: Jason Ekstrand <[email protected]> Reviewed-by: Eric Anholt <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]>
* st/mesa: Optionally override RGB/RGBX dst alpha blend factorsKenneth Graunke2019-01-151-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | Intel's blending hardware does not properly return 1.0 for destination alpha for RGBX formats; it requires the factors to be overridden to either zero or one. Broadcom vc4 and v3d also could use this override. While overriding these factors is safe in general, Nouveau and Radeon would prefer not to. Their blending hardware already returns correct values for RGB/RGBX formats, and would like to avoid the resulting per-buffer blending and independent blend factors (rgb != a) since it can cause additional overhead. I considered simply handling this in the driver, but it's not as nice. pipe_blend_state doesn't have any format information, so we'd need the hardware blend state to depend on both pipe_blend_state and pipe_framebuffer_state. Furthermore, Intel GPUs don't have a native RGBX_SNORM format, so I avoid exposing one, which makes Gallium fall back to RGBA_SNORM. The pipe_surfaces we get in the driver have an RGBA format, making it impossible to tell that there shouldn't be an alpha channel. One could argue that st not handling it in that case is a bug. To work around this, we'd have to expose RGBX pipe formats, mapped to RGBA hardware formats, and add format swizzling special cases. All doable, but it ends up being more code than I'd like. st_atom_blend already has access to the right information and it's trivial to accomplish there, so we just add a cap bit and do that. Reviewed-by: Marek Olšák <[email protected]> Reviewed-by: Eric Anholt <[email protected]>
* gallium: Add the ability to query a single pipeline statistics counterKenneth Graunke2019-01-151-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Gallium historically has treated pipeline statistics queries as a single query, PIPE_QUERY_PIPELINE_STATISTICS, which returns a block of 11 values. This was originally patterned after the D3D1x API. Much later, Brian introduced an OpenGL extension that exposed these counters - but it exposes 11 separate queries, each of which returns a single value. Today, st/mesa simply queries all 11 values, and returns a single value. While pipeline statistics counters aren't typically performance critical, this is still not a great fit. A D3D1x->GL translator might request all 11 counters by creating 11 separate GL queries...which Gallium would map to reads of all 11 values each time, resulting in a total 121 counter reads. That's not ideal. This patch adds a new cap, PIPE_CAP_QUERY_PIPELINE_STATISTICS_SINGLE, and corresponding query type PIPE_QUERY_PIPELINE_STATISTICS_SINGLE. When calling create_query(), q->index should be set to one of the PIPE_STAT_QUERY_* enums to select a counter. Unlike the block query, this returns the value in pipe_query_result::u64 (as it's a single value) instead of the pipe_query_data_pipeline_statistics group. We update st/mesa to expose ARB_pipeline_statistics_query if either capability is set, preferring the new SINGLE variant when available. Thanks to Roland, Ilia, and Marek for helping me sort this out. Reviewed-by: Marek Olšák <[email protected]> Reviewed-by: Tapani Pälli <[email protected]>
* st/mesa: don't leak pipe_surface if pipe_context is not currentMarek Olšák2019-01-091-0/+19
| | | | | | | | | | We have found some pipe_surface leaks internally. This is the same code as surface_destroy in radeonsi. Ideally, surface_destroy would be in pipe_screen. Cc: 18.3 <[email protected]> Reviewed-by: Brian Paul <[email protected]>
* nir: rename global/local to private/function memoryKarol Herbst2019-01-081-1/+1
| | | | | | | | | | | | | | | | | | the naming is a bit confusing no matter how you look at it. Within SPIR-V "global" memory is memory accessible from all threads. glsl "global" memory normally refers to shader thread private memory declared at global scope. As we already use "shared" for memory shared across all thrads of a work group the solution where everybody could be happy with is to rename "global" to "private" and use "global" later for memory usually stored within system accessible memory (be it VRAM or system RAM if keeping SVM in mind). glsl "local" memory is memory only accessible within a function, while SPIR-V "local" memory is memory accessible within the same workgroup. v2: rename local to function as well v3: rename vtn_variable_mode_local as well Signed-off-by: Karol Herbst <[email protected]> Reviewed-by: Jason Ekstrand <[email protected]>
* glsl_type: Add support for explicitly laid out matrices and arraysJason Ekstrand2019-01-081-2/+2
| | | | | | | | | | | | | | | | | | | | | | SPIR-V allows for matrix and array types to be decorated with explicit byte stride decorations and matrix types to be decorated row- or column-major. This commit adds support to glsl_type to encode this information. Because this doesn't work nicely with std430 and std140 alignments, we add asserts to ensure that we don't use any of the std430 or std140 layout functions with explicitly laid out types. In SPIR-V, the layout information for matrices is applied to the parent struct member instead of to the matrix type itself. However, this is gets rather clumsy when you're walking derefs trying to compute offsets because, the moment you hit a matrix, you have to crawl back the deref chain and find the struct. Instead, we take the same path here as we've taken in spirv_to_nir and put the decorations on the matrix type itself. This also subtly adds support for strided vector types. These don't come up in SPIR-V directly but you can get one as the result of taking a column from a row-major matrix or a row from a column-major matrix. Reviewed-by: Alejandro Piñeiro <[email protected]>
* tgsi/scan: correctly walk instructions in tgsi_scan_tess_ctrl()Timothy Arceri2019-01-021-29/+43
| | | | | | | | | | | | The previous code used a do while loop and continues after walking a nested loop/if-statement. This means we end up evaluating the last instruction from the nested block against the while condition and potentially exit early if it matches the exit condition of the outer block. Fixes: 386d165d8d09 ("tgsi/scan: add a new pass that analyzes tess factor writes") Reviewed-by: Marek Olšák <[email protected]>
* tgsi/scan: fix loop exit point in tgsi_scan_tess_ctrl()Timothy Arceri2019-01-021-1/+1
| | | | | | | | | | | | | This just happened not to crash/assert because all loops have at least 1 if-statement and due to a second bug we end up matching the same ENDIF to exit both the iteration over the if-statment and the loop. The second bug is fixed in the following patch. Fixes: 386d165d8d09 ("tgsi/scan: add a new pass that analyzes tess factor writes") Reviewed-by: Marek Olšák <[email protected]>
* gallium: add PIPE_CAP_TGSI_ATOMFADD to indicate supportIlia Mirkin2018-12-261-0/+1
| | | | | | | | ATOMFADD is a little special -- make drivers have to specify it explicitly. Signed-off-by: Ilia Mirkin <[email protected]> Reviewed-by: Marek Olšák <[email protected]>
* tgsi: add ATOMFADD operationIlia Mirkin2018-12-264-1/+7
| | | | | | | | This is supported by at least NVIDIA hardware, and exposeable via GL extensions. Signed-off-by: Ilia Mirkin <[email protected]> Reviewed-by: Marek Olšák <[email protected]>
* gallium/ttn: Fix setup of outputs_written.Eric Anholt2018-12-261-1/+1
| | | | | | | | | We need a 64-bit value, otherwise we only handle the low 32, and happen to sign-extend to claim to write all varying slots if VARYING_SLOT_VAR2 was used. Fixes: 4d0b2c7aaac3 ("ttn: Update shader->info as we generate code.") Reviewed-by: Rob Clark <[email protected]>
* gallivm: abort when trying to use non-existing intrinsicRoland Scheidegger2018-12-211-0/+10
| | | | | | | | | | | Whenever llvm removes an intrinsic (we're using), we're hitting segfaults due to llvm doing calls to address 0 in the jitted code instead. However, Jose figured out we can actually detect this with LLVMGetIntrinsicID(), so use this to abort, so we don't have to wonder what got broken. (Of course, someone still needs to fix the code to no longer use this intrinsic.) Reviewed-by: Jose Fonseca <[email protected]>
* gallivm: don't use pavg.b intrinsic on llvm >= 6.0Roland Scheidegger2018-12-211-9/+46
| | | | | | | | | | | | | | | | | | | | | This intrinsic disppeared with llvm 6.0, using it ends up in segfaults (due to llvm issuing call to NULL address in the jited shaders). Add code doing the same thing as the autoupgrade code in llvm so it can be matched and replaced back with a pavgb. While here, also improve lp_test_format, so it tests both with and without cache (as it was, it tested the cache versions only, whereas cache is actually disabled in llvmpipe, and in any case even with it enabled vertex and geometry shaders wouldn't use it). (Although at least for the unorm8 uncached fetch, the code is still quite different to what llvmpipe is using, since that would use unorm8x16 type, whereas the test code is using unorm8x4 type, hence disabling some intrinsic paths.) Fixes: 6f4083143bb8 ("gallivm: use llvm jit code for decoding s3tc") Reviewed-by: Jose Fonseca <[email protected]> Tested-by: Michel Dänzer <[email protected]>
* gallivm: use llvm jit code for decoding s3tcRoland Scheidegger2018-12-207-383/+2239
| | | | | | | | | | | | This is (much) faster than using the util fallback. (Note that there's two methods here, one would use a cache, similar to the existing code (although the cache was disabled), except the block decode is done with jit code, the other directly decodes the required pixels. For now don't use the cache (being direct-mapped is suboptimal, but it's difficult to come up with something better which doesn't have too much overhead.) Reviewed-by: Jose Fonseca <[email protected]>
* ddebug: always flush when requested, even when hang detection is disabledNicolai Hähnle2018-12-191-0/+2
| | | | Reviewed-by: Marek Olšák <[email protected]>
* ddebug: simplify watchdog loop and fix crash in the no-timeout caseNicolai Hähnle2018-12-193-73/+52
| | | | | | | | | | | | | | | | | | | | | | | | | | The following race condition could occur in the no-timeout case: API thread Gallium thread Watchdog ---------- -------------- -------- dd_before_draw u_threaded_context draw dd_after_draw add to dctx->records signal watchdog dump & destroy record execute draw dd_after_draw_async use-after-free! Alternatively, the same scenario would assert in a debug build when destroying the record because record->driver_finished has not signaled. Fix this and simplify the logic at the same time by - handing the record pointers off to the watchdog thread *before* each draw call and - waiting on the driver_finished fence in the watchdog thread Reviewed-by: Marek Olšák <[email protected]>
* nir: Rename Boolean-related opcodes to include 32 in the nameJason Ekstrand2018-12-161-10/+10
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This is a squash of a bunch of individual changes: nir/builder: Generate 32-bit bool opcodes transparently nir/algebraic: Remap Boolean opcodes to the 32-bit variant Use 32-bit opcodes in the NIR producers and optimizations Generated with a little hand-editing and the following sed commands: sed -i 's/nir_op_ball_fequal/nir_op_b32all_fequal/g' **/*.c sed -i 's/nir_op_bany_fnequal/nir_op_b32any_fnequal/g' **/*.c sed -i 's/nir_op_ball_iequal/nir_op_b32all_iequal/g' **/*.c sed -i 's/nir_op_bany_inequal/nir_op_b32any_inequal/g' **/*.c sed -i 's/nir_op_\([fiu]lt\)/nir_op_\132/g' **/*.c sed -i 's/nir_op_\([fiu]ge\)/nir_op_\132/g' **/*.c sed -i 's/nir_op_\([fiu]ne\)/nir_op_\132/g' **/*.c sed -i 's/nir_op_\([fiu]eq\)/nir_op_\132/g' **/*.c sed -i 's/nir_op_\([fi]\)ne32g/nir_op_\1neg/g' **/*.c sed -i 's/nir_op_bcsel/nir_op_b32csel/g' **/*.c Use 32-bit opcodes in the NIR back-ends Generated with a little hand-editing and the following sed commands: sed -i 's/nir_op_ball_fequal/nir_op_b32all_fequal/g' **/*.c sed -i 's/nir_op_bany_fnequal/nir_op_b32any_fnequal/g' **/*.c sed -i 's/nir_op_ball_iequal/nir_op_b32all_iequal/g' **/*.c sed -i 's/nir_op_bany_inequal/nir_op_b32any_inequal/g' **/*.c sed -i 's/nir_op_\([fiu]lt\)/nir_op_\132/g' **/*.c sed -i 's/nir_op_\([fiu]ge\)/nir_op_\132/g' **/*.c sed -i 's/nir_op_\([fiu]ne\)/nir_op_\132/g' **/*.c sed -i 's/nir_op_\([fiu]eq\)/nir_op_\132/g' **/*.c sed -i 's/nir_op_\([fi]\)ne32g/nir_op_\1neg/g' **/*.c sed -i 's/nir_op_bcsel/nir_op_b32csel/g' **/*.c Reviewed-by: Eric Anholt <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]> Tested-by: Bas Nieuwenhuizen <[email protected]>
generated by cgit v1.2.3 (git 2.39.1) at 2024-12-18 10:53:21 +0000