| Commit message (Collapse) | Author | Age | Files | Lines |
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Reviewed-by: Marek Olšák <[email protected]>
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Reviewed-by: Marek Olšák <[email protected]>
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Commit e1af20f18a86f52a9640faf2d4ff8a71b0a4fa9b changed the shader_info
from being embedded into being just a pointer. The idea was that
sharing the shader_info between NIR and GLSL would be easier if it were
a pointer pointing to the same shader_info struct. This, however, has
caused a few problems:
1) There are many things which generate NIR without GLSL. This means
we have to support both NIR shaders which come from GLSL and ones
that don't and need to have an info elsewhere.
2) The solution to (1) raises all sorts of ownership issues which have
to be resolved with ralloc_parent checks.
3) Ever since 00620782c92100d77c660f9783504c6d80fa1d58, we've been
using nir_gather_info to fill out the final shader_info. Thanks to
cloning and the above ownership issues, the nir_shader::info may not
point back to the gl_shader anymore and so we have to do a copy of
the shader_info from NIR back to GLSL anyway.
All of these issues go away if we just embed the shader_info in the
nir_shader. There's a little downside of having to copy it back after
calling nir_gather_info but, as explained above, we have to do that
anyway.
Acked-by: Timothy Arceri <[email protected]>
Reviewed-by: Kenneth Graunke <[email protected]>
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I wrote this code with reference to pixman, though I've only decided to
cover Linux (what I'm testing) and Android (seems obvious enough). Linux
has getauxval() as a cleaner interface to the /proc entry, but it's more
glibc-specific and I didn't want to add detection for that.
This will be used to enable NEON at runtime on ARMv6 builds of vc4.
v2: Actually initialize the temp vars in the Android path (noticed by
daniels)
v3: Actually pull in the cpufeatures library (change by robher).
Use O_CLOEXEC. Break out of the loop when we find our feature.
v4: Drop VFP code, which was confused about what it was detecting and not
actually used yet.
Reviewed-by: Grazvydas Ignotas <[email protected]>
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To restart interrupted system calls, use drmIoctl.
Fixes: 848b49b288f ("gallium: add renderonly library")
CC: <[email protected]>
Suggested-by: Emil Velikov <[email protected]>
Signed-off-by: Philipp Zabel <[email protected]>
Reviewed-by: Eric Engestrom <[email protected]>
Reviewed-by: Christian Gmeiner <[email protected]>
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The renderonly_scanout holds a reference on its prime pipe resource,
which should be released when it is destroyed. If it was created by
renderonly_create_kms_dumb_buffer_for_resource, the dumb BO also has
to be destroyed.
Fixes: 848b49b288f ("gallium: add renderonly library")
CC: <[email protected]>
Signed-off-by: Philipp Zabel <[email protected]>
Reviewed-by: Emil Velikov <[email protected]>
Reviewed-by: Christian Gmeiner <[email protected]>
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prime_fd is only used to transfer the scanout buffer to the GPU inside
renderonly_create_kms_dumb_buffer_for_resource. It should be closed
immediately to avoid leaking the DMA-BUF file handle.
Fixes: 848b49b288f ("gallium: add renderonly library")
CC: <[email protected]>
Signed-off-by: Philipp Zabel <[email protected]>
Reviewed-by: Emil Velikov <[email protected]>
Reviewed-by: Christian Gmeiner <[email protected]>
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val_bool and val_int are in a union. val_bool gets the first byte, which
happens to work on LE when setting via the int, but breaks on BE. By
setting the value properly, we are able to use DRI3 on BE architectures.
Tested by running glxgears with a NV34 in a G5 PPC.
Signed-off-by: Ilia Mirkin <[email protected]>
Cc: [email protected]
[Emil Velikov: squash the vmwgfx hunk]
Reviewed-by: Emil Velikov <[email protected]>
Reviewed-by: Michel Dänzer <[email protected]>
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v2: just do indexing with swizzle[i]
Reviewed-by: Nicolai Hähnle <[email protected]>
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We only need to construct the debug message if the mapped_sync flag is set.
This should make the function faster since the flag is usually false.
Reviewed-by: Charmaine Lee <[email protected]>
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Trivial.
Reviewed-by: Charmaine Lee <[email protected]>
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Remove trailing whitespace, fix formatting, etc. Trivial.
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Signed-off-by: Samuel Pitoiset <[email protected]>
Reviewed-by: Nicolai Hähnle <[email protected]>
Reviewed-by: Marek Olšák <[email protected]>
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No longer used.
Signed-off-by: Samuel Pitoiset <[email protected]>
Reviewed-by: Nicolai Hähnle <[email protected]>
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typically useful for hw bring-up
Reviewed-by: Nicolai Hähnle <[email protected]>
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min/max_index are typically hints for the u_vbuf module, not the driver.
Reviewed-by: Ilia Mirkin <[email protected]>
Reviewed-by: Brian Paul <[email protected]>
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Reviewed-by: Marek Olšák <[email protected]>
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Flush the HUD value streams to the dump files after every newline.
v2: check that fopen succeeded (Julien)
Reviewed-and-Tested-by: Julien Isorce <[email protected]>
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Fixes the following Clang warning.
draw/draw_pipe_wide_line.c:48:38: warning: unused function 'wideline_stage' [-Wunused-function]
static inline struct wideline_stage *wideline_stage( struct draw_stage *stage )
^
1 warning generated.
v2: - remove commented code (Roland Scheidegger)
v3: - remove half_line_width in the struct
Signed-off-by: Samuel Pitoiset <[email protected]>
Reviewed-by: Roland Scheidegger <[email protected]>
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Fixes the following Clang warning.
draw/draw_pipe_vbuf.c:102:1: warning: unused function 'overflow' [-Wunused-function]
overflow( void *map, void *ptr, unsigned bytes, unsigned bufsz )
^
1 warning generated.
Signed-off-by: Samuel Pitoiset <[email protected]>
Reviewed-by: Roland Scheidegger <[email protected]>
Reviewed-by: Brian Paul <[email protected]>
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radeonsi added stricter checking for correct swizzles in debug builds.
Reported-by: Michel Dänzer <[email protected]>
Fixes: 4cf29427770f ("radeonsi: support 64-bit system values")
Reviewed-by: Marek Olšák <[email protected]>
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Silence warnings about using possibly uninitialized values.
Signed-off-by: Brian Paul <[email protected]>
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To work with addr2line.sh we also need the relative offset within the
DSO. And addr2line.sh gets confused by the leading stackframe number.
Signed-off-by: Rob Clark <[email protected]>
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Signed-off-by: Rob Clark <[email protected]>
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Fixes: 70c272004f ("gallium/util: libunwind support")
Signed-off-by: Rob Clark <[email protected]>
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Fixes: 70c272004f72 ("gallium/util: libunwind support")
Signed-off-by: Emil Velikov <[email protected]>
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v2: add documentation (Nicolai)
Signed-off-by: Ilia Mirkin <[email protected]>
Signed-off-by: Nicolai Hähnle <[email protected]>
Reviewed-by: Marek Olšák <[email protected]>
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v2 (Nicolai):
- BALLOT isn't per-channel
- expand the documentation (also for VOTE_*)
v3:
- only BALLOT returns a 64-bit lanemask (Boyan)
- relax the requirement on READ_INVOC: the invocation number to read
from must be uniform within a sub-group. This matches the
GL_ARB_shader_ballot spect (and the v_readlane instruction of AMD
GCN)
v4:
- hopefully really fix the doc of VOTE_* returns (Ilia)
Signed-off-by: Ilia Mirkin <[email protected]>
Signed-off-by: Nicolai Hähnle <[email protected]>
Reviewed-by: Marek Olšák <[email protected]> (v2)
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Reviewed-by: Nicolai Hähnle <[email protected]>
Reviewed-by: Brian Paul <[email protected]>
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Some other changes needed here.
Reviewed-by: Nicolai Hähnle <[email protected]>
Reviewed-by: Brian Paul <[email protected]>
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It's kinda sad that (a) we don't have debug_backtrace support on !X86
and that (b) we re-invent our own crude backtrace support in the first
place. If available, use libunwind instead. The backtrace format is
based on what xserver and weston use, since it is nice not to have to
figure out a different format.
Signed-off-by: Rob Clark <[email protected]>
Acked-by: Nicolai Hähnle <[email protected]>
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Prep work for next patch.
Ideally 'struct debug_stack_frame' would be opaque, but it is embedded
in a bunch of places. But at least we can treat it opaquely.
Signed-off-by: Rob Clark <[email protected]>
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lp_build_emit_fetch() is useful when the source type can be
infered from the instruction opcode.
However, for bindless samplers/images we can't do that easily
because tgsi_opcode_infer_src_type() returns TGSI_TYPE_FLOAT for
TEX instructions, while we need TGSI_TYPE_UNSIGNED64 if the
resource register is bindless.
Signed-off-by: Samuel Pitoiset <[email protected]>
Reviewed-by: Marek Olšák <[email protected]>
Reviewed-by: Nicolai Hähnle <[email protected]>
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Neved used.
v2: gallivm: rename "pred" -> "exec_mask"
etnaviv: remove the cap
gallium: fix tgsi_instruction::Padding
Reviewed-by: Nicolai Hähnle <[email protected]>
Reviewed-by: Roland Scheidegger <[email protected]>
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GFX9 hangs instead of writing VM faults to dmesg.
Reviewed-by: Nicolai Hähnle <[email protected]>
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Reviewed-by: Marek Olšák <[email protected]>
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Signed-off-by: Ilia Mirkin <[email protected]>
Reviewed-by: Nicolai Hähnle <[email protected]>
Reviewed-by: Samuel Pitoiset <[email protected]>
Reviewed-by: Marek Olšák <[email protected]>
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/home/marek/dev/mesa-main/src/gallium/auxiliary/gallivm/lp_bld_sample_soa.c:3598:
warning: 'level' may be used uninitialized in this function [-Wmaybe-uninitialized]
out1 = lp_build_cmp(&leveli_bld, PIPE_FUNC_GREATER, level, last_level);
^
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Reviewed-by: Nicolai Hähnle <[email protected]>
Tested-by: Edmondo Tommasina <[email protected]>
Reviewed-by: Samuel Pitoiset <[email protected]>
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Reviewed-by: Nicolai Hähnle <[email protected]>
Reviewed-by: Dave Airlie <[email protected]>
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This is simpler for drivers.
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pointed out by clang (stored value never read)
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pointed out by clang (stored value never read)
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expectations.
Currently the GLSL-to-TGSI translation pass assumes it can use
floating point source modifiers on the UCMP instruction. See the bug
report linked below for an example where an unrelated change in the
GLSL built-in lowering code for atan2 (e9ffd12827ac11a2d2002a42fa8eb1)
caused the generation of floating-point ir_unop_neg instructions
followed by ir_triop_csel, which is translated into UCMP with a negate
modifier on back-ends with native integer support.
Allowing floating-point source modifiers on an integer instruction
seems like rather dubious design for a transport IR, since the same
semantics could be represented as a sequence of MOV+UCMP instructions
instead, but supposedly this matches the expectations of TGSI
back-ends other than tgsi_exec, and the expectations of the DX10 API.
I take no responsibility for future headaches caused by this
inconsistency.
Fixes a regression of piglit glsl-fs-tan-1 on softpipe introduced by
the above-mentioned glsl front-end commit. Even though the commit
that triggered the regression doesn't seem to have made it to any
stable branches yet, this might be worth back-porting since I don't
see any reason why the bug couldn't have been reproduced before that
point.
Suggested-by: Roland Scheidegger <[email protected]>
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=99817
Reviewed-by: Roland Scheidegger <[email protected]>
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for better code generation in radeonsi
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Signed-off-by: Samuel Pitoiset <[email protected]>
Reviewed-by: Marek Olšák <[email protected]>
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The NIR story on conversion opcodes is a mess. We've had way too many
of them, naming is inconsistent, and which ones have explicit sizes was
sort-of random. This commit re-organizes things and makes them all
consistent:
- All non-bool conversion opcodes now have the explicit size in the
destination and are named <src_type>2<dst_type><size>.
- Integer <-> integer conversion opcodes now only come in i2i and u2u
forms (i2u and u2i have been removed) since the only difference
between the different integer conversions is whether or not they
sign-extend when up-converting.
- Boolean conversion opcodes all have the explicit size on the bool and
are named <src_type>2<dst_type>.
Making things consistent also allows nir_type_conversion_op to be moved
to nir_opcodes.c and auto-generated using mako. This will make adding
int8, int16, and float16 versions much easier when the time comes.
Reviewed-by: Eric Anholt <[email protected]>
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Fixes the following segmentation fault:
signal SIGSEGV: invalid address (fault address: 0x0)
frame #0: 0x00007fffe718e117 radeonsi_dri.so hud_draw_background_quad hud_context.c:170
167
168 assert(hud->bg.num_vertices + 4 <= hud->bg.max_num_vertices);
169
-> 170 vertices[num++] = (float) x1;
171 vertices[num++] = (float) y1;
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173 vertices[num++] = (float) x1;
(lldb) bt
* frame #0: 0x00007fffe718e117 radeonsi_dri.so`hud_draw_background_quad
frame #1: 0x00007fffe718f458 radeonsi_dri.so`hud_draw
frame #2: 0x00007fffe712967f radeonsi_dri.so`dri_flush
Signed-off-by: Marek Olšák <[email protected]>
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Just simply the description of the planes.
Signed-off-by: Christian König <[email protected]>
Reviewed-by: Mark Thompson <[email protected]>
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Same layout as NV12, but 16bit per channel instead of 8.
Signed-off-by: Christian König <[email protected]>
Reviewed-by: Mark Thompson <[email protected]>
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