summaryrefslogtreecommitdiffstats
path: root/src/gallium/auxiliary
Commit message (Collapse)AuthorAgeFilesLines
* gallium: Fix mismatched ifdef-guardsMichał Janiszewski2018-10-181-2/+2
| | | | | Signed-off-by: Michał Janiszewski <[email protected]> Reviewed-by: Emil Velikov <[email protected]>
* softpipe: dynamically allocate space for immediate constantsGert Wollny2018-10-182-5/+15
| | | | | | | | | | | | | | | The number of immediate constants was fixed and the size check was only done by means of an assertion. Given this a shader that emits more immediate constants would result in a memory corruption when mesa is build in release mode. Instead of using this fixed limit allocate the space dynamically, let it grow as needed, and also remove the unused ImmArray. Fixes: dEQP-GLES31.functional.ssbo.layout.random.arrays_of_arrays.1 Signed-off-by: Gert Wollny <[email protected]> Reviewed-by: Roland Scheidegger <[email protected]>
* gallium/ttn: Convert inputs and outputs to derefs of variables.Eric Anholt2018-10-151-60/+54
| | | | | | | | | | | This means that TTN shaders more closely resemble GTN shaders: they have inputs and outputs as variable derefs, with the variables having their .driver_location already set up for you. This will be useful for v3d to do input variable DCE in NIR, which we can't do when the TTN shaders never have a pre-nir_lower_io stage. Acked-by: Rob Clark <[email protected]>
* gallium/ttn: Fix the type of gl_FragDepth.Eric Anholt2018-10-151-0/+1
| | | | | | | | In TGSI we have a vec4 of which only .z is used, but for NIR we should be using a float the same as other NIR IR. We were already moving TGSI's .z to the .x channel. Acked-by: Rob Clark <[email protected]>
* gallium/u_transfer_helper: Add support for separate Z24/S8 as well.Kenneth Graunke2018-10-142-19/+55
| | | | | | | | | | | | | | | | u_transfer_helper already had code to handle treating packed Z32_S8 as separate Z32_FLOAT and S8_UINT resources, since some drivers can't handle that interleaved format natively. Other hardware needs depth and stencil as separate resources for all formats. For example, V3D3 needs this for 24-bit depth as well. This patch adds a new flag to lower all depth/stencils formats, and implements support for Z24_UNORM_S8_UINT. (S8_UINT_Z24_UNORM is left as an exercise to the reader, preferably someone who has access to a machine that uses that format.) Reviewed-by: Eric Anholt <[email protected]>
* gallium/format: Add a helper to combine separate Z24 and S8 stencil.Kenneth Graunke2018-10-142-0/+22
| | | | | | | This new function takes separate Z24 depth and S8 stencil sources, and packs them into a single combined Z24S8 buffer. Reviewed-by: Eric Anholt <[email protected]>
* gallium/auxiliary: Add util_format_get_depth_only() helper.Kenneth Graunke2018-10-141-0/+21
| | | | | | | This will be used by u_transfer_helper.c shortly, in order to split packed depth-stencil into separate resources. Reviewed-by: Eric Anholt <[email protected]>
* gallivm: Make it possible to disable some optimization shortcuts in release ↵Gert Wollny2018-10-064-21/+32
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | builds For testing it is of interest that all tests of dEQP pass, e.g. to test virglrenderer on a host only providing software rendering like in a CI. Hence make it possible to disable certain optimizations that make tests fail. While we are there also add some documentation to the flags to make it clear that this is opt-out. Setting the environment variable "GALLIVM_PERF=no_filter_hacks" can be used to make the following tests pass in release mode: dEQP-GLES2.functional.texture.mipmap.2d.affine.*_linear_* dEQP-GLES2.functional.texture.mipmap.cube.generate.* dEQP-GLES2.functional.texture.vertex.2d.filtering.*_mipmap_linear_* dEQP-GLES2.functional.texture.vertex.2d.wrap.* Related: https://bugs.freedesktop.org/show_bug.cgi?id=94957 v2: rename optimization disabling flag to 'safemath' and also move the nopt flag to the perf flags. v3: rename flag "safemath" to "no_filter_hacks" since safemath is usually associated with floating point operations (Roland) Signed-off-by: Gert Wollny <[email protected]> Reviewed-by: Roland Scheidegger <[email protected]>
* pipe-loader: add a dup() in pipe_loader_sw_probe_kmsEmil Velikov2018-10-032-2/+12
| | | | | | | | | | | | | | | | | The pipe_loader_release API closes the fd given, even if the pipe-loader should _not_ take ownership of it. With earlier commit we fixed pipe_loader_drm_probe_fd, and now with cover the final piece. Note that unlike the DRM case, here the caller _did_ forget to dup before using it ... most likely leading to all sorts of fun. Don't forget the close in the error path. Seems like the things are a bit leaky/asymmetrical with the semi-recent config work. But we can shave that yak another day ;-) Signed-off-by: Emil Velikov <[email protected]>
* pipe-loader: move dup(fd) within pipe_loader_drm_probe_fdEmil Velikov2018-10-034-17/+30
| | | | | | | | | | | | | | | | | | | | | | Currently pipe_loader_drm_probe_fd takes ownership of the fd given. To match that, pipe_loader_release closes it. Yet we have many instances which do not want the change of ownership, and thus duplicate the fd before passing it to the pipe-loader. Move the dup() within pipe-loader, explicitly document that and document all the cases through the codebase. A trivial git grep -2 pipe_loader_release makes things as obvious as it gets ;-) Cc: Leo Liu <[email protected]> Cc: Thomas Hellstrom <[email protected]> Cc: Axel Davy <[email protected]> Cc: Patrick Rudolph <[email protected]> Signed-off-by: Emil Velikov <[email protected]> Reviewed-by: Thomas Hellstrom <[email protected]> Reviewed-by: Axel Davy <[email protected]> (for nine)
* vl/dri3: do full teardown on screen_destroyEmil Velikov2018-10-031-1/+0
| | | | | | | | | | | Earlier commit added support for 'front_buffers', erroneously adding a return in vl_dri3_screen_destroy. Effectively leaking a lot of state. Fixes: 8d7ac0a4e4d ("vl/dri3: implement DRI3 BufferFromPixmap") Cc: Leo Liu <[email protected]> Cc: Christian König <[email protected]> Signed-off-by: Emil Velikov <[email protected]> Reviewed-by: Leo Liu <[email protected]>
* gallium/util: Clarify comment in util_init_thread_pinningMichel Dänzer2018-09-281-1/+4
| | | | | | | | | | As discussed in the review of the patch which added the comment: Nothing happens when a thread is created, because pthread_atfork doesn't affect creating threads. However, spawning a child process will likely crash. Reviewed-by: Marek Olšák <[email protected]>
* gallivm: ensure string is null-terminated instead of assert()ingEric Engestrom2018-09-251-3/+1
| | | | | Signed-off-by: Eric Engestrom <[email protected]> Reviewed-by: Dylan Baker <[email protected]>
* meson: Don't compile pipe loader with dri support when not using driDylan Baker2018-09-211-5/+5
| | | | | | | | | | | Corrects building glx as gallium-xlib without any dri targets. v2: - fix ugly formatting Fixes: 66c94b9313a697ce8f2b222f4ba353035e4b8726 ("meson: build gallium winsys for dri, null, and wrapper") Reviewed-by: Eric Engestrom <[email protected]>
* mesa/st: add force_compat_profile option to driconfigTimothy Arceri2018-09-181-0/+1
| | | | Reviewed-by: Marek Olšák <[email protected]>
* Revert "radeonsi: avoid syncing the driver thread in si_fence_finish"Timothy Arceri2018-09-181-8/+0
| | | | | | | | | | This reverts commit bc65dcab3bc48673ff6180afb036561a4b8b1119. This was manually reverted. Reverting stops the menu hanging in some id tech games such as RAGE and Wolfenstein The New Order. Reviewed-by: Marek Olšák <[email protected]> Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=107891
* gallium/util: don't let child processes inherit our thread affinityMarek Olšák2018-09-141-4/+32
| | | | v2: corrected the comment
* gallium/util: start with a random L3 cache index for AMD ZenMarek Olšák2018-09-141-4/+16
|
* vl/dri: add color depth to vl winsysLeo Liu2018-09-132-0/+2
| | | | | | | For VDPAU use later Signed-off-by: Leo Liu <[email protected]> Reviewed-by: Michel Dänzer <[email protected]>
* vl/dri3: add support for 10 bits formatLeo Liu2018-09-131-4/+25
| | | | | Signed-off-by: Leo Liu <[email protected]> Reviewed-by: Michel Dänzer <[email protected]>
* vl/dri: add 10 bits format supportsLeo Liu2018-09-132-10/+65
| | | | | | | v2: Tell B10G10R10X2 and R10G10B10X2 formats for different HW. Signed-off-by: Leo Liu <[email protected]> Reviewed-by: Michel Dänzer <[email protected]>
* gallium/u_inlines: remove the destroy variable in pipe_reference_describedMarek Olšák2018-09-101-6/+3
| | | | | Reviewed-by: Michel Dänzer <[email protected]> Tested-by: Dieter Nützel <[email protected]>
* gallium/u_inlines: improve pipe_reference_described perf for debug buildsMarek Olšák2018-09-101-4/+5
| | | | | Tested-by: Dieter Nützel <[email protected]> Reviewed-by: Michel Dänzer <[email protected]>
* gallium/auxiliary: don't dereference counters twice needlesslyMarek Olšák2018-09-101-7/+10
| | | | Tested-by: Dieter Nützel <[email protected]>
* gallium/u_inlines: normalize naming, use dst & src, style fixes (v2)Marek Olšák2018-09-101-47/+47
| | | | | | | v2: update comments Reviewed-by: Michel Dänzer <[email protected]> Tested-by: Dieter Nützel <[email protected]>
* util: Make util_context_thread_changed a no-op on Windows.Jose Fonseca2018-09-101-0/+2
| | | | | | | | | Spite using thrd_t types, these functions are wed to pthreads, and break Windows builds, because thrd_current() is not implemented there, as it's impossible to have an efficient thrd_current() implementation on Windows. Trivial.
* gallium: New cap PIPE_CAP_MAX_VERTEX_ELEMENT_SRC_OFFSET.Mathias Fröhlich2018-09-101-0/+3
| | | | | | | | | | | Introduce a new capability for the maximum value of pipe_vertex_element::src_offset. Initially just every driver backend returns the value previously set from _mesa_init_constants. So this shall end up in no functional change. Reviewed-by: Brian Paul <[email protected]> Reviewed-by: Roland Scheidegger <[email protected]> Signed-off-by: Mathias Fröhlich <[email protected]>
* st/mesa: throttle texture uploads if their memory usage goes beyond a limitMarek Olšák2018-09-072-0/+137
| | | | | This prevents radeonsi from running out of memory. It also increases texture upload performance by being nice to the kernel memory manager.
* gallium: add PIPE_CAP_MAX_TEXTURE_UPLOAD_MEMORY_BUDGETMarek Olšák2018-09-071-0/+1
|
* Revert "gallium/os_thread: simplify helper pipe_current_thread_get_time_nano"Marek Olšák2018-09-071-1/+5
| | | | | | This reverts commit 6d477bc5460eec14c6a0d047a0384c9ce5c7609b. It fixes the Windows build hopefully.
* gallium/u_threaded: implement set_context_param for thread pinning (v2)Marek Olšák2018-09-072-0/+41
| | | | | | | v2: - use set_context_param - set set_context_param even if the driver doesn't implement it Reviewed-by: Brian Paul <[email protected]>
* st/mesa: pin driver threads to a specific L3 cache on AMD Zen (v2)Marek Olšák2018-09-072-0/+46
| | | | | | v2: use set_context_param Reviewed-by: Brian Paul <[email protected]>
* gallium: add pipe_context::set_context_param for tuning perf on AMD Zen (v2)Marek Olšák2018-09-073-0/+38
| | | | | | | | | State trackers will not use the new param directly, but will instead use a helper in MakeCurrent that does the right thing. v2: rework the interface Reviewed-by: Brian Paul <[email protected]>
* gallium/os_thread: simplify helper pipe_current_thread_get_time_nanoMarek Olšák2018-09-071-5/+1
| | | | Reviewed-by: Brian Paul <[email protected]>
* gallium/u_cpu_detect: get the number of cores per L3 cache for AMD ZenMarek Olšák2018-09-072-0/+25
| | | | Reviewed-by: Brian Paul <[email protected]>
* gallium/u_cpu_detect: fix parsing the CPU familyMarek Olšák2018-09-071-1/+2
| | | | | | | | | | According to: https://support.amd.com/TechDocs/54945_PPR_Family_17h_Models_00h-0Fh.pdf Also Intel: https://www.microbe.cz/docs/CPUID.pdf Reviewed-by: Brian Paul <[email protected]>
* gallium/u_cpu_detect: fix a race condition on initializationMarek Olšák2018-09-071-8/+10
| | | | Reviewed-by: Brian Paul <[email protected]>
* move u_math to src/utilDylan Baker2018-09-0713-902/+9
| | | | | | | | | | | | | | | Currently we have two sets of functions for bit counts, one in gallium and one in core mesa. The ones in core mesa are header only in many cases, since they reduce to "#define _mesa_bitcount popcount", but they provide a fallback implementation. This is important because 32bit msvc doesn't have popcountll, just popcount; so when nir (for example) includes the core mesa header it doesn't (and shouldn't) link with core mesa. To fix this we'll promote the version out of gallium util, then replace the core mesa uses with the util version, since nir (and other non-core mesa users) can and do link with mesautils. Acked-by: Eric Engestrom <[email protected]> Reviewed-by: Ian Romanick <[email protected]>
* gallium: enable GL_AMD_depth_clamp_separate on r600, radeonsiMarek Olšák2018-09-061-0/+1
|
* gallium: split depth_clip into depth_clip_near & depth_clip_farMarek Olšák2018-09-0616-16/+38
| | | | for AMD_depth_clamp_separate.
* gallium: add PIPE_CAP_RASTERIZER_SUBPIXEL_BITSMarek Olšák2018-09-061-0/+3
| | | | Reviewed-by: Roland Scheidegger <[email protected]>
* gallium: add PIPE_CAP_MAX_COMBINED_HW_ATOMIC_COUNTER{S,_BUFFERS}Erik Faye-Lund2018-09-051-0/+2
| | | | | | | | | | | | | | This moves the evergreen-specific max-sizes out as a driver-cap, so other drivers with less strict requirements also can use hw-atomics. Remove ssbo_atomic as it's no longer needed. We should now be able to use hw-atomics for some stages and not for other, if needed. Signed-off-by: Erik Faye-Lund <[email protected]> Reviewed-by: Marek Olšák <[email protected]> Reviewed-by: Gurchetan Singh <[email protected]>
* gallium: add PIPE_CAP_MAX_COMBINED_SHADER_BUFFERSErik Faye-Lund2018-09-051-0/+1
| | | | | | | | | | | This gets rid of a r600 specific hack in the state-tracker, and prepares for other drivers to be able to use hw-atomics. While we're at it, clean up some indentation in the various drivers. Signed-off-by: Erik Faye-Lund <[email protected]> Reviewed-by: Marek Olšák <[email protected]> Reviewed-by: Gurchetan Singh <[email protected]>
* gallium/u_threaded: increase batch size to increase performanceMarek Olšák2018-09-041-1/+1
| | | | | | | | | This reduces mutex overhead. radeonsi: +4.4% performance with piglit/drawoverhead, DrawElements, Ryzen X1700 iris_dri.so: +14% with piglit/drawoverhead, DrawArrays, i7 7700HQ. Acked-by: Kenneth Graunke <[email protected]>
* u_vbuf: Fix leakErnestas Kulik2018-09-041-0/+1
| | | | | | | | | Reported by Coverity: data is heap-allocated, but only freed in the info->index_size != 0 branch. Signed-off-by: Ernestas Kulik <[email protected]> Signed-off-by: Marek Olšák <[email protected]> Cc: 18.2 <[email protected]>
* vc4: Drop a bunch of duplicated gallium PIPE_CAP default code.Eric Anholt2018-09-041-5/+1
| | | | | | | | Now that we have the util function for the default values, we can get rid of the boilerplate. v2: drop GLSL level in favor of defaults. v3: Rebase on new gallium caps
* gallium: Add a helper for implementing PIPE_CAP_* default values.Eric Anholt2018-09-044-0/+358
| | | | | | | | | | | | | | | | | | One of the pains of implementing a gallium driver is filling in a million pipe caps you don't know about yet when you're just starting out. One of the pains of working on gallium is copy-and-pasting your new PIPE_CAP into each driver. We can fix both of these by having each driver call into the default helper from their default case, so that both sides can ignore each other until they need to. v2: fix i915g build, revert swr change to avoid breaking scons build (https://travis-ci.org/anholt/mesa/jobs/419739857) v3: Rebase on 3 new gallium caps. Reviewed-by: Marek Olšák <[email protected]> (v1) Cc: Bruce Cherniak <[email protected]> Cc: George Kyriazis <[email protected]> Cc: Kenneth Graunke <[email protected]>
* gallivm: Detect VSX separately from AltivecVicki Pfau2018-08-303-19/+17
| | | | | | | | | | Previously gallivm would attempt to use VSX instructions on all systems where it detected that Altivec is supported; however, VSX was added to POWER long after Altivec, causing lots of crashes on older POWER/PPC hardware, e.g. PPC Macs. By detecting VSX separately from Altivec we can automatically disable it on hardware that supports Altivec but not VSX Signed-off-by: Vicki Pfau <[email protected]>
* st/mesa, gallium: add a workaround for No Mans SkyTimothy Arceri2018-08-301-0/+1
| | | | | | | | The spec seems clear this is not allowed but the Nvidia binary forces apps to add layout qualifiers so this works around the issue for No Mans Sky until the CTS can be sorted out. Reviewed-by: Marek Olšák <[email protected]>
* gallivm: allow to pass two swizzles into fetches.Dave Airlie2018-08-302-30/+65
| | | | | | | | | | | | This hijacks the top 16-bits of swizzle, to pass in the swizzle for the second channel. This fixes handling .yx swizzles of 64-bit values. This should fixup radeonsi and llvmpipe. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=107524 Reviewed-by: Marek Olšák <[email protected]>
generated by cgit v1.2.3 (git 2.39.1) at 2024-12-25 01:09:42 +0000