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* radeonsi/gfx10: generate gfx10_format_table.hNicolai Hähnle2019-07-031-1/+2
| | | | Acked-by: Bas Nieuwenhuizen <[email protected]>
* gallium/u_blitter: implement copying from ZS to color and vice versaMarek Olšák2019-07-035-35/+314
| | | | | | | | | This is for drivers that can't map depth and stencil and need to blit them to a color texture for CPU access. This also useful for drivers using separate depth and stencil. Tested-by: Dieter Nützel <[email protected]>
* gallium/util: rewrite depth-stencil blit shadersMarek Olšák2019-07-033-183/+46
| | | | | | | | | - merge all 3 functions (Z, S, ZS) - don't write the color output - read the value from texel.x, then write it to position.z or stencil.y (don't use the value from texel.y or texel.z) Tested-by: Dieter Nützel <[email protected]>
* gallium/u_blitter: enable MSAA when blitting to MSAA surfacesBrian Paul2019-07-031-22/+34
| | | | | | | | | | | | If we're doing a Z -> Z MSAA blit (for example) we need to enable msaa rasterization when drawing the quads so that we can properly write the per-sample values. This fixes a number of Piglit ext_framebuffer_multisample blit tests such as ext_framebuffer_multisample/no-color 2 depth combined with the VMware driver. Signed-off-by: Marek Olšák <[email protected]>
* vl: Use CS composite shader only if TEX_LZ and DIV are supportedGert Wollny2019-06-302-8/+11
| | | | | | | | | | | | | | Enable the compute shader copositer only when TEX_LZ is supported by the driver. v2: Also check whether DIV is supported. https://bugs.freedesktop.org/show_bug.cgi?id=110783 Fixes: 9364d66cb7f7 gallium/auxiliary/vl: Add video compositor compute shader render Signed-off-by: Gert Wollny <[email protected]> Reviewed-by: Marek Olšák <[email protected]>
* gallium: Add CAP for opcode DIVGert Wollny2019-06-301-0/+1
| | | | | | | | Not all drivers support TGSI_OPCODE_DIV, so we should have a cap to be able to check this. Signed-off-by: Gert Wollny <[email protected]> Reviewed-by: Marek Olšák <[email protected]>
* vl: replace DIV-ADD with MAD using inverse sizeGert Wollny2019-06-301-4/+5
| | | | | | | | Optimize the shader a bit by emitting MAD with the inverse size values instead of DIV+ADD. Signed-off-by: Gert Wollny <[email protected]> Reviewed-by: Marek Olšák <[email protected]>
* gallium/u_transfer_helper: Don't leak a reference to the resource.Kenneth Graunke2019-06-281-0/+2
| | | | | | | We pipe_resource_reference when handling transfers in map, we need to do a corresponding unreference in unmap. Reviewed-by: Michel Dänzer <[email protected]>
* gallivm: Improve lp_build_rcp_refine.Jose Fonseca2019-06-281-6/+6
| | | | | | | | | | | Use the alternative more accurate expression from https://en.wikipedia.org/wiki/Division_algorithm#Newton%E2%80%93Raphson_division v2: Use lp_build_fmuladd as suggested by Roland Tested by enabling this code path, and running lp_test_arit. Reviewed-by: Roland Scheidegger <[email protected]>
* gallium: Make util_copy_image_view handle shader_accessKenneth Graunke2019-06-271-0/+2
| | | | | | | | | A while back, we added a new field, but failed to update the copier. I believe iris is the only current user of the new field, and it hasn't used the copier, so noone noticed. Fixes: 8b626a22b24 st/mesa: Record shader access qualifiers for images Reviewed-by: Timothy Arceri <[email protected]>
* gallium: Teach GALLIUM_REFCNT_LOG about array texturesKenneth Graunke2019-06-271-0/+9
| | | | | | | Otherwise they are classified as pipe_martian_resource, and don't contain any helpful information about the texture. Reviewed-by: Eric Anholt <[email protected]>
* gallium/util: Make it possible to disable persistent maps in the upload managerThomas Hellstrom2019-06-202-2/+16
| | | | | | | | | For svga, the use of persistent / coherent maps is typically slightly slower than without them. It's probably a bit case-dependent and possible to tune, but for now, make sure we can disable those. Signed-off-by: Thomas Hellstrom <[email protected]> Reviewed-by: Brian Paul <[email protected]>
* gallium/util: Make u_debug_flush support persistent mapsThomas Hellstrom2019-06-202-29/+66
| | | | | | | | | Previously unsynchronized maps have been assumed to also be persistent, Now destinguish between persistent and unsynchronized map and also support PIPE_TRANSFER_PERSISTENT from ARB_buffer_storage. Signed-off-by: Thomas Hellstrom <[email protected]> Reviewed-by: Brian Paul <[email protected]>
* gallium/virgl: Add code path for virgl to read driconfGert Wollny2019-06-205-3/+11
| | | | | | | | | | | | This works only for the drm variant of virgl and not for the vtest variant. v2: Rebase, replace the configuration query function by a pointer to the configuration data. Signed-off-by: Gert Wollny <[email protected]> Reviewed-by: Emil Velikov <[email protected]> (v1) Reviewed-by: Gurchetan Singh <[email protected]>
* meson: Search for execinfo.hJory Pratt2019-06-191-4/+4
| | | | | | | | | | Rather than checking __GLIBC__/__UCLIBC__ macros as a proxy for execinfo.h presence, just check directly. This allows the build to work on musl. Reviewed-by: Matt Turner <[email protected]> Reviewed-by: Eric Anholt <[email protected]> Reviewed-by: Eric Engestrom <[email protected]>
* gallium: Remove unused util_ringbufferCaio Marcelo de Oliveira Filho2019-06-174-193/+0
| | | | Reviewed-by: Roland Scheidegger <[email protected]>
* gallium: add z24s8_as_r8g8b8a8 formatRob Clark2019-06-151-0/+7
| | | | | | | | | | | | This maps to a special format that recent generations of adreno have, for blitting z24s8. Conceptually it is similar to doing Z and/or S blits by pretending it is r8g8b8a8 (with appropriate writemask). But it differs when bandwidth compression is used, as z24 is a different type from r8g8b8. Signed-off-by: Rob Clark <[email protected]> Reviewed-by: Marek Olšák <[email protected]> Reviewed-by: Kristian H. Kristensen <[email protected]>
* gallium: Add PIPE_CAP_ATOMIC_FLOAT_MINMAXCaio Marcelo de Oliveira Filho2019-06-131-0/+1
| | | | | | | Used to enable INTEL_shader_atomic_float_minmax. Reviewed-by: Kenneth Graunke <[email protected]> Reviewed-by: Ian Romanick <[email protected]>
* vl: Always enable drm winsys.Bas Nieuwenhuizen2019-06-132-9/+3
| | | | | | | | | | | | | | | | | | | | The dri2 winsys also uses libdrm (and you can only enable dri3 if you enable dri2), and the drm winsys only requires libdrm. So if any winsys is enabled you can also enable the drm winsys, and since we always want at least one winsys we can always enable it. I removed the check for the drm platform for VA and OMX since they do not care anymore. Since we still check for one of r600g, nouveau or radeonsi, we are guarantueed to still only enable it by default in a configuration that requires libdrm anyway. So for people using va=auto, we don't suddenly start requiring libdrm were we did not before. This supersedes "vl: Enable DRM by default.", which I pushed, but rolled back because it used dep_libdrm before its definition. Reviewed-by: Emil Velikov <[email protected]>
* gallium: Add PIPE_CAP_CS_DERIVED_SYSTEM_VALUES_SUPPORTEDCaio Marcelo de Oliveira Filho2019-06-111-0/+1
| | | | | | | | | | | Tells whether or not the driver can handle gl_LocalInvocationIndex and gl_GlobalInvocationID. If not supported (the default), state tracker will lower those on behalf of the driver. v2: Add case to u_screen.c. (Anholt) Reviewed-by: Eric Anholt <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]>
* gallium/u_transfer_helper: Free the staging buffer on unmap.Kenneth Graunke2019-06-091-0/+1
| | | | | | u_transfer_helper sometimes mallocs a staging buffer, and leaked it. Reviewed-by: Eric Engestrom <[email protected]>
* Revert "vl: Enable DRM by default."Bas Nieuwenhuizen2019-06-042-2/+2
| | | | | | | | | | Reason: meson.build:586:7: ERROR: Unknown variable "dep_libdrm". if building without x11 platform. This reverts commit 392c60928a5debbe6782ed1aa136597504bfbc5b.
* vl: Enable DRM by default.Bas Nieuwenhuizen2019-06-042-2/+2
| | | | | | | | | | | | | | | If libdrm is found the pipe loader enables drm anyway, and that is pretty much the only extra dependency this code has. This enables creating libva display using a drm fd without having to enable the DRM (GBM really) backend of EGL, which is completely unrelated. Leaving the X11 platforms alone as they would still result in the additional inclusion of extra deps. Reviewed-by: Marek Olšák <[email protected]> Reviewed-by: Emil Velikov <[email protected]>
* u_blitter: don't fail mipmap generation for depth formats containing stencilMarek Olšák2019-06-031-1/+2
| | | | | | | Bugzilla: https://bugzilla.freedesktop.org/show_bug.cgi?id=109754 Cc: 19.0 19.1 <[email protected]> Tested-by: Pierre-Eric Pelloux-Prayer <[email protected]>
* Change a few frequented uses of DEBUG to !NDEBUGMarek Olšák2019-05-291-1/+1
| | | | | | | | debugoptimized builds don't define NDEBUG, but they also don't define DEBUG. We want to enable cheap debug code for these builds. I only chose those occurences that I care about. Reviewed-by: Mathias Fröhlich <[email protected]>
* radeonsi: clean up winsys creationMarek Olšák2019-05-271-11/+2
| | | | | | - unify the code - choose radeon or amdgpu based on the DRM version, not based on which one succeeds first
* gallivm: fix default cbuf info.Roland Scheidegger2019-05-241-1/+1
| | | | | | | | | The default null_output really needs to be static, otherwise the values we'll eventually get later are doubly random (they are not initialized, and even if they were it's a pointer to a local stack variable). VMware bug 2349556. Reviewed-by: Jose Fonseca <[email protected]>
* nir: Drop imov/fmov in favor of one mov instructionJason Ekstrand2019-05-241-5/+5
| | | | | | | | | | | | | | | | The difference between imov and fmov has been a constant source of confusion in NIR for years. No one really knows why we have two or when to use one vs. the other. The real reason is that they do different things in the presence of source and destination modifiers. However, without modifiers (which many back-ends don't have), they are identical. Now that we've reworked nir_lower_to_source_mods to leave one abs/neg instruction in place rather than replacing them with imov or fmov instructions, we don't need two different instructions at all anymore. Reviewed-by: Kristian H. Kristensen <[email protected]> Reviewed-by: Alyssa Rosenzweig <[email protected]> Reviewed-by: Vasily Khoruzhick <[email protected]> Acked-by: Rob Clark <[email protected]>
* nir/builder: Merge nir_[if]mov_alu into one nir_mov_alu helperJason Ekstrand2019-05-241-4/+4
| | | | | | | | Unless source modifiers are present, fmov and imov are the same. There's no good reason for having two helpers. Reviewed-by: Kristian H. Kristensen <[email protected]> Acked-by: Alyssa Rosenzweig <[email protected]>
* nir/builder: Remove the use_fmov parameter from nir_swizzleJason Ekstrand2019-05-241-6/+4
| | | | | | | | | | This flag has caused more confusion than good in most cases. You can validly use imov for floats or fmov for integers because, without source modifiers, neither modify their input in any way. Using imov for floats is more reliable so we go that direction. Reviewed-by: Kristian H. Kristensen <[email protected]> Acked-by: Alyssa Rosenzweig <[email protected]>
* ptn,ttn: Use nir_channel for selecting channelsJason Ekstrand2019-05-241-1/+1
| | | | | | | | Both of these passes predate the nir_channel helper. We should just use it instead of hand-rolling it in both passes. Reviewed-by: Kristian H. Kristensen <[email protected]> Acked-by: Alyssa Rosenzweig <[email protected]>
* gallium: Add PIPE_CAP_FBFETCH_COHERENT and expose extensionsKenneth Graunke2019-05-231-0/+1
| | | | | | | st/mesa now exposes KHR_blend_equation_advanced_coherent and EXT_shader_framebuffer_fetch if the new capability is supported. Reviewed-by: Marek Olšák <[email protected]>
* gallium: Change PIPE_CAP_TGSI_FS_FBFETCH bool to PIPE_CAP_FBFETCH countKenneth Graunke2019-05-232-2/+2
| | | | | | | | | | | | | | TGSI's FBFETCH instruction currently only supports reading from a single render target, but NIR intrinsics can support multiple render targets. radeonsi can only support fetching from RT 0, but other drivers may be able to support fetching from any render target. To express this, this patch renames PIPE_CAP_TGSI_FS_FBFETCH to simply PIPE_CAP_FBFETCH, and converts it from a boolean "is FBFETCH supported?" to an integer number of render targets which can be fetched. Reviewed-by: Marek Olšák <[email protected]>
* gallium: enable dmabuf on BSD as wellGreg V2019-05-221-1/+1
| | | | | | | | | The DRM_CONF_SHARE_FD code did not check for Linux, so the commit that introduced PIPE_CAP_DMABUF broke Wayland-EGL clients on FreeBSD. Fixes: 8ae50e60 (gallium: replace DRM_CONF_SHARE_FD with PIPE_CAP_DMABUF) Reviewed-by: Dylan Baker <[email protected]> Reviewed-by: Eric Engestrom <[email protected]>
* draw: fix memory leak introduced 7720ce32aNeha Bhende2019-05-171-1/+3
| | | | | | | | | | | | | We need to free memory allocation PrimitiveOffsets in draw_gs_destroy(). This fixes memory leak found while running piglit on windows. Fixes: 7720ce32a ("draw: add support to tgsi paths for geometry streams. (v2)") Tested with piglit Reviewed-by: Brian Paul <[email protected]> Reviewed-by: Charmaine Lee <[email protected]> Reviewed-by: Dave Airlie <[email protected]>
* pipebuffer, winsys/svga: Add functionality to update pb_validate_entry flagsThomas Hellstrom2019-05-172-11/+26
| | | | | | | | | | | In order to be able to add access modes to a pb_validate_entry, update the pb_validate_add_buffer function to take a pointer hash table and also to return whether the buffer was already on the validate list. Update the svga winsys accordingly. Signed-off-by: Thomas Hellstrom <[email protected]> Reviewed-by: Charmaine Lee <[email protected]>
* vl/dri3: set back buffer from output to NULL with front buffer caseLeo Liu2019-05-161-0/+1
| | | | | | | Since the using output optimization is only for back buffer case Signed-off-by: Leo Liu <[email protected]> Acked-by: Alex Deucher <[email protected]>
* auxiliary/draw: fix crash with zero-stride draw autoRoland Scheidegger2019-05-161-1/+2
| | | | | | | | | | | | transform feedback draws get the number of vertices from the transform feedback object. In draw, we'll figure this out with the number of bytes written divided by the stride. However, it is apparently possible we end up with a stride of 0 there (not entirely sure it could happen with GL). Probably when nothing was actually ever written (so we don't actually have a stride set). Just avoid the division by zero by setting the count to 0. Reviewed-by: Jose Fonseca <[email protected]>
* gallium: Add default check for PIPE_CAP_FRAGMENT_SHADER_INTERLOCKAlyssa Rosenzweig2019-05-141-0/+1
| | | | | | | Fixes: c704c0226 ("gallium: Add a PIPE_CAP_FRAGMENT_SHADER_INTERLOCK") Signed-off-by: Alyssa Rosenzweig <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]>
* v3d: Use driconf to expose non-MSAA texture limits for Xorg.Eric Anholt2019-05-133-4/+13
| | | | | | The V3D 4.2 HW has a limit to MSAA texture sizes of 4096. With non-MSAA, we can go up to 7680 (actually probably 8138, but that hasn't been validated by the HW team). Exposing 7680 in X11 will allow dual 4k displays.
* gallium: Redefine the max texture 2d cap from _LEVELS to _SIZE.Eric Anholt2019-05-132-6/+2
| | | | | | | | The _LEVELS assumes that the max is always power of two. For V3D 4.2, we can support up to 7680 non-power-of-two MSAA textures, which will let X11 support dual 4k displays on newer hardware. Reviewed-by: Marek Olšák <[email protected]>
* gallium: Add helper to convert PIPE blending to shader_enum styleAlyssa Rosenzweig2019-05-101-0/+92
| | | | | | | | | Complementing the new API-agnostic shader_enum blending style, we add helpers to translate between the two forms. Ideally, we could just use PIPE blending directly, but that makes Vulkan support challenging. Signed-off-by: Alyssa Rosenzweig <[email protected]> Reviewed-by: Eric Anholt <[email protected]>
* nir: allow specifying a set of opcodes in lower_alu_to_scalarJonathan Marek2019-05-101-1/+1
| | | | | | | | | This can be used by both etnaviv and freedreno/a2xx as they are both vec4 architectures with some instructions being scalar-only. Signed-off-by: Jonathan Marek <[email protected]> Reviewed-by: Christian Gmeiner <[email protected]> Reviewed-by: Eric Anholt <[email protected]>
* gallium/util: fix two MSVC compiler warningsBrian Paul2019-05-082-3/+3
| | | | | | | Remove stray const qualifier. s/unsigned/enum tgsi_semantic/ Reviewed-by: Roland Scheidegger <[email protected]>
* gallium/pp: s/uint/enum tgsi_semantic/ to fix MSVC warningBrian Paul2019-05-081-1/+1
| | | | Reviewed-by: Roland Scheidegger <[email protected]>
* noop: s/enum pipe_transfer_usage/unsigned/ to fix MSVC warningBrian Paul2019-05-081-1/+1
| | | | | | | The function pointer declaration in pipe_context uses unsigned for the bitmask. Reviewed-by: Roland Scheidegger <[email protected]>
* ddebug: fix a few MSVC compiler warningsBrian Paul2019-05-082-8/+9
| | | | | | | Don't return an expression in void functions. Replace an unsigned int with proper enum. Reviewed-by: Roland Scheidegger <[email protected]>
* gallivm: fix broken 8-wide s3tc decodingRoland Scheidegger2019-05-071-17/+15
| | | | | | | | | | | | | | | | | | Brian noticed there was an uninitialized var for the 8-wide case and 128 bit blocks, which made it always crash. Likewise, the 64bit block case had another crash bug due to type mismatch. Color decode (used for all s3tc formats) also had a bogus shuffle for this case, leading to decode artifacts. Fix these all up, which makes the code actually work 8-wide. Note that it's still not used - I've verified it works, and the generated assembly does look quite a bit simpler actually (20-30% less instructions for the s3tc decode part with avx2), however in practice it still seems to be sligthly slower for some unknown reason (tested with openarena) on my haswell box, so for now continue to split things into 4-wide vectors before decoding. Reviewed-by: Brian Paul <[email protected]> Reviewed-by: Jose Fonseca <[email protected]>
* draw: flush when setting stream-out targetsErik Faye-Lund2019-05-061-0/+2
| | | | | | | | | | We need to re-prepare the middle-end state to pick up changes to this state to react correctly to pausing/resuming stream-out. So let's add a flush here. Signed-off-by: Erik Faye-Lund <[email protected]> Fixes: ec8cbd79ac4 "draw/softpipe: EXT_transform_feedback support (v2)" Reviewed-by: Roland Scheidegger <[email protected]>
* st/dri: decrease input lag by syncing sooner in SwapBuffersMarek Olšák2019-05-021-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | It's done by: - decrease the number of frames in flight by 1 - flush before throttling in SwapBuffers (instead of wait-then-flush, do flush-then-wait) The improvement is apparent with Unigine Heaven. Previously: draw frame 2 wait frame 0 flush frame 2 present frame 2 The input lag is 2 frames. Now: draw frame 2 flush frame 2 wait frame 1 present frame 2 The input lag is 1 frame. Flushing is done before waiting, because otherwise the device would be idle after waiting. Nine is affected because it also uses the pipe cap.
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