| Commit message (Collapse) | Author | Age | Files | Lines |
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This will be use to distinguish between load types when using
the TGSI_OPCODE_LOAD opcode.
Reviewed-by: Marek Olšák <[email protected]>
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Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=102552
v2: Patch cleanup proposed by Nicolai Hähnle.
* deleted changes in si_translate_texformat.
Cc: Nicolai Hähnle <[email protected]>
Cc: Ilia Mirkin <[email protected]>
Signed-off-by: Marek Olšák <[email protected]>
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This removes the barrier and LDS stores and loads for tess factors
when it's possible. The removal of the barrier seems more important
to me though.
In one shader, it removes 17 * 4 bytes from the shader binary.
Reviewed-by: Nicolai Hähnle <[email protected]>
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The pass tries to deduce whether tess factors are always written by
all shader invocations.
The implication for radeonsi is that it doesn't have to use a barrier
near the end of TCS, and doesn't have to use LDS for passing the tess
factors to the epilog.
v2: Handle barriers and do the analysis pass for each code segment
surrounded by barriers separately, and AND results from all
such segments writing tess factors. The change is trivial in the main
switch statement.
Also, the result is renamed to "tessfactors_are_def_in_all_invocs"
to make the name accurate.
Reviewed-by: Nicolai Hähnle <[email protected]>
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Reviewed-by: Nicolai Hähnle <[email protected]>
Tested-by: Brian Paul <[email protected]>
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Now, depth-only clears and custom passes don't read memory in VS.
Reviewed-by: Nicolai Hähnle <[email protected]>
Tested-by: Brian Paul <[email protected]>
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Add ZW coordinates to the draw_rectangle callback and use it.
Reviewed-by: Nicolai Hähnle <[email protected]>
Tested-by: Brian Paul <[email protected]>
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They are done with instancing.
Reviewed-by: Nicolai Hähnle <[email protected]>
Tested-by: Brian Paul <[email protected]>
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Reviewed-by: Nicolai Hähnle <[email protected]>
Tested-by: Brian Paul <[email protected]>
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With GALLIVM_DEBUG=perf set, output the relevant stats for shader cache usage
whenever we have to evict shader variants.
Also add some output when shaders are deleted (but not with the perf setting
to keep this one less noisy).
While here, also don't delete that many shaders when we have to evict. For fs,
there's potentially some cost if we have to evict due to the required flush,
however certainly shader recompiles have a high cost too so I don't think
evicting one quarter of the cache size makes sense (and, if we're evicting
based on IR count, we probably typically evict only very few or just one
shader too). For vs, I'm not sure it even makes sense to evict more than
one shader at a time, but keep the logic the same for now.
Reviewed-by: Jose Fonseca <[email protected]>
Reviewed-by: Brian Paul <[email protected]>
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gather is defined in terms of bilinear filtering, just without the filtering
part. However, there's actually some subtle differences required in our
implementation, because we use some tricks to simplify coord wrapping for the
two coords per direction.
For bilinear filtering, we don't care if we end up with an incorrect
texel, as long as the filter weight is 0.0 for it. Likewise, the order of
the texels doesn't actually matter (as long as they still have the correct
filter weight).
But for gather, these tricks lead to incorrect results.
Fix this for CLAMP_TO_EDGE, and add some comments to the other wrap functions
which look broken (the 3 mirror_clamp plus mirror_repeat) (too complex to fix
right now, and noone really seems to care...).
Reviewed-by: Brian Paul <[email protected]>
Reviewed-by: Jose Fonseca <[email protected]>
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Since it's no longer being called outside of compositor
Signed-off-by: Leo Liu <[email protected]>
Reviewed-by: Christian König <[email protected]>
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The similar function is in OMX, and only used by OMX. Now have it
moved to vl/compositor for other state tracker to use later.
Signed-off-by: Leo Liu <[email protected]>
Reviewed-by: Christian König <[email protected]>
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Trivial. We already support tg4 for legacy tex opcodes, so the actual
texture sampling code already handles it.
(Just like TG4, we don't handle additional capabilities and always sample
red channel.)
Reviewed-by: Jose Fonseca <[email protected]>
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We're not particularly concerned with memory usage, if the tradeoff is
shader recompiles. And it's common for apps to have a lot of shaders
nowadays (and, since our shaders include a LOT of context state of course
we may create quite a bit more shaders even).
So quadruple the amount of shaders draw will cache (from 128 to 512).
For llvmpipe (fs shaders) quadruple the number of instructions, keep the
number of variants the same for now (only with very simple, non-texturing
shaders the variant limit could really be reached), and simplify the
definition, it's probably easier to just have one different definition
per branch...
Reviewed-by: Jose Fonseca <[email protected]>
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Acked-by: Roland Scheidegger <[email protected]>
Tested-by: Dieter Nützel <[email protected]>
Reviewed-by: Timothy Arceri <[email protected]>
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Acked-by: Roland Scheidegger <[email protected]>
Tested-by: Dieter Nützel <[email protected]>
Reviewed-by: Timothy Arceri <[email protected]>
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Acked-by: Roland Scheidegger <[email protected]>
Tested-by: Dieter Nützel <[email protected]>
Reviewed-by: Timothy Arceri <[email protected]>
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Reviewed-by: Timothy Arceri <[email protected]>
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Acked-by: Roland Scheidegger <[email protected]>
Tested-by: Dieter Nützel <[email protected]>
Reviewed-by: Timothy Arceri <[email protected]>
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Most older drivers seem to just ignore the Dimension setting, so virtually
no changes should be needed.
Acked-by: Roland Scheidegger <[email protected]>
Tested-by: Dieter Nützel <[email protected]>
Reviewed-by: Timothy Arceri <[email protected]>
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Fix loading of a 3x16 vector as a single 48-bit load
on big-endian systems (PPC64, S390).
Roland Scheidegger's commit e827d9175675aaa6cfc0b981e2a80685fb7b3a74
plus Ray Strode's patch reduce pre-Roland Piglit failures from ~4000 to ~2000. This patch fixes
three of the four regressions observed by Ray:
- draw-vertices
- draw-vertices-half-float
- draw-vertices-half-float_gles2
One regression remains:
- draw-vertices-2101010
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=100613
Cc: "17.2" "17.1" <[email protected]>
Signed-off-by: Ben Crocker <[email protected]>
Reviewed-by: Roland Scheidegger <[email protected]>
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lp_build_fetch_rgba_soa fetches a texel from a texture.
Part of that process involves first gathering the element
together from memory into a packed format, and then breaking
out the individual color channels into separate, parallel
arrays.
The code fails to account for endianess when reading the packed
values.
This commit attempts to correct the problem by reversing the order
the packed values are read on big endian systems.
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=100613
Cc: "17.2" "17.1" <[email protected]>
Signed-off-by: Ray Strode <[email protected]>
Reviewed-by: Roland Scheidegger <[email protected]>
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Reviewed-by: Nicolai Hähnle <[email protected]>
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The discard range codepath takes precedence, so if we get both
unsynchronized and discard_range, choose unsynchronized.
Reviewed-by: Nicolai Hähnle <[email protected]>
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In two places we called pipe_resource_reference() to remove a reference
to a vertex buffer resource. But we neglected to check if the buffer was
a user buffer and not a pipe_resource. This caused us to pass an invalid
pipe_resource pointer to pipe_resource_reference().
Instead of calling pipe_resource_reference(&vbuf->resource, NULL), use
pipe_vertex_buffer_unreference(&vbuf) which checks the is_user_buffer
field and does the right thing.
Also, explicity set the is_user_buffer field to false after setting the
vbuf->resource pointer to out_buffer.
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=102377
Reviewed-by: Marek Olšák <[email protected]>
Tested-by: Bruce Cherniak <[email protected]>
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Trivial.
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Trivial.
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They are only used for debug info.
Together with making tgsi_opcode_info::opcode a bitfield, this reduces
the size of tgsi_opcode_info on 64-bit systems from 24 bytes to 4 bytes,
and makes the whole data structure a bit more linker friendly.
Reviewed-by: Marek Olšák <[email protected]>
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Reviewed-by: Marek Olšák <[email protected]>
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So we can easily re-arrange members of tgsi_opcode_info, and readers of
the code don't have to guess what all the 0s mean.
Mostly done with regex search&replace.
Reviewed-by: Marek Olšák <[email protected]>
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Reviewed-by: Marek Olšák <[email protected]>
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It's not clear why they were ever 2 bits to begin with. Perhaps
the original intent was to use signed values, but that doesn't
seem to have ever been the case in master.
Reviewed-by: Marek Olšák <[email protected]>
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Various index-related fields are only initialized when required, so
they should only be dumped in those cases.
Reviewed-by: Marek Olšák <[email protected]>
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Reviewed-by: Nicolai Hähnle <[email protected]>
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use COS+SIN instead.
Reviewed-by: Roland Scheidegger <[email protected]>
Acked-by: Jose Fonseca <[email protected]>
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v2: cherry-picked from the bigger patch series
Reviewed-by: Nicolai Hähnle <[email protected]> (v1)
Tested-by: Brian Paul <[email protected]>
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Reviewed-by: Nicolai Hähnle <[email protected]>
Tested-by: Brian Paul <[email protected]>
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Reviewed-by: Nicolai Hähnle <[email protected]>
Tested-by: Brian Paul <[email protected]>
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Reviewed-by: Roland Scheidegger <[email protected]>
Reviewed-by: Nicolai Hähnle <[email protected]>
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use MUL+MAD+MOV instead.
Reviewed-by: Roland Scheidegger <[email protected]>
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use DP4 or DP3 + ADD.
Reviewed-by: Roland Scheidegger <[email protected]>
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use DP3 instead.
Reviewed-by: Roland Scheidegger <[email protected]>
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Reviewed-by: Roland Scheidegger <[email protected]>
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use MEMBAR instead
Reviewed-by: Roland Scheidegger <[email protected]>
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Reviewed-by: Roland Scheidegger <[email protected]>
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Will be used for allocating bindless descriptor slots for
RadeonSI.
Signed-off-by: Samuel Pitoiset <[email protected]>
Reviewed-by: Marek Olšák <[email protected]>
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Reviewed-by: Marek Olšák <[email protected]>
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Reviewed-by: Marek Olšák <[email protected]>
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