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* gallivm: ensure string is null-terminated instead of assert()ingEric Engestrom2018-09-251-3/+1
| | | | | Signed-off-by: Eric Engestrom <[email protected]> Reviewed-by: Dylan Baker <[email protected]>
* meson: Don't compile pipe loader with dri support when not using driDylan Baker2018-09-211-5/+5
| | | | | | | | | | | Corrects building glx as gallium-xlib without any dri targets. v2: - fix ugly formatting Fixes: 66c94b9313a697ce8f2b222f4ba353035e4b8726 ("meson: build gallium winsys for dri, null, and wrapper") Reviewed-by: Eric Engestrom <[email protected]>
* mesa/st: add force_compat_profile option to driconfigTimothy Arceri2018-09-181-0/+1
| | | | Reviewed-by: Marek Olšák <[email protected]>
* Revert "radeonsi: avoid syncing the driver thread in si_fence_finish"Timothy Arceri2018-09-181-8/+0
| | | | | | | | | | This reverts commit bc65dcab3bc48673ff6180afb036561a4b8b1119. This was manually reverted. Reverting stops the menu hanging in some id tech games such as RAGE and Wolfenstein The New Order. Reviewed-by: Marek Olšák <[email protected]> Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=107891
* gallium/util: don't let child processes inherit our thread affinityMarek Olšák2018-09-141-4/+32
| | | | v2: corrected the comment
* gallium/util: start with a random L3 cache index for AMD ZenMarek Olšák2018-09-141-4/+16
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* vl/dri: add color depth to vl winsysLeo Liu2018-09-132-0/+2
| | | | | | | For VDPAU use later Signed-off-by: Leo Liu <[email protected]> Reviewed-by: Michel Dänzer <[email protected]>
* vl/dri3: add support for 10 bits formatLeo Liu2018-09-131-4/+25
| | | | | Signed-off-by: Leo Liu <[email protected]> Reviewed-by: Michel Dänzer <[email protected]>
* vl/dri: add 10 bits format supportsLeo Liu2018-09-132-10/+65
| | | | | | | v2: Tell B10G10R10X2 and R10G10B10X2 formats for different HW. Signed-off-by: Leo Liu <[email protected]> Reviewed-by: Michel Dänzer <[email protected]>
* gallium/u_inlines: remove the destroy variable in pipe_reference_describedMarek Olšák2018-09-101-6/+3
| | | | | Reviewed-by: Michel Dänzer <[email protected]> Tested-by: Dieter Nützel <[email protected]>
* gallium/u_inlines: improve pipe_reference_described perf for debug buildsMarek Olšák2018-09-101-4/+5
| | | | | Tested-by: Dieter Nützel <[email protected]> Reviewed-by: Michel Dänzer <[email protected]>
* gallium/auxiliary: don't dereference counters twice needlesslyMarek Olšák2018-09-101-7/+10
| | | | Tested-by: Dieter Nützel <[email protected]>
* gallium/u_inlines: normalize naming, use dst & src, style fixes (v2)Marek Olšák2018-09-101-47/+47
| | | | | | | v2: update comments Reviewed-by: Michel Dänzer <[email protected]> Tested-by: Dieter Nützel <[email protected]>
* util: Make util_context_thread_changed a no-op on Windows.Jose Fonseca2018-09-101-0/+2
| | | | | | | | | Spite using thrd_t types, these functions are wed to pthreads, and break Windows builds, because thrd_current() is not implemented there, as it's impossible to have an efficient thrd_current() implementation on Windows. Trivial.
* gallium: New cap PIPE_CAP_MAX_VERTEX_ELEMENT_SRC_OFFSET.Mathias Fröhlich2018-09-101-0/+3
| | | | | | | | | | | Introduce a new capability for the maximum value of pipe_vertex_element::src_offset. Initially just every driver backend returns the value previously set from _mesa_init_constants. So this shall end up in no functional change. Reviewed-by: Brian Paul <[email protected]> Reviewed-by: Roland Scheidegger <[email protected]> Signed-off-by: Mathias Fröhlich <[email protected]>
* st/mesa: throttle texture uploads if their memory usage goes beyond a limitMarek Olšák2018-09-072-0/+137
| | | | | This prevents radeonsi from running out of memory. It also increases texture upload performance by being nice to the kernel memory manager.
* gallium: add PIPE_CAP_MAX_TEXTURE_UPLOAD_MEMORY_BUDGETMarek Olšák2018-09-071-0/+1
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* Revert "gallium/os_thread: simplify helper pipe_current_thread_get_time_nano"Marek Olšák2018-09-071-1/+5
| | | | | | This reverts commit 6d477bc5460eec14c6a0d047a0384c9ce5c7609b. It fixes the Windows build hopefully.
* gallium/u_threaded: implement set_context_param for thread pinning (v2)Marek Olšák2018-09-072-0/+41
| | | | | | | v2: - use set_context_param - set set_context_param even if the driver doesn't implement it Reviewed-by: Brian Paul <[email protected]>
* st/mesa: pin driver threads to a specific L3 cache on AMD Zen (v2)Marek Olšák2018-09-072-0/+46
| | | | | | v2: use set_context_param Reviewed-by: Brian Paul <[email protected]>
* gallium: add pipe_context::set_context_param for tuning perf on AMD Zen (v2)Marek Olšák2018-09-073-0/+38
| | | | | | | | | State trackers will not use the new param directly, but will instead use a helper in MakeCurrent that does the right thing. v2: rework the interface Reviewed-by: Brian Paul <[email protected]>
* gallium/os_thread: simplify helper pipe_current_thread_get_time_nanoMarek Olšák2018-09-071-5/+1
| | | | Reviewed-by: Brian Paul <[email protected]>
* gallium/u_cpu_detect: get the number of cores per L3 cache for AMD ZenMarek Olšák2018-09-072-0/+25
| | | | Reviewed-by: Brian Paul <[email protected]>
* gallium/u_cpu_detect: fix parsing the CPU familyMarek Olšák2018-09-071-1/+2
| | | | | | | | | | According to: https://support.amd.com/TechDocs/54945_PPR_Family_17h_Models_00h-0Fh.pdf Also Intel: https://www.microbe.cz/docs/CPUID.pdf Reviewed-by: Brian Paul <[email protected]>
* gallium/u_cpu_detect: fix a race condition on initializationMarek Olšák2018-09-071-8/+10
| | | | Reviewed-by: Brian Paul <[email protected]>
* move u_math to src/utilDylan Baker2018-09-0713-902/+9
| | | | | | | | | | | | | | | Currently we have two sets of functions for bit counts, one in gallium and one in core mesa. The ones in core mesa are header only in many cases, since they reduce to "#define _mesa_bitcount popcount", but they provide a fallback implementation. This is important because 32bit msvc doesn't have popcountll, just popcount; so when nir (for example) includes the core mesa header it doesn't (and shouldn't) link with core mesa. To fix this we'll promote the version out of gallium util, then replace the core mesa uses with the util version, since nir (and other non-core mesa users) can and do link with mesautils. Acked-by: Eric Engestrom <[email protected]> Reviewed-by: Ian Romanick <[email protected]>
* gallium: enable GL_AMD_depth_clamp_separate on r600, radeonsiMarek Olšák2018-09-061-0/+1
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* gallium: split depth_clip into depth_clip_near & depth_clip_farMarek Olšák2018-09-0616-16/+38
| | | | for AMD_depth_clamp_separate.
* gallium: add PIPE_CAP_RASTERIZER_SUBPIXEL_BITSMarek Olšák2018-09-061-0/+3
| | | | Reviewed-by: Roland Scheidegger <[email protected]>
* gallium: add PIPE_CAP_MAX_COMBINED_HW_ATOMIC_COUNTER{S,_BUFFERS}Erik Faye-Lund2018-09-051-0/+2
| | | | | | | | | | | | | | This moves the evergreen-specific max-sizes out as a driver-cap, so other drivers with less strict requirements also can use hw-atomics. Remove ssbo_atomic as it's no longer needed. We should now be able to use hw-atomics for some stages and not for other, if needed. Signed-off-by: Erik Faye-Lund <[email protected]> Reviewed-by: Marek Olšák <[email protected]> Reviewed-by: Gurchetan Singh <[email protected]>
* gallium: add PIPE_CAP_MAX_COMBINED_SHADER_BUFFERSErik Faye-Lund2018-09-051-0/+1
| | | | | | | | | | | This gets rid of a r600 specific hack in the state-tracker, and prepares for other drivers to be able to use hw-atomics. While we're at it, clean up some indentation in the various drivers. Signed-off-by: Erik Faye-Lund <[email protected]> Reviewed-by: Marek Olšák <[email protected]> Reviewed-by: Gurchetan Singh <[email protected]>
* gallium/u_threaded: increase batch size to increase performanceMarek Olšák2018-09-041-1/+1
| | | | | | | | | This reduces mutex overhead. radeonsi: +4.4% performance with piglit/drawoverhead, DrawElements, Ryzen X1700 iris_dri.so: +14% with piglit/drawoverhead, DrawArrays, i7 7700HQ. Acked-by: Kenneth Graunke <[email protected]>
* u_vbuf: Fix leakErnestas Kulik2018-09-041-0/+1
| | | | | | | | | Reported by Coverity: data is heap-allocated, but only freed in the info->index_size != 0 branch. Signed-off-by: Ernestas Kulik <[email protected]> Signed-off-by: Marek Olšák <[email protected]> Cc: 18.2 <[email protected]>
* vc4: Drop a bunch of duplicated gallium PIPE_CAP default code.Eric Anholt2018-09-041-5/+1
| | | | | | | | Now that we have the util function for the default values, we can get rid of the boilerplate. v2: drop GLSL level in favor of defaults. v3: Rebase on new gallium caps
* gallium: Add a helper for implementing PIPE_CAP_* default values.Eric Anholt2018-09-044-0/+358
| | | | | | | | | | | | | | | | | | One of the pains of implementing a gallium driver is filling in a million pipe caps you don't know about yet when you're just starting out. One of the pains of working on gallium is copy-and-pasting your new PIPE_CAP into each driver. We can fix both of these by having each driver call into the default helper from their default case, so that both sides can ignore each other until they need to. v2: fix i915g build, revert swr change to avoid breaking scons build (https://travis-ci.org/anholt/mesa/jobs/419739857) v3: Rebase on 3 new gallium caps. Reviewed-by: Marek Olšák <[email protected]> (v1) Cc: Bruce Cherniak <[email protected]> Cc: George Kyriazis <[email protected]> Cc: Kenneth Graunke <[email protected]>
* gallivm: Detect VSX separately from AltivecVicki Pfau2018-08-303-19/+17
| | | | | | | | | | Previously gallivm would attempt to use VSX instructions on all systems where it detected that Altivec is supported; however, VSX was added to POWER long after Altivec, causing lots of crashes on older POWER/PPC hardware, e.g. PPC Macs. By detecting VSX separately from Altivec we can automatically disable it on hardware that supports Altivec but not VSX Signed-off-by: Vicki Pfau <[email protected]>
* st/mesa, gallium: add a workaround for No Mans SkyTimothy Arceri2018-08-301-0/+1
| | | | | | | | The spec seems clear this is not allowed but the Nvidia binary forces apps to add layout qualifiers so this works around the issue for No Mans Sky until the CTS can be sorted out. Reviewed-by: Marek Olšák <[email protected]>
* gallivm: allow to pass two swizzles into fetches.Dave Airlie2018-08-302-30/+65
| | | | | | | | | | | | This hijacks the top 16-bits of swizzle, to pass in the swizzle for the second channel. This fixes handling .yx swizzles of 64-bit values. This should fixup radeonsi and llvmpipe. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=107524 Reviewed-by: Marek Olšák <[email protected]>
* gallium: add TGSI_MEMORY_STREAM_CACHE_POLICYMarek Olšák2018-08-292-2/+3
| | | | For internal radeonsi shaders.
* Revert "configure: allow building with python3"Emil Velikov2018-08-241-1/+1
| | | | | | | | | | | | | | This reverts commit ae7898dfdbe5c8dab7d11c71862353f1ae43feb0. Turns out the python scripts are _not_ fully python 3 compatible. As Ilia reported using get_xmlpool.py with LANG=C produces some weird output - see the link for details. Even though the issue was spotted with the autoconf build, it exposes a genuine problem with the script (and lack of lang handling of the meson build.) https://lists.freedesktop.org/archives/mesa-dev/2018-August/203508.html
* gallivm: don't use saturated unsigned add/sub intrinsics for llvm 8.0Roland Scheidegger2018-08-241-27/+60
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | These have been removed. Unfortunately auto-upgrade doesn't work for jit. (Worse, it seems we don't get a compilation error anymore when compiling the shader, rather llvm will just do a call to a null function in the jitted shaders making it difficult to detect when intrinsics vanish.) Luckily the signed ones are still there, I helped convincing llvm removing them is a bad idea for now, since while the unsigned ones have sort of agreed-upon simplest patterns to replace them with, this is not the case for the signed ones, and they require _significantly_ more complex patterns - to the point that the recognition is IMHO probably unlikely to ever work reliably in practice (due to other optimizations interfering). (Even for the relatively trivial unsigned patterns, llvm already added test cases where recognition doesn't work, unsaturated add followed by saturated add may produce atrocious code.) Nevertheless, it seems there's a serious quest to squash all cpu-specific intrinsics going on, so I'd expect patches to nuke them as well to resurface. Adapt the existing fallback code to match the simple patterns llvm uses and hope for the best. I've verified with lp_test_blend that it does produce the expected saturated assembly instructions. Though our cmp/select build helpers don't use boolean masks, but it doesn't seem to interfere with llvm's ability to recognize the pattern. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=106231 Reviewed-by: Jose Fonseca <[email protected]>
* tgsi/ureg: don't call tgsi_sanity when it's too slowMarek Olšák2018-08-231-1/+12
| | | | Tested-by: Dieter Nützel <[email protected]>
* configure: allow building with python3Emil Velikov2018-08-231-1/+1
| | | | | | | | | | | | Pretty much all of the scripts are python2+3 compatible. Check and allow using python3, while adjusting the PYTHON2 refs. Note: - python3.4 is used as it's the earliest supported version - python3 chosen prior to python2 Signed-off-by: Emil Velikov <[email protected]> Acked-by: Eric Engestrom <[email protected]>
* mesa: remove unused dri config option disable_shader_bit_encodingTimothy Arceri2018-08-211-1/+0
| | | | | | | This was added as a workaround for Heaven 3.0 but was later removed by 5ead448719f3 to allow Heaven 4.0 to work correctly. Reviewed-by: Kenneth Graunke <[email protected]>
* xmlconfig: add kernel_driver device attributeQiang Yu2018-08-171-1/+1
| | | | | | | | | This attribute can be used by loader to apply different option to device use specific kernel driver. Signed-off-by: Qiang Yu <[email protected]> Acked-by: Michel Dänzer <[email protected]> Reviewed-by: Emil Velikov <[email protected]>
* gallium/u_blitter: save/restore window rectanglesMarek Olšák2018-08-142-0/+29
| | | | Reviewed-by: Samuel Pitoiset <[email protected]>
* noop: implement set_window_rectanglesMarek Olšák2018-08-141-0/+8
| | | | Reviewed-by: Samuel Pitoiset <[email protected]>
* ddebug: implement set_window_rectanglesMarek Olšák2018-08-141-0/+12
| | | | Reviewed-by: Samuel Pitoiset <[email protected]>
* Gallium/tgsi: Correct signdness of return value of bit operationsGert Wollny2018-08-111-3/+4
| | | | | | | | | | | | | The GLSL operations findLSB, findMSB, and countBits always return a signed integer type. Let TGSI reflect this. v2: Properly set values in infer_(src|dst)_type (Thanks Roland Schneidegger for pointing out problems with my 1st approach) v2: Set values in the common infer_type code path, and only add the correct source type for UMSB (Roland Schneidegger) Signed-off-by: Gert Wollny <[email protected]> Reviewed-by: Roland Scheidegger <[email protected]>
* meson: Build with Python 3Mathieu Bridon2018-08-101-3/+3
| | | | | | | | | | | | Now that all the build scripts are compatible with both Python 2 and 3, we can flip the switch and tell Meson to use the latter. Since Meson already depends on Python 3 anyway, this means we don't need two different Python stacks to build Mesa. Signed-off-by: Mathieu Bridon <[email protected]> Reviewed-by: Eric Engestrom <[email protected]> Reviewed-by: Dylan Baker <[email protected]>
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