| Commit message (Collapse) | Author | Age | Files | Lines |
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This adds support for load/store/atomic operations on images
along with image tracking support.
v2: add RESQ support. (Ilia)
v2.1: constify interface (Brian)
split get_image_coord_dim (Brian)
Reviewed-by: Brian Paul <[email protected]>
Signed-off-by: Dave Airlie <[email protected]>
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This is a mask of which of the current 2x2 grid are non-helper
invocations. This allows us to mask off the helper invocations
later for the image operations.
Reviewed-by: Brian Paul <[email protected]>
Signed-off-by: Dave Airlie <[email protected]>
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Reviewed-by: Brian Paul <[email protected]>
Signed-off-by: Dave Airlie <[email protected]>
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v2: be consistent with other definitions.
Reviewed-by: Brian Paul <[email protected]>
Signed-off-by: Dave Airlie <[email protected]>
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d3d10 state tracker does not encode (valid) target (only offsets are
really used from the texture bits), since that information always comes
from the sview dcl, and not the instruction (note the meaning of target
is actually slightly different between gl and d3d10 in any case, because
d3d10 target does never include shadow bit).
Also move the msaa sampler identification as well - would need to set that
on the sview not sampler, so while this does not fix it make it at least
obvious it won't work with sample instructions.
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We assert that fullinst->Instruction.Texture != 0 above so no need to
check it in the conditional. We also have the fullinst->Texture.Texture
value in a local variable, so use it.
Reviewed-by: José Fonseca <[email protected]>
Reviewed-by: Roland Scheidegger <[email protected]>
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Texture sample instructions specify a sampler unit and texture target
such as "1D", "2D", "CUBE", etc. Sampler view declarations also specify
the sampler unit and texture target.
This patch checks that the texture instructions agree with the declarations
and collects the texture target type for each sampler unit.
v2: only compare instruction's texture target to the sampler view declaration
target if the instruction is a TEX instruction, not a SAMPLE instruction.
Reviewed-by: José Fonseca <[email protected]>
Reviewed-by: Roland Scheidegger <[email protected]>
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This is a tiny housekeeping patch which does the following:
* Replaced tabs with three spaces.
* Formatted oneline and multiline code comments. Some doxygen
comments weren't marked as such and some code comments were marked
as doxygen comments.
* Spaces between if- and while-statements and their parenthesis.
According to the mesa coding style guidelines.
Reviewed-by: Brian Paul <[email protected]>
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v2: move the nr_cbufs check above the loop
Reviewed-by: Ilia Mirkin <[email protected]> (v1)
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Signed-off-by: Rob Clark <[email protected]>
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These don't get used and haven't been in git history from what I can
see, so drop them.
Reviewed-by: Brian Paul <[email protected]>
Reviewed-by: Edward O'Callaghan <[email protected]>
Signed-off-by: Dave Airlie <[email protected]>
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Reviewed-by: Marek Olšák <[email protected]>
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Reviewed-by: Ilia Mirkin <[email protected]>
Reviewed-by: Marek Olšák <[email protected]>
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Reviewed-by: Ilia Mirkin <[email protected]>
Reviewed-by: Marek Olšák <[email protected]>
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Reviewed-by: Marek Olšák <[email protected]>
Reviewed-by: Charmaine Lee <[email protected]>
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Reviewed-by: Marek Olšák <[email protected]>
Reviewed-by: Charmaine Lee <[email protected]>
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Reviewed-by: Marek Olšák <[email protected]>
Reviewed-by: Charmaine Lee <[email protected]>
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Instead of hard-coded 2D tex target in tgsi_transform_tex_2d_inst()
Reviewed-by: Marek Olšák <[email protected]>
Reviewed-by: Charmaine Lee <[email protected]>
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Extend the MEMORY file support to differentiate between global, private
and shared memory, as well as "input" memory.
"MEMORY[x], INPUT" is intended to access OpenCL kernel parameters, a
special memory type is added for this, since the actual storage of these
(e.g. UBO-s) may differ per implementation. The uploading of kernel
parameters is handled by launch_grid, "MEMORY[x], INPUT" allows drivers
to use an access mechanism for parameter reads which matches with the
upload method.
Signed-off-by: Hans de Goede <[email protected]>
Reviewed-by: Ilia Mirkin <[email protected]> (v1)
Reviewed-by: Samuel Pitoiset <[email protected]> (v2)
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When support for decl.Atomic and .Shared was added, tgsi_build_declaration
was not updated to propagate these properly.
Signed-off-by: Hans de Goede <[email protected]>
Reviewed-by: Ilia Mirkin <[email protected]> (v1)
Reviewed-by: Samuel Pitoiset <[email protected]> (v2)
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tgsi_default_instruction_memory / tgsi_build_instruction_memory were
returning uninitialized memory for tgsi_instruction_memory.Texture and
tgsi_instruction_memory.Format. Note 0 means not set, and thus is a
correct default initializer for these.
Fixes: 3243b6fc97 ("tgsi: add Texture and Format to tgsi_instruction_memory")
Cc: Nicolai Hähnle <[email protected]>
Signed-off-by: Hans de Goede <[email protected]>
Reviewed-by: Marek Olšák <[email protected]>
Reviewed-by: Nicolai Hähnle <[email protected]>
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Radeonsi needs to know which shader stage will execute after a shader
in order to make the best decision about which shader variant to compile
first.
This is only set for VS and TES, because we don't need it elsewhere.
VS has 3 variants:
- next shader is FS
- next shader is GS
- next shader is TCS
TES has 2 variants:
- next shader is FS
- next shader is GS
Currently, radeonsi always assumes the next shader is FS, which is suboptimal,
since st/mesa always knows which shader is next if the GLSL program is not
a "separate shader".
By default, ureg always sets "next shader is FS".
Reviewed-by: Nicolai Hähnle <[email protected]>
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Reviewed-by: Charmaine Lee <[email protected]>
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v2: Squash multiple commits addressing the new parameter in different
files so we don't break the build (Iago)
v3: Fix tgsi (Samuel)
v4: Fix nir_clone.c (Samuel)
v5: Fix vc4 and freedreno (Iago)
v6 (Sam)
- Fix build errors in nir_lower_indirect_derefs
- Use helper to get type size from nir_alu_type.
Signed-off-by: Iago Toral Quiroga <[email protected]>
Signed-off-by: Samuel Iglesias Gonsalvez <[email protected]>
Tested-by: Rob Clark <[email protected]>
Reviewed-by: Jason Ekstrand <[email protected]>
Reviewed-by: Samuel Iglesias Gonsálvez <[email protected]>
Reviewed-by: Iago Toral Quiroga <[email protected]>
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Reviewed-by: Jason Ekstrand <[email protected]>
Reviewed-by: Samuel Iglesias Gonsálvez <[email protected]>
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The logic was comparing actual ints, not true/false values.
This meant that it was emitting always multiple line segments instead of just
one even if the stipple test had the same result, which looks inefficient, and
the segments also overlapped thus breaking line aa as well.
(In practice, with the no-op default line stipple pattern, for a 10-pixel
long line from 0-9 it was emitting 10 segments, with the individual segments
ranging from 0-1, 0-2, 0-3 and so on.)
This fixes https://bugs.freedesktop.org/show_bug.cgi?id=94193
Reviewed-by: Jose Fonseca <[email protected]>
CC: <[email protected]>
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Reviewed-by: Ilia Mirkin <[email protected]>
Reviewed-by: Marek Olšák <[email protected]>
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Reviewed-by: Ilia Mirkin <[email protected]>
Reviewed-by: Marek Olšák <[email protected]>
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Reviewed-by: Ilia Mirkin <[email protected]>
Reviewed-by: Marek Olšák <[email protected]>
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Reviewed-by: Ilia Mirkin <[email protected]>
Reviewed-by: Marek Olšák <[email protected]>
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Frontends should have this information readily available, and it simplifies
image LOAD/STORE/ATOM* handling especially with indirect image access.
Reviewed-by: Ilia Mirkin <[email protected]>
Reviewed-by: Marek Olšák <[email protected]>
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Add one missing extern C guard within include/pipe/p_video_enums.h, and
remove the wrapping throughout gallium.
On Haiku one could even use the gallium debug_printf() although
that's another topic.
v2: Leave dbghelp.h as is (Jose)
Cc: Jose Fonseca <[email protected]>
Cc: Brian Paul <[email protected]>
Cc: Alexander von Gluck IV <[email protected]>
Signed-off-by: Emil Velikov <[email protected]>
Reviewed-by: Jose Fonseca <[email protected]>
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This instruction has the resource (buffer or image) as a destination to
represent the writemask for SSBO writes. However, this is obviously not
a "real" destination for the purpose of emitting LLVM IR.
Reviewed-by: Marek Olšák <[email protected]>
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Acked-by: Ilia Mirkin <[email protected]>
Reviewed-by: Marek Olšák <[email protected]>
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This will allow drivers to make better decisions about texture sharing
for DRI2, DRI3, Wayland, and OpenCL.
v2: add read/write flags, take advantage of __DRI_IMAGE_USE_BACKBUFFER
Reviewed-by: Axel Davy <[email protected]>
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The SHARED TGSI keyword is only allowed with TGSI_FILE_MEMORY and not
with TGSI_FILE_BUFFER. I have found this by using the nouveau_compiler
from command line.
Signed-off-by: Samuel Pitoiset <[email protected]>
Reviewed-by: Ilia Mirkin <[email protected]>
Cc: "11.2" <[email protected]>
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Reviewed-by: Eduardo Lima Mitev <[email protected]>
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Reviewed-by: Eduardo Lima Mitev <[email protected]>
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Reviewed-by: Eduardo Lima Mitev <[email protected]>
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Wrap comments to 78 columns, etc.
Reviewed-by: Eduardo Lima Mitev <[email protected]>
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Reviewed-by: Roland Scheidegger <[email protected]>
Reviewed-by: Emil Velikov <[email protected]>
Acked-by: Jose Fonseca <[email protected]>
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swr driver which is written in C++ needs access to some more
gallium utility functions than are currently exposed.
Reviewed-by: Roland Scheidegger <[email protected]>
Acked-by: Jose Fonseca <[email protected]>
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Only one of these were recently introduced. However, since
we keep copy/pasting the same wrong indentation we should
probably just fix it.
Reviewed-by: Brian Paul <[email protected]>
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for radeonsi
Reviewed-by: Brian Paul <[email protected]>
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Commits a39a8fbbaa12 ("nir: move to compiler/") and eb63640c1d38
("glsl: move to compiler/") broke Android builds. Fix them.
There is also a missing dependency between generated NIR headers and
several libraries. This isn't a new issue, but seems to have been
exposed by the NIR move.
Built with i915, i965, freedreno, r300g, r600g, vc4, and virgl enabled.
Cc: "11.2" <[email protected]>
Cc: Mauro Rossi <[email protected]>
Signed-off-by: Rob Herring <[email protected]>
Reviewed-by: Emil Velikov <[email protected]>
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"st/mesa: overhaul vertex setup for clearing, glDrawPixels, glBitmap"
added a vertex shader declaring IN[0] and IN[2], but not IN[1].
Drivers relying on tgsi_shader_info can't handle holes in declarations,
because tgsi_shader_info doesn't track that.
This is just a quick workaround meant for stable that will work for vertex
shaders.
This fixes radeonsi DrawPixels and CopyPixels crashes.
Cc: [email protected]
Reviewed-by: Brian Paul <[email protected]>
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Because the if statement that checks whether we have a return
statement is valid only on x86, surround it with X86 or X86-64
arch defines
Signed-off-by: Oded Gabbay <[email protected]>
Reviewed-by: Jose Fonseca <[email protected]>
Reviewed-by: Roland Scheidegger <[email protected]>
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Currently, disassemble() directly prints to stdout. This has broke the
profiling support for llvmpipe JIT code.
This patch redirects the output to an sstream object, which is then
either gets printed to stdout (for assembly debugging) or gets written
to a file in /tmp/ (for profiling support).
Signed-off-by: Oded Gabbay <[email protected]>
Reviewed-by: Jose Fonseca <[email protected]>
Reviewed-by: Roland Scheidegger <[email protected]>
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src/gallium/auxiliary/pipebuffer/pb_bufmgr_mm.c: In function ‘mm_bufmgr_create_from_buffer’:
src/gallium/auxiliary/pipebuffer/pb_bufmgr_mm.c:288:4:
warning: statement is indented as if it were guarded by... [-Wmisleading-indentation]
if(mm->map)
^~
src/gallium/auxiliary/pipebuffer/pb_bufmgr_mm.c:286:1: note:
...this ‘if’ clause, but it is not
if(mm->heap)
^~
Signed-off-by: Rob Clark <[email protected]>
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src/gallium/auxiliary/hud/font.c:234:22: warning: ‘Fixed8x13_Character_159’ defined but not used [-Wunused-const-variable]
static const GLubyte Fixed8x13_Character_159[] = { 9, 0, 0, 0, 0, 0, 0,170, 0, 0, 0,130, 0, 0, 0,130, 0, 0, 0,130, 0, 0, 0,170, 0, 0, 0, 0, 0};
^~~~~~~~~~~~~~~~~~~~~~~
.... many more..
These are simply unused, just #if 0 them out for now, in case someone
wants to use them in the future.
Signed-off-by: Rob Clark <[email protected]>
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