| Commit message (Collapse) | Author | Age | Files | Lines |
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Allows one to declare fragment shader inputs with cylindrical wrap info.
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Little utility after development stabilisation, use tgsi_dump instead.
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Since the origin_lower_left / pixel_center_origin changes, we need
to use the fragcoord info that's set up in setup_fragcoord_coeff().
The code in exec_declaration() was clobbering the the interpolated
fragment position.
Fixes progs/glsl/fragcoord.c demo.
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And disable with if (0). Inf/NaN can occur normally during program
execution. Only enable the check code when needed during debugging.
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Changes in v3:
- Documented the new properties
- Added comments for property values
- Rebased to current master
Changes in v2:
- Caps are added in a separate, subsequent patch
This adds two TGSI fragment program properties that indicate the
fragment coord conventions.
The properties behave as described in the extension spec for
GL_ARB_fragment_coord_conventions, but the default origin in
upper left instead of lower left as in OpenGL.
The syntax is:
PROPERTY FS_COORD_ORIGIN [UPPER_LEFT|LOWER_LEFT]
PROPERTY FS_COORD_PIXEL_CENTER [HALF_INTEGER|INTEGER]
The names have been chosen for consistency with the GS properties
and the OpenGL extension spec.
The defaults are of course the previously assumed conventions:
UPPER_LEFT and HALF_INTEGER.
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This is to maintain backward compatibility with drivers
that don't support arrays of constant buffers.
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Conflicts:
src/gallium/auxiliary/draw/draw_context.c
src/gallium/auxiliary/draw/draw_pt_fetch_shade_pipeline.c
src/gallium/auxiliary/pipebuffer/Makefile
src/gallium/auxiliary/pipebuffer/SConscript
src/gallium/auxiliary/pipebuffer/pb_buffer_fenced.c
src/gallium/auxiliary/tgsi/tgsi_scan.c
src/gallium/drivers/i915/i915_surface.c
src/gallium/drivers/i915/i915_texture.c
src/gallium/drivers/llvmpipe/lp_setup.c
src/gallium/drivers/llvmpipe/lp_tex_sample_c.c
src/gallium/drivers/llvmpipe/lp_texture.c
src/gallium/drivers/softpipe/sp_prim_vbuf.c
src/gallium/state_trackers/xorg/xorg_dri2.c
src/gallium/winsys/drm/intel/gem/intel_drm_api.c
src/gallium/winsys/drm/nouveau/drm/nouveau_drm_api.c
src/gallium/winsys/drm/radeon/core/radeon_drm.c
src/gallium/winsys/drm/vmware/core/vmw_screen_dri.c
src/mesa/state_tracker/st_cb_clear.c
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This code was not updated when we added TGSI_SEMANTIC_FACE a while ago.
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The dimension index always addresses the second-dimension axis.
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Allows declaring a contiguous block of immediates. Useful for
relative indexing.
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This time, INSTANCEID is missing...
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Conflicts:
src/gallium/auxiliary/pipebuffer/pb_buffer_fenced.c
src/gallium/auxiliary/util/Makefile
src/gallium/drivers/r300/r300_state_derived.c
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Conflicts:
src/gallium/drivers/softpipe/sp_draw_arrays.c
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Conflicts:
src/gallium/auxiliary/tgsi/tgsi_dump.c
src/gallium/include/pipe/p_shader_tokens.h
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Modify the translate module to respect instance divisors and accept
instance id as a parameter to calculate input vertex offset.
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gcc allows pre-fix variable attributes.
Suggested by Ian Romanick.
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Conflicts:
src/mesa/drivers/dri/i965/brw_wm_emit.c
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Rearrange things so that the writes to the dest registers happen
after we've fetched/used all src registers.
The problematic instruction was: XPD TEMP[2].xyz, TEMP[0], TEMP[2];
Note that the dst reg is also a src reg.
This fixes bad shading with progs/glsl/bump.c since Eric's changes to the
Mesa program optimizer in commit d6690ce15fb8c7c6abf1bc0d847c1d2da2c33904.
The optimizer rearranges some registers so we occasionally wind up with
something like the above.
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This assertion fails with piglit glsl-vs-mov-after-deref test
because we're double freeing the memory. It seems there's some
confusion between what's placed in the hash table and what isn't.
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check_register_usage() frees the scan_register *reg data so we were
reading from freed memory. This fixes a valgrind error found with
piglit's glsl-vs-mov-after-deref test.
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