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* tgsi: scan for additional info: uses_fogcoord, uses_frontfacingBrian Paul2008-12-182-15/+37
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* tgsi: use flr(), not trunc() for ARLBrian Paul2008-12-161-1/+1
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* gallium: minor texture-related clean-ups, comments, etcBrian2008-12-011-2/+2
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* tgsi: Implement OPCODE_SSG/SGN.Michal Krol2008-11-262-2/+46
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* tgsi: Implement OPCODE_ARR.Michal Krol2008-11-262-5/+7
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* tgsi: Implement OPCODE_ROUND for SSE2 backend.Michal Krol2008-11-261-1/+28
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* gallium: added centroid/invarient fields to declarationsBrian Paul2008-11-252-0/+8
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* tgsi: add tgsi_declaration fields for centroid sampling, invariant optimizationBrian Paul2008-11-242-0/+10
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* softpipe: remove old/unneeded dependencies between TGSI exec and softpipeBrian2008-11-232-13/+6
| | | | | Use tgsi_sampler struct as a base class. Softpipe subclasses it and adds the fields it needs.
* tgsi: Return 0.0 for negative constant register indices.Michal Krol2008-11-181-8/+16
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* tgsi: Keep address register as a floating point.Michal Krol2008-11-181-20/+9
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* tgsi: More comments on source register indirect and 2D indexing.Michal Krol2008-11-122-10/+65
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* tgsi: Fix a bug with saving/restoring xmm registers upon func call.Michal Krol2008-11-121-3/+3
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* gallium: use PIPE_ARCH_SSE to protect use of SSE instrinsics onlyBrian2008-11-091-9/+33
| | | | | | This allows us to use SSE codegen with debug builds again. When PIPE_ARCH_SSE is set (w/ gcc -msse -msse2) we will also use the gcc SSE intrinsic functions.
* gallium: implement SSE codegen for TGSI_OPCODE_NRM/NRM4Brian2008-11-081-1/+33
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* gallium: added SSE for DP2, DP2ABrian Paul2008-11-071-2/+22
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* gallium: implement TGSI_OPCODE_DP2A, add sqrt to NRM3/NRM4Brian Paul2008-11-071-3/+19
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* Merge commit 'origin/gallium-0.1' into gallium-0.2Brian Paul2008-11-071-1/+58
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| * gallium: implement TGSI_OPCODE_NRM/NRM4 in tgsi_exec.cBrian2008-11-061-1/+58
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* | Merge commit 'origin/gallium-0.1' into gallium-0.2Brian Paul2008-11-062-5/+32
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| * gallium: check execution mask in indirect register loadsBrian2008-11-051-0/+23
| | | | | | | | | | Zero-out the index for disabled execution channels to avoid using potential garbage values (thus avoiding bad array indexing).
| * gallium: don't range check tgsi register index for indirect accessesBrian2008-11-051-5/+9
| | | | | | | | Fixes progs/vp/arl.txt test.
* | Merge commit 'origin/gallium-0.1' into gallium-0.2Brian Paul2008-11-053-3/+61
|\| | | | | | | | | | | | | | | | | Conflicts: src/gallium/auxiliary/rtasm/rtasm_execmem.c src/mesa/shader/slang/slang_emit.c src/mesa/shader/slang/slang_log.c src/mesa/state_tracker/st_atom_framebuffer.c
| * gallium: call tgsi_set_exec_mask() and use exec mask in SSE ARL codeBrian Paul2008-11-051-3/+32
| | | | | | | | | | This prevents vertex shaders from referencing invalid memory locations when the shader is operating on less than four vertices or fragments.
| * gallium: added tgsi_set_exec_mask()Brian Paul2008-11-051-0/+25
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| * gallium: added some sanity check assertions for constant buffer indexingBrian Paul2008-11-051-0/+4
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| * tgsi: Implement OPCODE_TRUNC.michal2008-11-051-1/+17
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* | tgsi: Implement OPCODE_TRUNC.michal2008-11-051-1/+17
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* | gallium: use execmem for PPC code, grow instruction buffer as neededBrian Paul2008-10-291-0/+8
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* | gallium: added PPC support for SWZ, XPD, POWBrian Paul2008-10-291-0/+86
| | | | | | | | That's the last of the ARB_v_p opcodes, except for ARL.
* | gallium: ppc: implement TGSI_OPCODE_LOG/EXPBrian Paul2008-10-281-1/+110
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* | gallium: ppc: don't replicate/smear immediate values, use vspltw instruction ↵Brian Paul2008-10-281-9/+13
| | | | | | | | as with constants
* | gallium: use some PPC vec registers to store TGSI tempsBrian Paul2008-10-281-62/+122
| | | | | | | | This could be a lot better, but already makes for better code.
* | gallium: ppc: emit fewer 'li' instructions prior to vector loads/storesBrian Paul2008-10-271-31/+75
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* | gallium: ppc: use a src register cache to avoid redundant loadsBrian Paul2008-10-271-96/+204
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* | scons: ppc support.Michel Dänzer2008-10-231-0/+1
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* | gallium: PPC: clamp y to [-128,128] for LITBrian Paul2008-10-221-4/+5
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* | gallium: remove ppc_vload_float(), rename ppc_vecmove() -> ppc_vmove().Brian Paul2008-10-221-1/+1
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* | gallium: new PPC built-in constants arrayBrian Paul2008-10-222-7/+57
| | | | | | | | It's hard to form PPC vector immediates so load them from an array.
* | gallium: GALLIUM_NOPPC debug var to disable PPC codegenBrian Paul2008-10-221-2/+10
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* | gallium: PPC LIT instruction (not quite complete yet)Brian Paul2008-10-221-4/+85
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* | gallium: var renaming in tgsi_ppc.cBrian Paul2008-10-221-18/+18
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* | gallium: remove SSE remnants from tgsi_ppc.cBrian Paul2008-10-221-2153/+0
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* | cell: TGSI->PPC for RSQ, RCP and src register sign modesBrian Paul2008-10-221-46/+116
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* | gallium: TGSI->PPC inequality operatorsBrian Paul2008-10-221-0/+70
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* | gallium: fix broken TGSI_FILE_CONSTANT case, use ppc_reserver_register()Brian Paul2008-10-221-8/+13
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* | gallium: TGSI to PPC code generationBrian Paul2008-10-223-0/+2830
| | | | | | | | | | | | Based on the TGSIto SSE2 code generator. Incomplete and lots of SSE stuff still hanging around but the basic dozen or so TGSI opcodes are functioning.
* | gallium: Introduce PIPE_ARCH_SSE define for SSE support.José Fonseca2008-10-071-1/+1
| | | | | | | | | | | | | | Besides meaning x86 and x86-64 architecture, it also depends on SSE2 support enabled on gcc. This fixes the linux-debug build.
* | tgsi: Include p_config.h.José Fonseca2008-10-011-0/+2
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* | cell: Moved X86 checks to wrap #include section so that Cell targets will ↵Jonathan White2008-09-301-2/+2
| | | | | | | | compile again.
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