| Commit message (Collapse) | Author | Age | Files | Lines |
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This reverts commit d5a6c172547d8964f4d4bb79637651decaf9deee.
llvm-3.1svn r151687 makes MemoryObject accessor members const again.
Signed-off-by: Vinson Lee <[email protected]>
Reviewed-by: Brian Paul <[email protected]>
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No runtime behavior change. As vector selects are still not very well
supported by LLVM.
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This adds support for all the opcodes needed for native integer
support with GLSL 1.20 enabled, and some of the ones for GLSL1.30
support.
I've split them between non-cpu and cpu along the same lines
Tom's code did for the other ones I think, but I'm open to review
on which ones should go where.
With instance ids fixed I get no regressions on my box here
with LLVM 2.8, will test with later LLVMs as well.
Signed-off-by: Dave Airlie <[email protected]>
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These are integer opcodes not deprecated ones.
Signed-off-by: Dave Airlie <[email protected]>
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rcp asserts on type.floating so don't go passing non-floating
things into it.
Signed-off-by: Dave Airlie <[email protected]>
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for completeness.
Signed-off-by: Dave Airlie <[email protected]>
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Signed-off-by: Dave Airlie <[email protected]>
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use a single entry point, as per Jose's suggestion.
Signed-off-by: Dave Airlie <[email protected]>
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Like TGSI_OPCODE_ARL, destination should be an integer.
This fixes invalid LLVM IR on an internal state tracker (currently Mesa
never emits this opcode).
In the future consider making ADDR register also a integer-as-float array,
like all other register kinds, or simply replace ADDR & ARR/ARL with
integer temp and instructions.
Reviewed-by: Dave Airlie <[email protected]>
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Reviewed-by: Dave Airlie <[email protected]>
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Fetch float/uint/int immediates.
v2: bitcast to uint/int to floats as per Jose's suggestions.
Signed-off-by: Dave Airlie <[email protected]>
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Infer from the operand the type of value to store.
MOV is untyped but we use the float store path.
v2: make MOV use float store path.
I've had to squash merge the ARL fix to be stored
as an integer in here to avoid regressions in a number
of piglit tests.
From now on ARL stores to an integer just like HW does.
Signed-off-by: Dave Airlie <[email protected]>
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The infers the type of data required using the opcode,
and casts the input to the appropriate type.
So far this only handles non-indirect constant and temporaries.
v2: as per Jose suggestion, fetch immediates via floats
Signed-off-by: Dave Airlie <[email protected]>
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These are used inside the action handlers for the integer opcodes.
v2: use uint_bld/int_bld, drop higher level uint_bld.
Signed-off-by: Dave Airlie <[email protected]>
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Then pass the correct build context to it.
Signed-off-by: Dave Airlie <[email protected]>
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For now just pass the current context, but when we want to
store int or unsigned we need to pass those later.
Signed-off-by: Dave Airlie <[email protected]>
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X86Target is a variable, and therefore isn't defined at compile time. So
LLVM_NATIVE_ARCH == X86Target
is translated into
0 == 0
and since X86 is first, we always pick it.
Therefore we replace the logic with PIPE_ARCH_*.
https://bugs.freedesktop.org/show_bug.cgi?id=45420
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Fix build with llvm-3.1svn.
llvm-3.1svn r149918 changed BufferMemoryObject::getExtent and
BufferMemoryObject::readByte from const member functions to non-const
member functions in include/llvm/Support/MemoryObject.h.
Signed-off-by: Vinson Lee <[email protected]>
Reviewed-by: José Fonseca <[email protected]>
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Signed-off-by: José Fonseca <[email protected]>
Tested-by: Vinson Lee <[email protected]>
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The hack never worked reliably, and docs/llvmpipe.html is quite clear on
the requirement of matching CRT when building LLVM and Mesa already.
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Signed-off-by: José Fonseca <[email protected]>
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lp_bld_tgsi_soa.c has been adapted to use this new interface, but
lp_bld_tgsi_aos.c has only been partially adapted, since nothing in
gallium currently uses it.
v2:
- Rename lp_bld_tgsi_action.[ch] => lp_bld_tgsi_action.[ch]
- Initialize tgsi_info in lp_bld_tgsi_aos.c
- Fix copyright dates
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Constants array is always assumed to be RGBA, which means we need to
swizzle the constant elements into place to match the AoS ordering
(e.g., BGRA) that was passed to lp_build_tgsi_aos().
Signed-off-by: José Fonseca <[email protected]>
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Target specific intrinsics are also prefixed with llvm, so this assert
was preventing us from using them.
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There was some duplication between the tgsi_dump.c and tgsi_text.c
files. Also use some static assertions to help catch errors when
adding new TGSI values.
v2: put strings in tgsi_strings.c file instead of the .h file.
Reviewed-by: Dave Airlie <[email protected]>
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Hi all
This fixes a memory leak of 32 bytes on exit.
From 924f8fdccb41b011f372bc57252005bcdb096105 Mon Sep 17 00:00:00 2001
From: Lauri Kasanen <[email protected]>
Date: Thu, 22 Dec 2011 21:28:33 +0200
Subject: [PATCH] gallivm: Close a memory leak
As reported by "valgrind --leak-check=full glxgears".
Signed-off-by: Lauri Kasanen <[email protected]>
Signed-off-by: José Fonseca <[email protected]>
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llvm-3.1svn r145714 moved global variables into a new TargetOptions
class. TargetMachine constructor now needs a TargetOptions object as
well.
Signed-off-by: Vinson Lee <[email protected]>
Reviewed-by: Brian Paul <[email protected]>
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Number of fragment shader variants is not very representative of the
memory used by LLVM, neither is number of shader instructions, as often
texture sampling constitutes most of the generated code.
This change adds an additional trim criteria: least recently used
fragment shader variants will be freed until the total number of LLVM IR
instruction falls below a specified threshold.
Reviewed-by: Brian Paul <[email protected]>
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ary_ge_arx_arz is already set earlier.
Reviewed-by: Brian Paul <[email protected]>
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Necessary with build against LLVM 2.6, with recent gcc, as LLVM headers
depend on ptrdiff_t but don't properly include stddef.h
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Just found by reading llvmpipe code for no great reason.
Signed-off-by: Dave Airlie <[email protected]>
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>= 0x0301
LLVM change r143502
Signed-off-by: José Fonseca <[email protected]>
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It complicates more than it simplifies, now that there's only one negate
bit on TGSI registers.
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Instead of separate ifloor / fract calls.
No change for SSE4.1 code, but less FP<->SI conversions on non SSE4.1
systems.
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https://bugs.freedesktop.org/show_bug.cgi?id=41065
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LLVM 3.0svn added SubtargetInfo as additional parameter to
createMCDisassembler() and createMCInstPrinter().
See revision 139237 of LLVM.
Signed-off-by: Tobias Droste <[email protected]>
Signed-off-by: Brian Paul <[email protected]>
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And filling in all the switch statements in auxiliary. Mostly untested.
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LLVM 3.0svn moved TargetRegistry.h and TargetSelect.h.
See revision 138450 of LLVM.
Signed-off-by: Tobias Droste <[email protected]>
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Not sure how I computed these, but they were wrong (which explains why
bumping the polynomial order before never improved precision).
This allows to pass the EXP test cases of PSPrecision/VSPrecision DCTs.
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Add an iteration step, which makes rqsqrt precision go from 12bits to
24, and fixes RSQ/NRM test case of PSPrecision/VSPrevision DCTs.
There are no uses of this function outside shader translation.
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