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* tu: Implement fallback linear staging blit for CopyImageConnor Abbott2020-05-131-24/+173
* tu: Add noubwc debug flag to disable UBWCConnor Abbott2020-05-133-1/+4
* tu: Add a "scratch bo" allocation mechanismConnor Abbott2020-05-132-0/+74
* turnip: use the common code for generating extensions and dispatch tablesSamuel Pitoiset2020-05-132-204/+12
* freedreno/ir3/sched: try to avoid syncsRob Clark2020-05-131-13/+99
* freedreno/ir3/sched: avoid scheduling outputsRob Clark2020-05-133-22/+101
* freedreno/ir3/postsched: try to avoid (sy) syncsRob Clark2020-05-131-2/+19
* freedreno/ir3/postsched: reset sfu_delay on syncRob Clark2020-05-132-4/+33
* freedreno/ir3: limit # of tex prefetch by shader sizeRob Clark2020-05-133-1/+40
* freedreno/ir3: fix indirect cb0 load_ubo loweringRob Clark2020-05-121-2/+2
* freedreno/ir3: don't allow negative const_offsetRob Clark2020-05-121-3/+14
* turnip: Execute ir3_nir_lower_gs pass againBrian Ho2020-05-121-0/+3
* turnip: enable tiling for compressed formatsJonathan Marek2020-05-121-2/+5
* turnip: update "fetchsize" value to match fdl6_layout changesJonathan Marek2020-05-121-4/+1
* freedreno: Fix non-constbuf-upload UBO block indices and count.Eric Anholt2020-05-122-9/+35
* freedreno: Replace OUT_RELOCW with OUT_RELOC.Eric Anholt2020-05-122-7/+5
* freedreno: Tell the kernel that all BOs are for writing.Eric Anholt2020-05-123-79/+39
* freedreno: Mark all ringbuffer BOs as to be dumped on crash.Eric Anholt2020-05-122-4/+5
* freedreno: Replace OUT_RELOCD with permanently flagging shader BOs for it.Eric Anholt2020-05-125-8/+10
* freedreno: Start moving relocs flags into the BOs.Eric Anholt2020-05-126-14/+15
* freedreno: android: add adreno-pm4-pack.xml.h generation to android buildMauro Rossi2020-05-091-1/+5
* freedreno/drm: android: add libfreedreno_registers static dependencyMauro Rossi2020-05-091-0/+2
* freedreno: Initialize the bo's iova at creation time.Eric Anholt2020-05-083-9/+3
* freedreno: Rename append_bo() in case it doesn't get inlined.Eric Anholt2020-05-081-4/+4
* freedreno: Clean up tests around ORing in the reloc flags.Eric Anholt2020-05-081-6/+5
* freedreno: Deduplicate ringbuffer macros with computerator/fdperfEric Anholt2020-05-085-162/+147
* freedreno,tu: Don't request fragcoord components not being read.Hyunjun Ko2020-05-087-41/+17
* tu: Support pipelines without a fragment shaderConnor Abbott2020-05-072-8/+20
* freedreno/fdl: Align after dividing by block sizeKristian H. Kristensen2020-05-061-13/+9
* freedreno/ir3: Disable sin/cos range reduction for mediump.Eric Anholt2020-05-051-2/+2
* turnip: Remove RANGE_SIZE usageJoshua Ashton2020-05-052-3/+4
* freedreno/ir3: Define the bindful uniform/nonuniform desc modes for cat6 a6xx.Eric Anholt2020-05-044-23/+38
* freedreno/ir3: Sync some new changes from envytools.Eric Anholt2020-05-0411-49/+107
* freedreno/ir3: Add some more tests of cat6 disasm.Eric Anholt2020-05-041-0/+24
* freedreno/ir3: Set up outputs for multi-slot varyings.Eric Anholt2020-05-011-20/+25
* freedreno/ir3: Stop initializing regid of so->outputs during setup.Eric Anholt2020-05-011-1/+0
* freedreno/ir3: Improve shader key normalization.Eric Anholt2020-05-012-56/+75
* freedreno: Emit debug messages when doing draw-time recompiles of shaders.Eric Anholt2020-05-011-0/+8
* freedreno/ir3: Remove unused half precision shader key flag.Eric Anholt2020-05-011-6/+0
* freedreno: Fix assertion failures on GS/tess shaders with shader-db enabled.Eric Anholt2020-05-011-0/+15
* freedreno/ir3: Skip tess epilogue if the program is missing stores.Eric Anholt2020-05-011-0/+3
* freedreno/ir3: Fix register allocation assertion failures.Eric Anholt2020-05-012-13/+30
* freedreno/ir3: Drop hack to clean up split varsKristian H. Kristensen2020-05-011-24/+0
* freedreno/ir3: Lower GS builtins before lowering IOKristian H. Kristensen2020-05-014-61/+64
* freedreno/ir3: Add ir3_nir_lower_to_explicit_input() passKristian H. Kristensen2020-05-013-46/+65
* freedreno/ir3: Rename ir3_nir_lower_to_explicit_ioKristian H. Kristensen2020-05-013-6/+6
* freedreno/ir3: Pass stream output info to ir3_shader_from_nirKristian H. Kristensen2020-05-012-2/+6
* freedreno/ir3: Fix the a3xx TF outputs stores.Eric Anholt2020-05-011-1/+1
* freedreno/ir3: Set up the block predecessors for a3xx TFEric Anholt2020-05-012-2/+8
* freedreno/ir3: Leave bools as 1-bit, storing them in full regs.Eric Anholt2020-04-302-119/+111
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