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* turnip: share code between 3D blit/clear path and tu_pipelineJonathan Marek2020-06-124-135/+108
| | | | | | | | Instead of filling out registers manually, fill out ir3 structs and re-use code from tu_pipeline. Signed-off-by: Jonathan Marek <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5426>
* turnip: pipeline program state refactorJonathan Marek2020-06-121-339/+217
| | | | | | | | | | | | This refactor simplifies things a bit, and will make it easier to share some logic with tu_clear_blit (see next patches). This changes the order in which some things are emitted, and emits less for disabled shader stages. There's also as extra write to SP_GS_PRIM_SIZE that is removed. Signed-off-by: Jonathan Marek <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5426>
* freedreno/ir3: limit pre-fetched tex destRob Clark2020-06-113-4/+60
| | | | | | | | | | | | | | | | Teach RA to setup additional interference to prevent textures fetched before the FS starts from ending up in a register that is too high to encode. Fixes mis-rendering in multiple playcanv.as webgl apps. Note that the regression was not actually 733bee57eb8's fault, but that was the commit that exposed the problem. Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/3108 Fixes: 733bee57eb8 ("glsl: lower samplers with highp coordinates correctly") Signed-off-by: Rob Clark <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5431>
* freedreno/ir3: remove RA "q-values" optimizationRob Clark2020-06-111-54/+3
| | | | | | | | | | This is mainly the "piglit optimization" (ie, since piglit launches an separate process for for each test). It was never wired up for a6xx, and makes register class setup unnecessarily complicated. Remove it to simplify the next patch. Signed-off-by: Rob Clark <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5431>
* freedreno/ir3: respect tex prefetch limitsRob Clark2020-06-112-21/+51
| | | | | | | | | Refactor a bit the limit checking in the bindless case, and add tex/samp limit checking for the non-bindless case, to ensure we do not try to prefetch textures which cannot be encoded in the # of bits available. Signed-off-by: Rob Clark <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5431>
* freedreno/ir3: add debug code to print conflicting half-regsRob Clark2020-06-111-0/+7
| | | | | | | | I keep re-typing this from time to time when debugging various things. Which is dumb. Signed-off-by: Rob Clark <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5431>
* turnip: Expose robustBufferAccess.Eric Anholt2020-06-091-1/+1
| | | | | | | | It is a required device feature, and all enabled tests in dEQP-VK.robustness.* pass. Reviewed-by: Jonathan Marek <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5266>
* turnip: Fix crashes in compute with no descriptors to load.Eric Anholt2020-06-091-1/+3
| | | | | | | Found when trying to rebase cheza VK CI on top of this change. Fixes: 334204823eee ("tu: Fix context faults loading unused descriptor sets") Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5266>
* tu: Fix context faults loading unused descriptor setsConnor Abbott2020-06-093-0/+28
| | | | | | | | | | | The app is allowed to never bind descriptor sets that are statically unused by the pipeline, which would've caused a context fault since CP_LOAD_STATE6 would try to load the descriptors that don't exist. Fix this by not preloading descriptors from unused descriptor sets. We could do more fine-grained accounting of which descriptors are used, but this is enough to fix the problem. Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5400>
* tu: Rewrite flushing to use barriersConnor Abbott2020-06-094-154/+1049
| | | | | | | | | | | | | | | | | | | | | | Replace the various ad-hoc flushes that we've inserted, copied from freedreno, etc. with a unified system that uses the user-supplied information via vkCmdPipelineBarrier() and subpass dependencies. There are a few notable differences in behavior: - We now move setting RB_CCU_CNTL up a little in the gmem case, but hopefully that won't matter too much. This matches what the Vulkan blob does. - We properly implement delayed setting of events, completing our implementaton of events. - Finally, of course, we should be a lot less flush-happy. We won't emit useless CCU/cache flushes with multiple copies, renderpasses, etc. that don't depend on each other, and also won't flush/invalidate the cache around renderpasses unless we actually need to. Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4964>
* tu: Remove useless event_write helpersConnor Abbott2020-06-091-19/+7
| | | | | | | tu6_emit_cache_flush() was wrongly named, and with the removal of the last parameter both are useless. Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4964>
* tu: Don't actually track seqno's for eventsConnor Abbott2020-06-094-76/+78
| | | | | | | | | | | | We just dropped the last user which actually cared about the seqno. This never worked anyway, since the seqno was never reset between multiple executions of the same command buffer. Turn the part of the control buffer which used to track the seqno into a dummy dword, and figure out automatically whether we need to include it. We will implement seqnos again eventually, with timline semaphores, but that will likely be totally different. Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4964>
* tu: Remove useless post-binning flushesConnor Abbott2020-06-091-25/+9
| | | | | | | | | | | | The Vulkan blob doesn't do this, and based on my understanding of how the blob works this is unnecessary. CACHE_FLUSH is already serialized against all 3d commands so you don't need to wait for rendering commands to finish before issuing it, and the subsequent wfi + WAIT_FOR_ME will cause the CP to wait for the CACHE_FLUSH to finish, so there's also no need to wait for it to complete. The CACHE_INVALIDATE also seems unnecessary, and also isn't done by the blob. Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4964>
* turnip: fix VFD_CONTROL for binning passJonathan Marek2020-06-081-1/+1
| | | | | | | | Fixes some cases with TU_DEBUG=forcebin, specifically the failures in: dEQP-VK.glsl.*_vertex Signed-off-by: Jonathan Marek <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5370>
* turnip: use common emit_xs_cntl to fill a6xx_sp_xs_ctrl_reg0Jonathan Marek2020-06-081-28/+28
| | | | | | | | | Note this changes the value of SP_GS_CTRL_REG0, by using FOUR_QUADS and setting MERGEDREGS. ir3 expects MERGEDREGS, and using FOUR_QUADS instead of TWO_QUADS doesn't seem to hurt. Signed-off-by: Jonathan Marek <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5370>
* turnip: fix HW binning with geometry shaderJonathan Marek2020-06-081-2/+6
| | | | | | | | | Fixes failures with TU_DEBUG=forcebin and geometry shaders, for example: dEQP-VK.binding_model.*geometry* dEQP-VK.transform_feedback.simple.query* Signed-off-by: Jonathan Marek <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5370>
* turnip: correctly emit non-binning vs in transform feedback caseJonathan Marek2020-06-081-3/+5
| | | | | | | | The offset given to tu6_emit_shader_object was wrong, binning_vs_offset should only be used when using the binning pass vs. Signed-off-by: Jonathan Marek <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5370>
* turnip: clamp sampler minLod/maxLodJonathan Marek2020-06-081-2/+4
| | | | | | | | | | Otherwise A6XX_TEX_SAMP_1_{MIN,MAX}_LOD silently overflows. This fixes these tests: dEQP-VK.texture.explicit_lod.2d.derivatives.* Signed-off-by: Jonathan Marek <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5375>
* turnip: update some properties based on blob driverJonathan Marek2020-06-081-8/+8
| | | | | | | | subTexelPrecisionBits/mipmapPrecisionBits change fixes some failures in: dEQP-VK.texture.explicit_lod.* Signed-off-by: Jonathan Marek <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5375>
* turnip: move HLSQ_UPDATE_CNTL write to before xs config writesJonathan Marek2020-06-081-3/+3
| | | | | | | | This matches the blob and gallium driver more closely, and fixes a rendering issue observed on a650. Signed-off-by: Jonathan Marek <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5376>
* Switch from cElementTree to ElementTree.Vinson Lee2020-06-051-1/+1
| | | | | | | | | | | | | | The xml.etree.cElementTree module will be removed in Python 3.9. Since Python 3.3 the xml.etree.cElementTree module has been deprecated, the xml.etree.ElementTree module uses a fast implementation whenever available. Builds using Python 2.7 can still work but with the slower implementation. Signed-off-by: Vinson Lee <[email protected]> Acked-by: Eric Engestrom <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5349>
* freedreno/ir3: Handle cases where we decide not to lower UBO 0 loads.Eric Anholt2020-06-051-39/+39
| | | | | | | | We advertize 4096 vec4s of GL uniform storage, but the HW can only store 512 vec4s in the const buffer. Closes: #3049 Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5273>
* freedreno/ir3: Drop the max_const on a6xx to 512.Eric Anholt2020-06-051-1/+4
| | | | | | | | | | | | | | | | | | The GLES blob on the p3a limits constlen to 512 between VS and FS across a6xx gpu ids (615, 630, 640, and 650). Experimentally, exceeding that limit in any one stage results in rendering corruption or GPU hangs (though my most detailed testing had a loop limit in a uniform, so that may the cause of the hang). Clamp the limit we use inside of a shader so we don't exceed it within a stage. This commit doesn't resovle limiting inter-stage. Experimentally, I've found that I can push up to a total of ~768 vec4s between VS and FS on a630, with or without uniform updates between each draw. We'll need to do some shader key-based limiting of constlen at draw time to respect that limit, but that's left for future work, and this commit is enough for the google earth case that initiated this work. Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5273>
* freedreno/ir3: Account for driver params in UBO max const upload.Eric Anholt2020-06-053-7/+26
| | | | | | | The const state setup needs to be able to push its driver params, so account for them in the analyze_ubo_ranges. Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5273>
* freedreno/ir3: Stop shifting UBO 1 down to be UBO 0.Eric Anholt2020-06-051-18/+9
| | | | | | | | | | | It turns out the GL uniforms file is larger than the hardware constant file, so we need to limit how many UBOs we lower to constbuf loads. To do actual UBO loads, we'll need to be able to upload UBO 0's pointer or descriptor. No difference on nohw 1 UBO update drawoverhead case (n=35). Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5273>
* freedreno/ir3: Drop unnecessary alignment of pushed UBO size.Eric Anholt2020-06-051-1/+1
| | | | | | | The analysis pass gives us vec4-aligned size, and all of our other constbuf allocations here are in vec4 units, so we can just divide by 16. Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5273>
* freedreno/ir3: Stop pushing immediates once we've filled the constbuf.Eric Anholt2020-06-051-1/+8
| | | | | | | If we filled the constbuf up with UBOs, we may need to avoid generating more immediate push constants. Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5273>
* freedreno/ir3: Refactor ir3_cp's lower_immed().Eric Anholt2020-06-051-20/+24
| | | | | | There was duplicated handling in the callers that we can just move inside. Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5273>
* turnip: Add support for alphaToOne.Eric Anholt2020-06-053-4/+4
| | | | | | | | | Comparing a blob trace using the feature to one not, the difference was pretty obvious and in the spot you'd expect compared to alphaToCoverage. The SP_ reg didn't have a corresponding bit set, though it also has an alphaToCoverage. Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5343>
* turnip: Use tu_cs_emit_regs() for BLEND_CONTROL.Eric Anholt2020-06-051-23/+13
| | | | | | Just a cleanup since I was in the area. Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5343>
* freedreno/computerator: fix missing dependency on generated headerRob Clark2020-06-051-0/+1
| | | | | | | | | | | | | | | Fixes: ``` ../mesa-freedreno-20.2.0_pre/src/freedreno/computerator/ir3_asm.c:25:10: fatal error: 'ir3/ir3_parser.h' file not found #include "ir3/ir3_parser.h" ^~~~~~~~~~~~~~~~~~ 1 error generated. ``` Fixes: da467817e3e ("freedreno/ir3: Move ir3 assembler to backend compiler") Signed-off-by: Rob Clark <[email protected]> Reviewed-by: Eric Engestrom <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5340>
* turnip: Simplify vertex buffer bindings.Eric Anholt2020-06-043-32/+25
| | | | | | | | We were remapping the bindings so the HW binding points were consecutive, which there's no need for. Now that we don't shuffle, we can mostly drop the dependency on the pipeline for this SDS. Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5321>
* turnip: Don't bother clamping VB size.Eric Anholt2020-06-041-3/+1
| | | | | | | From the VK spec: "All elements of pOffsets must be less than the size of the corresponding element in pBuffers" Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5321>
* turnip: Move vertex buffer bindings to SET_DRAW_STATE.Eric Anholt2020-06-041-26/+44
| | | | | | | This means that the HW can skip over the vertex buffer state when it's not used in a bin. The blob also has this behavior. Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5321>
* freedreno/a6xx: update depth-plane control regsRob Clark2020-06-042-8/+47
| | | | | | | | | | | And document the early-lrz-late-z mode. Initially I thought this would be two bits to control early-lrz vs early-z. But having early-z without early-lrz does not make sense, and the way the values line up makes an enum fit better. Signed-off-by: Rob Clark <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5298>
* freedreno/a6xx: sync registers from envytoolsRob Clark2020-06-041-1/+8
| | | | | Signed-off-by: Rob Clark <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5298>
* freedreno/ir3: split kill from no_earlyzRob Clark2020-06-043-3/+10
| | | | | | | | | Unlike other conditions which prevent early-discard of fragments, kill does not prevent early LRZ test. Split `has_kill` from `no_earlyz` so we can take advantage of this. Signed-off-by: Rob Clark <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5298>
* nir: add callback to nir_remove_dead_variables()Timothy Arceri2020-06-032-2/+3
| | | | | | | | | | | | This allows us to do API specific checks before removing variable without filling nir_remove_dead_variables() with API specific code. In the following patches we will use this to support the removal of dead uniforms in GLSL. Reviewed-by: Kenneth Graunke <[email protected]> Reviewed-by: Eric Anholt <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4797>
* turnip: fix RENDER_COMPONENTS valueJonathan Marek2020-06-022-5/+16
| | | | | | | | | | | | | | | | | | This fixes render_components being 0 when mrt_count=8, because shift by 32 is UB and in arm64 it ends up shifting by 0. This fixes tests with 8 MRTs. Fixes the 3d path sysmem CmdClearAttachments to set RENDER_COMPONENTS, as it was previously relying on tu6_emit_mrt setting it, but it is now part of the pipeline state. Also switch back to the previous behavior of not setting render components for VK_ATTACHMENT_UNUSED attachments: we don't update the MRT state for such attachments so we definitely don't want to be trying writing to those. Fixes: 078aa9df8daff60e52a66d8f ("tu: Move RENDER_COMPONENTS setting to pipeline state") Signed-off-by: Jonathan Marek <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5292>
* meson: use gnu_symbol_visibility argumentDylan Baker2020-06-017-12/+14
| | | | | | | | | | This uses a meson builtin to handle -fvisibility=hidden. This is nice because we don't need to track which languages are used, if C++ is suddenly added meson just does the right thing. Acked-by: Matt Turner <[email protected]> Reviewed-by: Eric Engestrom <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4740>
* freedreno/a6xx: document LRZ flag bufferRob Clark2020-05-291-1/+32
| | | | | | | | | Doesn't seem to be a big win, although I could still be missing something in my implementation. But might as well add the documentation. Signed-off-by: Rob Clark <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5217>
* turnip: support VkImageDrmFormatModifierExplicitCreateInfoEXTJonathan Marek2020-05-273-17/+54
| | | | | | | | | This will be used to import images which have different layout from what turnip uses by default. For example non-UBWC (linear) images from the video decoder on some hardware have a 512 pitch alignment. Signed-off-by: Jonathan Marek <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4596>
* freedreno/layout: add explicit offset/pitch argument to fdl6_layoutJonathan Marek2020-05-275-10/+34
| | | | | | | fdl6_layout will return false when the explicit pitch is not valid. Signed-off-by: Jonathan Marek <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4596>
* freedreno/ir3: Avoid {0} initializer for struct reginfoKristian H. Kristensen2020-05-261-3/+4
| | | | | | | | | | | First element is not a scalar. Just initialize the struct like we do elsewhere. src/freedreno/ir3/disasm-a3xx.c:958:33: warning: suggest braces around initialization of subobject [-Wmissing-braces] Reviewed-by: Rob Clark <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5174>
* turnip: Use {} initializer to silence warningKristian H. Kristensen2020-05-261-1/+1
| | | | | | | | | | We're already using the {} syntax elsewhere in turnip. src/freedreno/vulkan/tu_formats.c:828:71: warning: suggest braces around initialization of subobject [-Wmissing-braces] Reviewed-by: Rob Clark <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5174>
* turnip: Use tu6_reduction_mode() to avoid warningKristian H. Kristensen2020-05-261-2/+10
| | | | | | | | | | | | This makes it a little more explicit that the values line up. src/freedreno/vulkan/tu_device.c:2209:75: warning: implicit conversion from enumeration type 'const VkSamplerReductionMode' (aka 'const enum VkSamplerReductionMode') to different enumeration type 'enum a6xx_reduction_mode' [-Wenum-conversion] Reviewed-by: Rob Clark <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5174>
* turnip: Use hw enum when emitting A6XX_RB_STENCIL_CONTROLKristian H. Kristensen2020-05-261-1/+1
| | | | | | | | | | | | We're hard-coding this value, so let's use the hw enum and avoid a warning. src/freedreno/vulkan/tu_clear_blit.c:2091:19: warning: implicit conversion from enumeration type 'enum VkStencilOp' to different enumeration type 'enum adreno_stencil_op' [-Wenum-conversion] Reviewed-by: Rob Clark <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5174>
* freedreno: Use explicit *_NONE enum for undefined formatsKristian H. Kristensen2020-05-265-3/+23
| | | | | | | | This adds RB, VFMT and TFMT NONE values for a3xx-a5xx and FMT6_NONE for a6xx. Use those values instead of open coded (enum xxx) ~0 or sometimes even ~0, which triggers out-of-enum range warnings. Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5173>
* freedreno/ir3: Use RESINFO for a6xx image size queries.Eric Anholt2020-05-266-9/+43
| | | | | | | | | | | | | | | | | The closed GL driver uses resinfo on images with the writeonly flag (using the texture-path's getsize only for readonly images). The closed vulkan driver seems to use resinfo regardless. Using resinfo doesn't need any fixups after the instruction. It also avoids one of the needs for the TEX_CONST state for the image, which is awkward to set up in the GL driver. The new handler goes into ir3_a6xx to be next to the other current image code, but the a4xx version is left in place because it wants a bunch of sampler helpers. Fixes assertion failure in dEQP-VK.image.image_size.buffer.readonly_32. Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3501>
* freedreno/ir3: Move handle_bindless_cat6 to compiler_nir and reuse.Eric Anholt2020-05-263-22/+19
| | | | | | | There was an open coded version for ldc, and now we can drop that. I needed to do it for resinfo as well. Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3501>
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