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freedreno
Commit message (
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Author
Age
Files
Lines
*
freedreno/ir3: convert to "new style" frag inputs
Rob Clark
2019-03-30
2
-2
/
+33
*
freedreno/ir3: add pass to move varying loads
Rob Clark
2019-03-30
5
-0
/
+151
*
freedreno/ir3: rework varying packing
Rob Clark
2019-03-30
1
-30
/
+98
*
freedreno/ir3: re-indent comment
Rob Clark
2019-03-30
1
-4
/
+4
*
freedreno/ir3: reads/writes to unrelated arrays are not dependent
Rob Clark
2019-03-28
1
-1
/
+30
*
freedreno/ir3: sched fix
Rob Clark
2019-03-28
1
-1
/
+1
*
freedreno/ir3: Add workaround for VS samgq
Kristian H. Kristensen
2019-03-28
6
-4
/
+29
*
freedreno/ir3: Don't access beyond available regs
Kristian H. Kristensen
2019-03-28
1
-4
/
+7
*
freedreno/ir3: Push UBOs to constant file
Kristian H. Kristensen
2019-03-27
3
-12
/
+118
*
freedreno/ir3: Enable PIPE_CAP_PACKED_UNIFORMS
Kristian H. Kristensen
2019-03-27
7
-13
/
+119
*
freedreno/ir3: Fix operand order for DSX/DSY
Kristian H. Kristensen
2019-03-25
1
-0
/
+15
*
freedreno/ir3: Track whether shader needs derivatives
Kristian H. Kristensen
2019-03-25
4
-3
/
+9
*
spirv,nir: lower frexp_exp/frexp_sig inside a new NIR pass
Samuel Pitoiset
2019-03-22
1
-0
/
+1
*
freedreno/ir3: disable early-z for SSBO/image writes
Rob Clark
2019-03-22
1
-0
/
+12
*
freedreno/ir3: rename has_kill to no_earlyz
Rob Clark
2019-03-22
3
-4
/
+4
*
freedreno/ir3: dynamic UBO indexing vs 64b pointers
Rob Clark
2019-03-21
1
-2
/
+2
*
freedreno/ir3: fix bit_count
Rob Clark
2019-03-21
1
-2
/
+23
*
freedreno/ir3: additional lowering
Rob Clark
2019-03-21
1
-0
/
+6
*
freedreno/ir3: optimize sam.s2en to sam
Rob Clark
2019-03-21
3
-6
/
+36
*
freedreno/ir3: enable indirect tex/samp (sam.s2en)
Rob Clark
2019-03-21
2
-22
/
+73
*
freedreno/ir3: find # of samplers from uniform vars
Rob Clark
2019-03-21
3
-13
/
+13
*
freedreno/ir3: fix regmask for merged regs
Rob Clark
2019-03-21
2
-3
/
+13
*
freedreno/ir3: fix sam.s2en encoding
Rob Clark
2019-03-21
2
-9
/
+12
*
freedreno/ir3: fix sam.s2en decoding
Rob Clark
2019-03-21
1
-3
/
+5
*
freedreno/ir3/ra: fix half-class conflicts
Rob Clark
2019-03-21
1
-7
/
+14
*
freedreno/ir3 better cat6 encoding detection
Rob Clark
2019-03-21
2
-8
/
+24
*
anv,radv,turnip: Lower TG4 offsets with nir_lower_tex
Jason Ekstrand
2019-03-21
1
-0
/
+1
*
freedreno/ir3/a6xx: fix ssbo comp_swap
Rob Clark
2019-03-20
1
-1
/
+1
*
turnip: Deconflict vk_format_table regeneration
Bas Nieuwenhuizen
2019-03-16
1
-3
/
+3
*
turnip: Fix GCC compiles.
Bas Nieuwenhuizen
2019-03-16
1
-6
/
+3
*
freedreno/ir3/cp: fix ldib bug
Rob Clark
2019-03-15
1
-0
/
+6
*
ir3/lower_io_offsets: Try propagate SSBO's SHR into a previous shift instruction
Eduardo Lima Mitev
2019-03-13
1
-4
/
+94
*
ir3/compiler: Enable lower_io_offsets pass and handle new SSBO intrinsics
Eduardo Lima Mitev
2019-03-13
4
-60
/
+59
*
ir3/nir: Add a new pass 'ir3_nir_lower_io_offsets'
Eduardo Lima Mitev
2019-03-13
4
-0
/
+217
*
turnip: preliminary support for Wayland WSI
Chia-I Wu
2019-03-11
6
-1
/
+358
*
turnip: preliminary support for tu_GetImageSubresourceLayout
Chia-I Wu
2019-03-11
1
-5
/
+11
*
turnip: Use Vulkan 1.1 names instead of KHR
Chad Versace
2019-03-11
8
-100
/
+100
*
turnip: preliminary support for tu_CmdDraw
Chia-I Wu
2019-03-11
1
-0
/
+83
*
turnip: preliminary support for draw state binding
Chia-I Wu
2019-03-11
2
-4
/
+357
*
turnip: add draw_cs to tu_cmd_buffer
Chia-I Wu
2019-03-11
2
-3
/
+21
*
turnip: parse VkPipelineVertexInputStateCreateInfo
Chia-I Wu
2019-03-11
2
-0
/
+134
*
turnip: parse VkPipelineShaderStageCreateInfo
Chia-I Wu
2019-03-11
2
-0
/
+602
*
turnip: compile VkPipelineShaderStageCreateInfo
Chia-I Wu
2019-03-11
2
-0
/
+143
*
turnip: preliminary support for shader modules
Chia-I Wu
2019-03-11
5
-5
/
+411
*
turnip: parse VkPipeline{Multisample,ColorBlend}StateCreateInfo
Chia-I Wu
2019-03-11
3
-0
/
+355
*
turnip: parse VkPipelineDepthStencilStateCreateInfo
Chia-I Wu
2019-03-11
2
-2
/
+204
*
turnip: parse VkPipelineRasterizationStateCreateInfo
Chia-I Wu
2019-03-11
2
-0
/
+128
*
turnip: parse VkPipelineViewportStateCreateInfo
Chia-I Wu
2019-03-11
2
-1
/
+130
*
turnip: parse VkPipelineInputAssemblyStateCreateInfo
Chia-I Wu
2019-03-11
2
-0
/
+49
*
turnip: parse VkPipelineDynamicStateCreateInfo
Chia-I Wu
2019-03-11
1
-0
/
+46
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