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* spirv: Drop lower_workgroup_access_to_offsetsCaio Marcelo de Oliveira Filho2019-08-101-1/+0
* mesa: freedreno: Android.registers.mk: Fix up register xml.h file generationJohn Stultz2019-08-071-3/+34
* mesa: Add ir3/ir3_nir_imul.c generation to Android.mkJohn Stultz2019-08-071-1/+2
* meson: replace libmesa_util with idep_mesautilEric Engestrom2019-08-031-1/+1
* freedreno: update registersRob Clark2019-08-022-4/+42
* freedreno/drm: convert ring_pool to child_poolRob Clark2019-08-023-6/+29
* freedreno/drm: remove idx_lockRob Clark2019-08-023-29/+24
* freedreno: a2xx: implement texture tilingJonathan Marek2019-08-021-1/+1
* freedreno/ir3: fix for array/reg store vs meta instructionsRob Clark2019-07-291-1/+4
* freedreno: Fix data race on making the shader's id.Eric Anholt2019-07-291-1/+2
* freedreno: Take a lock around shader variant creation.Eric Anholt2019-07-292-0/+7
* freedreno: Fix data races with allocating/freeing struct ir3.Eric Anholt2019-07-291-1/+1
* anv+tu+radv: delete unusable dev_icd.jsonEric Engestrom2019-07-261-13/+0
* freedreno: Add support for drm-shim.Eric Anholt2019-07-254-0/+224
* freedreno: Convert nir_lower_tg4_to_tex to the NIR lowering helper.Eric Anholt2019-07-181-88/+51
* freedreno: Convert load_barycentric_at_sample to the NIR lowering helper.Eric Anholt2019-07-181-48/+30
* freedreno: Convert load_barycentric_at_offset to the NIR lowering helper.Eric Anholt2019-07-181-39/+19
* freedreno: Generate headers from xml filesKristian H. Kristensen2019-07-1024-23892/+14106
* tu: add exported symbols checkEric Engestrom2019-07-101-0/+13
* nir: Add lower_rotate flag and set to true in all driversSagar Ghuge2019-07-011-0/+2
* freedreno: update generated registersRob Clark2019-07-017-16/+23
* freedreno/ir3: small cleanupRob Clark2019-06-281-1/+1
* freedreno/ir3: fix missing (ss) in dummy bary.f caseRob Clark2019-06-281-0/+5
* freedreno: Only upload the used part of UBO0 to the constant buffer.Eric Anholt2019-06-242-5/+13
* freedreno: Stop treating UBO 0 specially in UBO uploading.Eric Anholt2019-06-242-7/+0
* nir: define behavior of nir_op_bfm and nir_op_u/ibfe according to SM5 spec.Daniel Schürmann2019-06-241-2/+0
* freedreno: Only upload UBO pointers for UBOs that haven't been lowered.Eric Anholt2019-06-211-1/+7
* freedreno: Remove silly return from ir3_optimize_nir().Eric Anholt2019-06-214-12/+8
* freedreno: Fix up end range of unaligned UBO loads.Eric Anholt2019-06-211-2/+3
* freedreno: Fix UBO load range detection on booleans.Eric Anholt2019-06-211-2/+1
* freedreno: Stop reporting max_const in shader-db.Eric Anholt2019-06-211-3/+1
* freedreno: Include binning shaders in shader-db.Eric Anholt2019-06-211-1/+3
* freedreno/ir3: fix typoHyunjun Ko2019-06-201-1/+1
* ir3: initialize progress false before ir3_nir_lower_imulTapani Pälli2019-06-141-1/+1
* freedreno: update generated headersRob Clark2019-06-117-53/+305
* ir3: Use the new NIR lowering pass for integer multiplicationEduardo Lima Mitev2019-06-072-17/+16
* ir3/nir: Add new NIR AlgebraicPass for lowering imulEduardo Lima Mitev2019-06-073-1/+64
* ir3/compiler: Handle new alu opcodes 'umul_low' and 'imadsh_mix16'Eduardo Lima Mitev2019-06-071-0/+6
* nir: Combine lower_fmod16/32 back into a single lower_fmod.Kenneth Graunke2019-06-051-2/+2
* gallium: Drop lower_fmod64 from drivers that don't support doubles.Kenneth Graunke2019-06-051-2/+0
* freedreno/ir3: Extend debug helpers to support TCS/TES/GSKristian H. Kristensen2019-06-053-7/+19
* freedreno/ir3: Generalize ir3_shader_disasm()Kristian H. Kristensen2019-06-051-46/+42
* freedreno: Reuse glsl_get_sampler_coordinate_components().Eric Anholt2019-06-041-25/+5
* freedreno: Improve the pi approximations in trig lowering.Eric Anholt2019-06-041-2/+2
* freedreno: Fix GCC build error.Vinson Lee2019-06-031-1/+1
* freedreno/ir3: fix counting and printing for half registers.Hyunjun Ko2019-06-032-7/+18
* freedreno/ir3: Fix up the half reg source even when src instr==NULLNeil Roberts2019-06-031-3/+2
* freedreno/ir3: Add a 16-bit implementation of nir_op_imulNeil Roberts2019-06-031-9/+15
* freedreno/ir3: set dst type of alu instructions correctly.Hyunjun Ko2019-06-031-5/+8
* freedreno/ir3: adjust the bitsize of regs when an array loading.Hyunjun Ko2019-06-032-7/+16
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