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* nir: Add a face_sysval argument to nir_lower_two_sided_colorIcecream952020-07-171-1/+1
| | | | | | | | | | This is needed for handling drivers that use an input for loading the face, for example Panfrost with Midgard GPUs. Reviewed-by: Alyssa Rosenzweig <[email protected]> Reviewed-by: Rob Clark <[email protected]> Tested-by: Urja Rannikko <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5915>
* tu: Enable VK_EXT_shader_stencil_exportConnor Abbott2020-07-163-4/+8
| | | | | | | | This passes the grand total of 3 CTS tests (2 actually enabled due to missing D32_SFLOAT_S8_UINT support) under dEQP-VK.pipeline.shader_stencil_export.* Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5936>
* ir3: Handle gl_FragStencilRefARBConnor Abbott2020-07-162-1/+4
| | | | Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5936>
* freedreno/a6xx: Add stencilref register infoConnor Abbott2020-07-161-1/+2
| | | | | | Found by guessing. Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5936>
* Android: Fixes for Q and RRoman Stratiienko2020-07-151-3/+3
| | | | | | | | | | | | | | | | Fix Android-Q build: - Use AOSP prebuilt bison by specifying $(BISON) variable - Use AOSP prebuilt flex by specifying $(LEX) variable Fix Android-R build: - Add M4 environmet variable for Android R and higher (See [1]) [1] - https://cs.android.com/android/_/android/platform/build/+/2bfffb9f48a78de12faf5da77424c0cecb70d6eb:Changes.md;dlc=997661002af1282d938e88c3c723037e42e5d283 Signed-off-by: Roman Stratiienko <[email protected]> Reviewed-by: Eric Engestrom <[email protected]> Tested-by: Mauro Rossi <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5894>
* freedreno/ir3: DCE unused arraysRob Clark2020-07-142-0/+29
| | | | | | | | | | | | Letting unused arrays stick around confuses RA, which assigns vreg names to the unused arrays, but then does not precolor them (because they are unused). This leads to an assert in ra_select_reg_merged(): skqp: ../src/freedreno/ir3/ir3_ra.c:589: name_to_instr: Assertion '!name_is_array(ctx, name)' failed. Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/3262 Signed-off-by: Rob Clark <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5907>
* freedreno/ir3/ra: be better at failingRob Clark2020-07-142-22/+41
| | | | | | | | | It doesn't happen much. But it's annoying when we hit an impossible condition deep in RA 90% thru a long test run. Add some ra_assert()/ ra_unreachable() helper macros so we can bail cleanly and fail RA. Signed-off-by: Rob Clark <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5907>
* freedreno/ir3: make compile fails more visibleRob Clark2020-07-141-2/+4
| | | | | Signed-off-by: Rob Clark <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5907>
* freedreno/regs: update a6xx PC regsJonathan Marek2020-07-143-51/+59
| | | | | | | Update some registers in the 0x9800-0xa000 range. Signed-off-by: Jonathan Marek <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5870>
* freedreno/regs: update a6xx VPC regsJonathan Marek2020-07-143-41/+49
| | | | | | | Update some registers in the 0x9000-0x95ff range. Signed-off-by: Jonathan Marek <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5870>
* freedreno/regs: update a6xx RB regsJonathan Marek2020-07-142-100/+156
| | | | | | | Update some registers in the 0x8c00-0x8dff range. Signed-off-by: Jonathan Marek <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5870>
* freedreno/regs: update a6xx GRAS registersJonathan Marek2020-07-144-129/+158
| | | | | | | Update some registers in the 0x8000-0x87ff range. Signed-off-by: Jonathan Marek <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5870>
* turnip: remove use of tu_cs_entry for draw statesJonathan Marek2020-07-144-152/+134
| | | | | | | | | | | | | | | The tu_cs_entry struct doesn't match well what we want for SET_DRAW_STATE and CP_INDIRECT_BUFFER (requires extra steps to get iova and size), so start phasing it out. Additionally, use newly added tu_cs_draw_state where it doesn't require any effort (it requires a fixed size, but gets rid of the extra end_sub_stream) Note this also changes the behavior of CmdBindDescriptorSets for compute to emit directly in cmd->cs instead of doing through a CP_INDIRECT. Signed-off-by: Jonathan Marek <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5558>
* turnip: fix inconsistencies with tu6_load_state_sizeJonathan Marek2020-07-141-6/+14
| | | | | | | The next patch assumes the correct size is returned in tu6_emit_load_state. Signed-off-by: Jonathan Marek <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5558>
* turnip: emit compute pipeline directly in CmdBindPipelineJonathan Marek2020-07-142-11/+6
| | | | | | | There's no need to defer it, and can get rid DIRTY_COMPUTE_PIPELINE. Signed-off-by: Jonathan Marek <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5558>
* turnip: use DIRTY SDS bit to avoid making copies of pipeline load state ibJonathan Marek2020-07-142-41/+21
| | | | | | | | | | | Some testing showed that the DIRTY bit has the desired behavior, so use it to make things a bit simpler. Note in CmdBindPipeline, having the TU_CMD_DIRTY_DESCRIPTOR_SETS behind a if(pipeline->layout->dynamic_offset_count) was wrong. Signed-off-by: Jonathan Marek <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5558>
* meson: fix android vulkan buildEric Engestrom2020-07-141-1/+1
| | | | | | | | | | | | | | | | Android doesn't have `pthread_cancel()` and is unlikely to ever implement it [1], but `wsi_common_display.c` needs it (or an alternative). Let's just disable the platform on Android (as it used to be before 448eb19158f483d807ef). [1] https://android-review.googlesource.com/c/platform/bionic/+/1215779/1/docs/status.md Fixes: 448eb19158f483d807ef ("vulkan: automatically compile the `display` platform when available") Signed-off-by: Eric Engestrom <[email protected]> Acked-by: Nataraj Deshpande <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5860>
* tu: Don't invalidate irrelevant state when changing pipelineConnor Abbott2020-07-141-9/+1
| | | | | | | At least in the future this could let us avoid re-emitting gfx/cs constants when the other changes. This also matches what the blob does. Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5877>
* freedreno/a6xx: Add some documentation for shared constsConnor Abbott2020-07-142-3/+23
| | | | | | | | I'm not convinced we'll actually want to use this, and there may be another enable bit in SP_UNKNOWN_AB00, but it's nice to at least write this down in case we want to try using it in the future. Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5877>
* freedreno/a6xx: Rename and document HLSQ_UPDATE_CNTLConnor Abbott2020-07-145-14/+81
| | | | | | | | | | | | | It turns out that this clears CP_LOAD_STATE6 packets, including disabling any pending loads for SS6_INDIRECT/SS6_BINDLESS (these loads don't actually happen until the draw itself, and I'm not sure if they happen if the state is unused by the shader) and marking constants and UBO descriptors loaded with SS6_DIRECT as invalid. It's used very differently from HLSQ_UPDATE_CNTL on a4xx from whence the name came, and unlike on a4xx it's not readable, so this probably doesn't line up with HLSQ_UPDATE_CNTL on a4xx. Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5877>
* freedreno/registers: Rename SP_2D_SRC_FORMATKristian H. Kristensen2020-07-142-5/+2
| | | | | | | This register contains information about the destination format, so let's rename to SP_2D_DST_FORMAT. Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5717>
* turnip: drop GS clear pathJonathan Marek2020-07-143-98/+14
| | | | | | | | | | | We didn't know how to write layer id without GS, since that's the only way to do it through VK/GL, and the blob didn't implement this clear case (and failed cases where it was absolutely necessary). However now we know how to set it after some educated guesses and looking at tess/geom traces, so the GS path can be dropped. Signed-off-by: Jonathan Marek <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5790>
* turnip: clean up primitive output stateJonathan Marek2020-07-143-94/+85
| | | | | | | | | We only need to emit one set of primitive output registers. This may differ from the blob, because it seems to try to allow using the same pipeline with tess/geom enabled/disabled. Signed-off-by: Jonathan Marek <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5790>
* freedreno/regs: update primitive output related registersJonathan Marek2020-07-144-142/+98
| | | | | Signed-off-by: Jonathan Marek <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5790>
* freedreno/ir3: Fix uninit var warning.Eric Anholt2020-07-141-1/+1
| | | | | | | It's a decent bit of analysis to see that the initialization will always happen, and my compiler isn't doing so in at least one configuration. Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5834>
* turnip: implement VK_EXT_private_dataHyunjun Ko2020-07-142-0/+60
| | | | | | | Which is using base class's implementation. Signed-off-by: Hyunjun Ko <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5539>
* turnip: Use the common base object type and struct.Hyunjun Ko2020-07-1413-128/+175
| | | | | | | | | v2. Define new helper function to avoid duplicated a pair of function calls. v3. Move new helper functions to vk_object.h and call them. v4. Merge 2 commits to use commomn base object type and struct into one. Signed-off-by: Hyunjun Ko <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5539>
* tu: Fix wrong copies of sampler descriptor.Hyunjun Ko2020-07-141-2/+2
| | | | | | | | | | Found this with the following patch but it exists since adding ycbcr sampler to the struct. Fixes: d070a7ba0cfb11f1e01774b9dd3775ab7cd0c4ea Signed-off-by: Hyunjun Ko <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5539>
* vulkan: automatically compile the `display` platform when availableEric Engestrom2020-07-101-1/+1
| | | | | | | Signed-off-by: Eric Engestrom <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]> Reviewed-by: Emil Velikov <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3161>
* freedreno/ir3: run nir_opt_loop_unroll in optimization loopJonathan Marek2020-07-091-0/+1
| | | | | | | | GL driver was relying on this being done by gallium, but there might be new loops to unroll during optimizations and turnip needs it. Signed-off-by: Jonathan Marek <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5818>
* freedreno/ir3: fix setup_input for sparse vertex inputsJonathan Marek2020-07-091-7/+9
| | | | | | | | | | | | | | | With turnip we can have sparse input variables like: decl_var shader_in INTERP_MODE_NONE float @1 (VERT_ATTRIB_GENERIC1.x, 1, 0) decl_var shader_in INTERP_MODE_NONE float @2 (VERT_ATTRIB_GENERIC1.y, 1, 0) decl_var shader_in INTERP_MODE_NONE float @3 (VERT_ATTRIB_GENERIC1.w, 1, 0) Example of a test fixed: dEQP-VK.glsl.440.linkage.varying.component.vert_in.vec2.as_float_float_unused Signed-off-by: Jonathan Marek <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5818>
* turnip: fix active_desc_sets not being set for compute pipelineJonathan Marek2020-07-091-0/+2
| | | | | | | | This resulted in the load state being always empty. Its an optimization, so it didn't result in any failures. Signed-off-by: Jonathan Marek <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5816>
* freedreno/layout: layout simplifications and pitch from level 0 pitchJonathan Marek2020-07-0810-128/+111
| | | | | | | | | | | | This updates a3xx/a4xx/a5xx to fix the fetchsize to "PITCHALIGN" (called "MINLINEOFFSET" by the a3xx docs), and some simplifications to make things more like a6xx. Also similar simplifications for a2xx layout code. The pitch can always be determined using a simple calculation from the base level pitch, so don't pre-calculate a pitch for each mipmap level. Signed-off-by: Jonathan Marek <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5796>
* freedreno/regs: document CS shared storage size bitJonathan Marek2020-07-081-1/+10
| | | | | Signed-off-by: Jonathan Marek <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5797>
* freedreno/ir3: add support for a650 tess shared storageJonathan Marek2020-07-086-5/+29
| | | | | | | | A650 uses LDL/STL, and the "local_primitive_id" in tess ctrl shader comes from bits 16-21 in the header instead of 0-5. Signed-off-by: Jonathan Marek <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5764>
* turnip: use global bo for clear blit shadersJonathan Marek2020-07-073-94/+103
| | | | | | | | | Fill the global bo will all possible shaders for 3D clear/blit. Note the global bo size is still <4k (so this doesn't cost any extra memory), this saves having to allocate shaders in sub_cs everytime the 3D path is used. Signed-off-by: Jonathan Marek <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5776>
* freedreno: Sync registers with envytoolsConnor Abbott2020-07-073-12/+136
| | | | Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5557>
* freedreno: Include adreno_pm4.xml.h before adreno_a6xx.xml.hConnor Abbott2020-07-073-0/+3
| | | | | | | This matches the XML, and soon adreno_a6xx.xml will start including types from adreno_pm4.xml. Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5557>
* tu: Force gl_Layer to 0 when necessaryConnor Abbott2020-07-071-0/+4
| | | | | | | In particular this will help us implement input attachments correctly with layered rendering. Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5732>
* ir3: Add layer_zero variant bitConnor Abbott2020-07-073-0/+67
| | | | Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5732>
* ir3: use empirical size for params as used by the shaderIlia Mirkin2020-07-061-1/+2
| | | | | | | | | | | | For example only some UCPs may be used by the shader, triggering asserts that too many consts are being uploaded. While we're at it, also fix the const size when loading UCPs, since otherwise it doesn't correspond to what the shader is actually using. Signed-off-by: Ilia Mirkin <[email protected]> Reviewed-by: Rob Clark <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5752>
* tu: Enable KHR_variable_pointersConnor Abbott2020-07-063-4/+6
| | | | | | | Passes dEQP-VK.spirv_assembly.instruction.graphics.variable_pointers.* and dEQP-VK.spirv_assembly.instruction.compute.variable_pointers.* Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5684>
* tu: Rewrite variable loweringConnor Abbott2020-07-061-12/+166
| | | | | | | | | | Don't lower to offsets, instead use nir_lower_explicit_io here and use actual pointers for UBO's and SSBO's. This makes KHR_variable_pointers trivial. This also fixes asserts with shared variables, which are now supposed to be lowered with nir_lower_explicit_io. Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5684>
* freedreno: Only call nir_lower_io on shader_in/outJason Ekstrand2020-07-061-2/+2
| | | | | | | | | | Gallium drivers should never see nir_var_uniform because gallium lowers regular uniforms to a UBO. No GL driver should ever see either nir_var_mem_shared because that's lowered in GLSL IR. Reviewed-by: Eric Anholt <[email protected]> Reviewed-by: Connor Abbott <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5418>
* ir3: mark ucp_enables as allowed values on all keysIlia Mirkin2020-07-061-0/+2
| | | | | | | | Both vertex and fragment shaders need to have the lowering. Signed-off-by: Ilia Mirkin <[email protected]> Reviewed-by: Rob Clark <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5751>
* a4xx: add noperspective interpolation supportIlia Mirkin2020-07-061-6/+11
| | | | | | Signed-off-by: Ilia Mirkin <[email protected]> Reviewed-by: Rob Clark <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5753>
* freedreno/regs: document SS6_UBO state srcJonathan Marek2020-07-061-0/+8
| | | | | | | Document this new a6xx_state_src value seen in A640/A650 tess traces. Signed-off-by: Jonathan Marek <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5760>
* freedreno/fdperf: prefer render nodeRob Clark2020-07-061-1/+1
| | | | | | | | Avoid inadvertantly becoming master if fdperf happens to be the first thing to open the device. Signed-off-by: Rob Clark <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5762>
* freedreno/fdperf: better compatible string matchingRob Clark2020-07-061-4/+32
| | | | | | | | | | | | | | | | Previously we would match the start of the compatible string, in a couple of cases, in order to match compatible strings like "qcom,adreno-630.2". But these cases would always list a more generic compatible (ie. "qcom,adreno") as a later choice. So if we parse all the compatible strings, we can do a more precise exact match. This avoids us accidentially matching on "qcom,adreno-smmu" and the hilarity that ensues. Fixes: 5a13507164a ("freedreno/perfcntrs: add fdperf") Signed-off-by: Rob Clark <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5762>
* freedreno/fdperf: fix print of base addressRob Clark2020-07-061-1/+1
| | | | | Signed-off-by: Rob Clark <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5762>
generated by cgit v1.2.3 (git 2.39.1) at 2024-12-19 17:41:19 +0000