aboutsummaryrefslogtreecommitdiffstats
path: root/src/freedreno/ir3/ir3_ra.c
Commit message (Expand)AuthorAgeFilesLines
* freedreno/ir3/ra: be better at failingRob Clark2020-07-141-22/+28
* ir3: Include ir3_compiler from ir3_shaderConnor Abbott2020-06-261-1/+1
* freedreno/ir3/ra: fix pre-color edge caseRob Clark2020-06-251-7/+3
* freedreno/ir3: make mergedregs a property of the variantRob Clark2020-06-181-2/+2
* freedreno/ir3: decouple regset from gpu genRob Clark2020-06-181-1/+2
* freedreno/ir3: limit pre-fetched tex destRob Clark2020-06-111-2/+19
* freedreno/ir3/validate: add checking for types and opcodesRob Clark2020-05-191-59/+0
* freedreno/ir3: make input/output iterators declare cursor ptrRob Clark2020-05-191-2/+0
* freedreno/ir3: make foreach_src declare cursor ptrRob Clark2020-05-191-4/+0
* freedreno/ir3: juggle around ir3_debug_print()Rob Clark2020-05-191-2/+2
* freedreno/ir3: Fix register allocation assertion failures.Eric Anholt2020-05-011-13/+28
* freedreno/ir3/ra: only assign array base in first passRob Clark2020-04-281-1/+2
* freedreno/ir3/ra: split out helper for array assignmentRob Clark2020-04-281-48/+58
* freedreno/ir3/ra: use ir3_debug_print helperRob Clark2020-04-281-8/+2
* freedreno/ir3/ra: remove unused variableRob Clark2020-04-281-2/+0
* ir3/ra: Fix off-by-one issues with live-range extensionConnor Abbott2020-04-181-1/+10
* freedreno/ir3/ra: handle array case for SFU select_reg optRob Clark2020-04-131-3/+10
* freedreno/ir3: Fix sz vs class confusionKristian H. Kristensen2020-04-101-3/+3
* ir3: Plumb through support for a1.xConnor Abbott2020-04-091-1/+1
* freedreno/ir3: fixup cat3 32b vs 16bRob Clark2020-04-041-33/+15
* freedreno/ir3/ra: pick higher numbered scalars in first passRob Clark2020-03-271-16/+79
* freedreno/ir3/ra: compute register target from liverangesRob Clark2020-03-271-73/+209
* freedreno/ir3/ra: fix array liverangesRob Clark2020-03-271-1/+1
* freedreno/ir3/ra: add def/use iteratorsRob Clark2020-03-271-133/+43
* freedreno/ir3/ra: drop extending output live-rangesRob Clark2020-03-271-7/+0
* freedreno/ir3/ra: add helper to map name to arrayRob Clark2020-03-271-1/+24
* freedreno/ir3/ra: fix target register calculationRob Clark2020-03-271-1/+1
* freedreno/ir3/ra: add helper to map name to instructionRob Clark2020-03-271-23/+36
* freedreno/ir3/ra: split-upRob Clark2020-03-271-352/+2
* freedreno/ir3/ra: add debug option for RA debug msgsRob Clark2020-03-271-13/+29
* freedreno/ir3: small cleanup and commentsRob Clark2020-03-271-4/+10
* freedreno/ir3: round-robin RARob Clark2020-03-101-4/+163
* freedreno/ir3: track register usage in first RA passRob Clark2020-03-101-0/+41
* freedreno/ir3: don't precolor unassigned inputsRob Clark2020-02-281-0/+3
* freedreno/ir3: track half-precision live valuesRob Clark2020-02-281-12/+0
* freedreno/ir3: handle half registers for arrays during register allocation.Hyunjun Ko2020-02-241-9/+34
* freedreno/ir3: Add cat4 mediump opcodesHyunjun Ko2020-02-071-0/+15
* freedreno/ir3: add RA sanity checkRob Clark2020-02-011-0/+33
* freedreno/ir3: two pass register allocationRob Clark2020-02-011-58/+297
* freedreno/ir3: don't precolor unused inputsRob Clark2020-02-011-1/+2
* freedreno/ir3: post-RA sched passRob Clark2020-02-011-5/+2
* freedreno/ir3/ra: make use()/def() functions instead of macrosRob Clark2020-02-011-15/+24
* freedreno/ir3: a bit more optmsgs debugRob Clark2020-02-011-0/+10
* freedreno/ir3: fix crash when no non-input instructionsRob Clark2020-02-011-1/+1
* ir3: Set up full/half register conflicts correctlyKristian H. Kristensen2020-01-091-2/+1
* freedreno/ir3: add iterator macrosRob Clark2019-12-131-18/+18
* freedreno/ir3: fixup when changing to mad.f16Hyunjun Ko2019-11-201-1/+5
* freedreno/ir3: fix gpu hang with pre-fs-tex-fetchRob Clark2019-11-121-0/+12
* freedreno/ir3: add input/output iteratorsRob Clark2019-11-121-5/+3
* freedreno/ir3: rename fanin/fanout to collect/splitRob Clark2019-11-121-11/+11
generated by cgit v1.2.3 (git 2.39.1) at 2024-12-20 07:43:47 +0000