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path: root/src/freedreno/ir3/ir3_compiler_nir.c
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* freedreno/ir3: add support for load_draw_idJonathan Marek2020-06-251-0/+6
* freedreno/ir3: pass variant to ir3_create()Rob Clark2020-06-191-1/+1
* freedreno/ir3: move ubo_state into const_stateRob Clark2020-06-191-1/+1
* freedreno/ir3: add accessor for const_stateRob Clark2020-06-191-7/+10
* freedreno/ir3: pass variant to postschedRob Clark2020-06-181-1/+1
* ir3: Don't calculate num_samp ourselvesConnor Abbott2020-06-171-9/+5
* freedreno/ir3: add post-scheduler cp passRob Clark2020-06-161-0/+5
* freedreno/ir3: don't rely on intr->num_componentsRob Clark2020-06-161-17/+17
* freedreno/ir3: respect tex prefetch limitsRob Clark2020-06-111-1/+7
* freedreno/ir3: split kill from no_earlyzRob Clark2020-06-041-1/+1
* freedreno/ir3: Use RESINFO for a6xx image size queries.Eric Anholt2020-05-261-3/+4
* freedreno/ir3: Move handle_bindless_cat6 to compiler_nir and reuse.Eric Anholt2020-05-261-5/+12
* freedreno/ir3: add simple validate passRob Clark2020-05-191-0/+1
* freedreno/ir3: fix mismatched wrmask for overlapping VS inputsRob Clark2020-05-191-0/+33
* freedreno/ir3: make input/output iterators declare cursor ptrRob Clark2020-05-191-5/+2
* freedreno/ir3: be iterativeRob Clark2020-05-191-4/+14
* freedreno/ir3: move where we preserve binning pass inputsRob Clark2020-05-191-17/+16
* freedreno/ir3: add IR3_PASS() macroRob Clark2020-05-191-24/+8
* freedreno/ir3/postsched: report progressRob Clark2020-05-191-1/+1
* freedreno/ir3: juggle around ir3_debug_print()Rob Clark2020-05-191-9/+12
* freedreno/ir3: remove Sethi-Ullman numbering passRob Clark2020-05-191-5/+0
* freedreno/ir3: avoid applying (sat) on bary.fIlia Mirkin2020-05-171-0/+5
* ir3: Fixup dual-source blending slotConnor Abbott2020-05-141-0/+1
* freedreno/ir3: use lower_wrmasks passRob Clark2020-05-131-27/+13
* freedreno/ir3: Drop wrmask for ir3 local and global store intrinsicsKristian H. Kristensen2020-05-131-30/+9
* freedreno/ir3: limit # of tex prefetch by shader sizeRob Clark2020-05-131-1/+1
* freedreno: Fix non-constbuf-upload UBO block indices and count.Eric Anholt2020-05-121-4/+1
* freedreno,tu: Don't request fragcoord components not being read.Hyunjun Ko2020-05-081-3/+5
* freedreno/ir3: Sync some new changes from envytools.Eric Anholt2020-05-041-2/+2
* freedreno/ir3: Set up outputs for multi-slot varyings.Eric Anholt2020-05-011-20/+25
* freedreno/ir3: Stop initializing regid of so->outputs during setup.Eric Anholt2020-05-011-1/+0
* freedreno/ir3: Fix the a3xx TF outputs stores.Eric Anholt2020-05-011-1/+1
* freedreno/ir3: Set up the block predecessors for a3xx TFEric Anholt2020-05-011-2/+7
* freedreno/ir3: Leave bools as 1-bit, storing them in full regs.Eric Anholt2020-04-301-116/+108
* freedreno/ir3: Drop redundant IR3_REG_HALF setup in ALU ops.Eric Anholt2020-04-301-6/+0
* ir3: Remove VARYING_SLOT_PNTC remapping hackConnor Abbott2020-04-251-12/+0
* freedreno/ir3: set even bit for f2f16_rtneJonathan Marek2020-04-241-2/+7
* freedreno/ir3: Fix sizing of the inputs/outputs array.Eric Anholt2020-04-231-13/+2
* ir3: Don't double-insert the first blockConnor Abbott2020-04-221-1/+0
* freedreno/ir3: Drop handling FRAG_RESULT_DEPTH writing to .zEric Anholt2020-04-211-3/+1
* ir3: Fix LDC offset unitsConnor Abbott2020-04-151-9/+5
* freedreno/ir3: fix emit_tex_info split_destJonathan Marek2020-04-141-2/+1
* ir3: Fix txs with bindlessConnor Abbott2020-04-141-3/+3
* freedreno/ir3: rename depth->dceRob Clark2020-04-131-2/+2
* freedreno/ir3: CSE the up/downconversion of SEL's cond's size.Eric Anholt2020-04-131-7/+18
* freedreno/ir3: Stop doing b2n on the SEL condition.Eric Anholt2020-04-131-3/+10
* ir3: Plumb through bindless supportConnor Abbott2020-04-091-56/+306
* ir3: Plumb through support for a1.xConnor Abbott2020-04-091-7/+10
* freedreno/turnip: Use the NIR info to decide if we need helper invocations.Eric Anholt2020-03-311-0/+4
* freedreno/ir3: add bary_ij as src for meta:tex_prefetchRob Clark2020-03-271-9/+4
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