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path: root/src/freedreno/ir3/ir3.c
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* freedreno/ir3: Use RESINFO for a6xx image size queries.Eric Anholt2020-05-261-0/+2
* freedreno: Set the immediate flag in a4/a5xx resinfos.Eric Anholt2020-05-261-5/+5
* freedreno: Fix resinfo asm, which doesn't have srcs besides IBO number.Eric Anholt2020-05-261-14/+20
* freedreno/ir3: add helpers to deal with src/dst typesRob Clark2020-05-191-0/+66
* freedreno/ir3: make foreach_ssa_src declar cursor ptrRob Clark2020-05-191-2/+0
* freedreno/ir3: Define the bindful uniform/nonuniform desc modes for cat6 a6xx.Eric Anholt2020-05-041-3/+4
* freedreno/ir3: Sync some new changes from envytools.Eric Anholt2020-05-041-12/+3
* freedreno/ir3: Set up the block predecessors for a3xx TFEric Anholt2020-05-011-0/+1
* ir3/ra: Fix off-by-one issues with live-range extensionConnor Abbott2020-04-181-1/+23
* ir3: Fix LDC offset unitsConnor Abbott2020-04-151-1/+1
* freedreno/ir3: rename depth->dceRob Clark2020-04-131-1/+0
* freedreno/ir3: add mov/cov statsRob Clark2020-04-131-3/+8
* freedreno/ir3: make falsedep use's optionalRob Clark2020-04-131-2/+4
* ir3: Plumb through bindless supportConnor Abbott2020-04-091-13/+45
* ir3: LDC also has a destinationConnor Abbott2020-04-091-1/+1
* ir3: Plumb through support for a1.xConnor Abbott2020-04-091-1/+8
* ir3: Add bindless instruction encodingConnor Abbott2020-04-091-22/+23
* freedreno/ir3: add a pass to collect SSA usesRob Clark2020-04-041-0/+24
* freedreno/ir3: add simplified stall estimationRob Clark2020-03-101-1/+11
* freedreno/ir3: fix assert with getinfoRob Clark2020-02-281-2/+3
* freedreno/ir3: remove unused tex arg harderRob Clark2020-02-011-14/+6
* freedreno/ir3: number instructions from oneRob Clark2020-02-011-1/+1
* freedreno/ir3: rename instructionsRob Clark2020-01-151-1/+8
* freedreno/ir3: add iterator macrosRob Clark2019-12-131-9/+9
* freedreno/ir3: add last-baryf shaderdb statRob Clark2019-12-131-0/+4
* freedreno/ir3: re-work shader inputs/outputsRob Clark2019-11-121-7/+1
* freedreno/ir3: fix valgrind complaint with STLWRob Clark2019-11-121-1/+1
* freedreno/ir3: also track # of nops for shader-dbRob Clark2019-11-091-0/+3
* freedreno/ir3: Add new synchronization opcodesKristian H. Kristensen2019-11-071-0/+3
* freedreno/a6xx: Add register offset for STG/LDGKristian H. Kristensen2019-11-071-7/+26
* freedreno/ir3: remove restrictions on const + (abs)/(neg)Rob Clark2019-10-241-4/+6
* freedreno/ir3: Add new LDLW/STLW instructionsKristian H. Kristensen2019-10-171-2/+2
* freedreno/ir3: Use third register for offset for LDL and LDLVKristian H. Kristensen2019-10-171-5/+9
* freedreno: Fix invalid read when a block has no instructions.Eric Anholt2019-09-161-2/+3
* freedreno/ir3: assert that only single addressRob Clark2019-09-061-0/+4
* freedreno: Fix data races with allocating/freeing struct ir3.Eric Anholt2019-07-291-1/+1
* freedreno/ir3: fixes for half reg in/outRob Clark2019-04-301-7/+7
* freedreno/ir3: remove bogus assertRob Clark2019-04-251-2/+0
* freedreno/ir3: more emit-cat5 fixesRob Clark2019-04-251-0/+2
* freedreno/ir3: Add workaround for VS samgqKristian H. Kristensen2019-03-281-1/+2
* freedreno/ir3: Don't access beyond available regsKristian H. Kristensen2019-03-281-4/+7
* freedreno/ir3: Fix operand order for DSX/DSYKristian H. Kristensen2019-03-251-0/+15
* freedreno/ir3: fix regmask for merged regsRob Clark2019-03-211-0/+3
* freedreno/ir3: fix sam.s2en encodingRob Clark2019-03-211-9/+9
* freedreno/ir3: include nopN in expanded instruction countRob Clark2019-03-031-1/+1
* freedreno/ir3: use nopN encoding when possibleRob Clark2019-02-261-5/+23
* freedreno/ir3: sync instr/disasm and add ldib encodingRob Clark2019-02-201-2/+17
* freedreno/ir3: add a6xx instruction encodingRob Clark2019-02-161-0/+90
* freedreno: move ir3 to common locationRob Clark2018-11-271-0/+941
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