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src
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freedreno
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ir3
/
ir3.c
Commit message (
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Author
Age
Files
Lines
*
freedreno/ir3: rename instructions
Rob Clark
2020-01-15
1
-1
/
+8
*
freedreno/ir3: add iterator macros
Rob Clark
2019-12-13
1
-9
/
+9
*
freedreno/ir3: add last-baryf shaderdb stat
Rob Clark
2019-12-13
1
-0
/
+4
*
freedreno/ir3: re-work shader inputs/outputs
Rob Clark
2019-11-12
1
-7
/
+1
*
freedreno/ir3: fix valgrind complaint with STLW
Rob Clark
2019-11-12
1
-1
/
+1
*
freedreno/ir3: also track # of nops for shader-db
Rob Clark
2019-11-09
1
-0
/
+3
*
freedreno/ir3: Add new synchronization opcodes
Kristian H. Kristensen
2019-11-07
1
-0
/
+3
*
freedreno/a6xx: Add register offset for STG/LDG
Kristian H. Kristensen
2019-11-07
1
-7
/
+26
*
freedreno/ir3: remove restrictions on const + (abs)/(neg)
Rob Clark
2019-10-24
1
-4
/
+6
*
freedreno/ir3: Add new LDLW/STLW instructions
Kristian H. Kristensen
2019-10-17
1
-2
/
+2
*
freedreno/ir3: Use third register for offset for LDL and LDLV
Kristian H. Kristensen
2019-10-17
1
-5
/
+9
*
freedreno: Fix invalid read when a block has no instructions.
Eric Anholt
2019-09-16
1
-2
/
+3
*
freedreno/ir3: assert that only single address
Rob Clark
2019-09-06
1
-0
/
+4
*
freedreno: Fix data races with allocating/freeing struct ir3.
Eric Anholt
2019-07-29
1
-1
/
+1
*
freedreno/ir3: fixes for half reg in/out
Rob Clark
2019-04-30
1
-7
/
+7
*
freedreno/ir3: remove bogus assert
Rob Clark
2019-04-25
1
-2
/
+0
*
freedreno/ir3: more emit-cat5 fixes
Rob Clark
2019-04-25
1
-0
/
+2
*
freedreno/ir3: Add workaround for VS samgq
Kristian H. Kristensen
2019-03-28
1
-1
/
+2
*
freedreno/ir3: Don't access beyond available regs
Kristian H. Kristensen
2019-03-28
1
-4
/
+7
*
freedreno/ir3: Fix operand order for DSX/DSY
Kristian H. Kristensen
2019-03-25
1
-0
/
+15
*
freedreno/ir3: fix regmask for merged regs
Rob Clark
2019-03-21
1
-0
/
+3
*
freedreno/ir3: fix sam.s2en encoding
Rob Clark
2019-03-21
1
-9
/
+9
*
freedreno/ir3: include nopN in expanded instruction count
Rob Clark
2019-03-03
1
-1
/
+1
*
freedreno/ir3: use nopN encoding when possible
Rob Clark
2019-02-26
1
-5
/
+23
*
freedreno/ir3: sync instr/disasm and add ldib encoding
Rob Clark
2019-02-20
1
-2
/
+17
*
freedreno/ir3: add a6xx instruction encoding
Rob Clark
2019-02-16
1
-0
/
+90
*
freedreno: move ir3 to common location
Rob Clark
2018-11-27
1
-0
/
+941