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* mesa/glsl: move TransformFeedbackBufferStride to gl_shaderTimothy Arceri2017-01-193-40/+38
| | | | | | | | | | Here we remove the single use of this field in gl_linked_shader which allows us to move the field out of gl_shader_info While we are at it we rewrite link_xfb_stride_layout_qualifiers() to be more clear. Reviewed-by: Lionel Landwerlin <[email protected]>
* glsl: exit loop early if we find xfb layout qualifersTimothy Arceri2017-01-191-0/+1
| | | | Reviewed-by: Lionel Landwerlin <[email protected]>
* glsl: set InnerCoverage directly in gl_programTimothy Arceri2017-01-192-3/+2
| | | | | | Also move out of the shared gl_shader_info. Reviewed-by: Lionel Landwerlin <[email protected]>
* glsl: tidy up PostDepthCoverage shader fieldTimothy Arceri2017-01-192-2/+2
| | | | | | | There is no reason for this to be in the shared gl_shader_info or to copy it to gl_program at the end of linking (its already there). Reviewed-by: Lionel Landwerlin <[email protected]>
* mesa/glsl: move pixel_center_integer to gl_shaderTimothy Arceri2017-01-192-6/+4
| | | | | | | This is only used by gl_linked_shader as a temp during linking so use a temp there instead. Reviewed-by: Lionel Landwerlin <[email protected]>
* mesa/glsl: move origin_upper_left to gl_shaderTimothy Arceri2017-01-192-6/+4
| | | | | | | This is only used by gl_linked_shader as a temp during linking so use a temp there instead. Reviewed-by: Lionel Landwerlin <[email protected]>
* mesa/glsl: move uses_gl_fragcoord to gl_shaderTimothy Arceri2017-01-192-8/+6
| | | | | | | This is only used by gl_linked_shader as a temp during linking so use a temp there instead. Reviewed-by: Lionel Landwerlin <[email protected]>
* mesa/glsl: move redeclares_gl_fragcoord to gl_shaderTimothy Arceri2017-01-192-15/+9
| | | | | | | This is never used in gl_linked_shader other than as a temp during linking so just use a temp instead. Reviewed-by: Lionel Landwerlin <[email protected]>
* mesa/glsl: move ARB_fragment_coord_conventions_enable fieldTimothy Arceri2017-01-192-2/+2
| | | | | | | This is only used by gl_shader not gl_linked_shader so move it there. Reviewed-by: Lionel Landwerlin <[email protected]>
* st/mesa/glsl: set early_fragment_tests directly in shader_infoTimothy Arceri2017-01-192-3/+3
| | | | | | | We also move EarlyFragmentTests out of the gl_shader_info struct as it is now only used by gl_shader. Reviewed-by: Lionel Landwerlin <[email protected]>
* mesa/glsl/i965: set and use tcs vertices_out directlyTimothy Arceri2017-01-191-12/+12
| | | | Reviewed-by: Lionel Landwerlin <[email protected]>
* mesa/glsl: move ProgramResourceList to gl_shader_program_dataTimothy Arceri2017-01-191-10/+10
| | | | | | | | | | We also move NumProgramResourceList at the same time. GLES does interface validation on SSO at runtime so we need to move this to be able to switch to storing gl_program pointers in CurrentProgram. Reviewed-by: Lionel Landwerlin <[email protected]>
* glsl: store number of explicit uniform loactions in gl_shader_programTimothy Arceri2017-01-193-29/+20
| | | | | | | | | This allows us to cleanup the functions that pass this count around, but more importantly we will be able to call the uniform linking functions from that backends linker without having to pass this information to the backend directly via Driver.LinkShader(). Reviewed-by: Kenneth Graunke <[email protected]>
* glsl: create a new link_and_validate_uniforms() helperTimothy Arceri2017-01-191-9/+17
| | | | | | | | | Currently this just breaks up the linking code a bit but in the future i965 will call this from the backend via Driver.LinkShader() so that we can do NIR optimisations before assigning uniform locations. Reviewed-by: Kenneth Graunke <[email protected]>
* glsl: make a bunch of varying linking functions staticTimothy Arceri2017-01-192-53/+6
| | | | Reviewed-by: Kenneth Graunke <[email protected]>
* glsl: move more varying linking code to link_varyings.cppTimothy Arceri2017-01-193-148/+161
| | | | Reviewed-by: Kenneth Graunke <[email protected]>
* utils: build sha1/disk cache only with Android/AutoconfEmil Velikov2017-01-181-0/+5
| | | | | | | | | | Earlier commit imported a SHA1 implementation and relaxed the SHA1 and disk cache handling, broking the Windows builds. Restrict things for now until we get to a proper fix. Fixes: d1efa09d342 "util: import sha1 implementation from OpenBSD" Signed-off-by: Emil Velikov <[email protected]>
* util: import sha1 implementation from OpenBSD17.0-branchpointEmil Velikov2017-01-181-5/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | At the moment we support 5+ different implementations each with varying amount of bugs - from thread safely problems [1], to outright broken implementation(s) [2] In order to accommodate these we have 150+ lines of configure script and extra two configure toggles. Whist an actual implementation being ~200loc and our current compat wrapping ~250. Let's not forget that different people use different code paths, thus effectively makes it harder to test and debug since the default implementation is automatically detected. To minimise all these lovely experiences, import the "100% Public Domain" OpenBSD sha1 implementation. Clearly document any changes needed to get building correctly, since many/most of those can be upstreamed making future syncs easier. As an added bonus this will avoid all the 'fun' experiences trying to integrate it with the Android and SCons builds. v2: Manually expand __BEGIN_DECLS/__END_DECLS and document (Tapani). Furthermore it seems that some games (or surrounding runtime) static link against OpenSSL resulting in conflicts. For more information see the discussion thread [3] Bugzilla [1]: https://bugs.freedesktop.org/show_bug.cgi?id=94904 Bugzilla [2]: https://bugs.freedesktop.org/show_bug.cgi?id=97967 [3] https://lists.freedesktop.org/archives/mesa-dev/2017-January/140748.html Cc: Mark Janes <[email protected]> Cc: Vinson Lee <[email protected]> Cc: Tapani Pälli <[email protected]> Cc: Jonathan Gray <[email protected]> Tested-by: Jonathan Gray <[email protected]> Signed-off-by: Emil Velikov <[email protected]> Acked-by: Tapani Pälli <[email protected]> (v1) Acked-by: Jason Ekstrand <[email protected]> (v1)
* glsl: Make copy propagation not panic when it sees an intrinsic.Kenneth Graunke2017-01-171-4/+27
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | A number of games have large arrays of constants, which we promote to uniforms. This introduces copies from the uniform array to the original temporary array. Normally, copy propagation eliminates those copies, making everything refer to the uniform array directly. A number of shaders in "Deus Ex: Mankind Divided" recently exposed a limitation of copy propagation - if we had any intrinsics (i.e. image access in a compute shader), we weren't able to get rid of these copies. That meant that any variable indexing remained on the temporary array rather being moved to the uniform array. i965's scalar backend currently doesn't support indirect addressing of temporary arrays, which meant lowering it to if-ladders. This was horrible. According to Marek, on radeonsi/GCN, "F1 2015" uses 64% less spilled-temp-array memory. On i965/Skylake: total instructions in shared programs: 13362954 -> 13329878 (-0.25%) instructions in affected programs: 43745 -> 10669 (-75.61%) helped: 12 HURT: 0 total cycles in shared programs: 248081010 -> 245949178 (-0.86%) cycles in affected programs: 4597930 -> 2466098 (-46.37%) helped: 12 HURT: 0 total spills in shared programs: 9493 -> 9507 (0.15%) spills in affected programs: 25 -> 39 (56.00%) helped: 0 HURT: 1 total fills in shared programs: 12127 -> 12197 (0.58%) fills in affected programs: 110 -> 180 (63.64%) helped: 0 HURT: 1 Helps Deus Ex: Mankind Divided. The one shader with hurt spills/fills is from Tomb Raider at Ultra settings, but that same shader has a -39.55% reduction in instructions and -14.09% reduction in cycle counts, so it seems like a win there as well. Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Timothy Arceri <[email protected]> Reviewed-by: Matt Turner <[email protected]>
* glsl: avoid treating fb fetches as output reads to be loweredIlia Mirkin2017-01-161-1/+1
| | | | | Signed-off-by: Ilia Mirkin <[email protected]> Reviewed-by: Nicolai Hähnle <[email protected]>
* nir/gcm: fix a bug with metadata handlingConnor Abbott2017-01-141-3/+3
| | | | | | | | | | | We were using impl->num_blocks, but that isn't guaranteed to be up-to-date until after the block_index metadata is required. If we were unlucky, this could lead to overwriting memory. Noticed by inspection. Signed-off-by: Connor Abbott <[email protected]> Reviewed-by: Jason Ekstrand <[email protected]>
* nir: optimise min/max fadd combosTimothy Arceri2017-01-142-0/+26
| | | | | | | | | | | | | | | | shader-db results BDW: total instructions in shared programs: 13060410 -> 13060313 (-0.00%) instructions in affected programs: 24533 -> 24436 (-0.40%) helped: 88 HURT: 0 total cycles in shared programs: 256585692 -> 256586698 (0.00%) cycles in affected programs: 647290 -> 648296 (0.16%) helped: 35 HURT: 30 Reviewed-by: Matt Turner <[email protected]>
* nir/gcm: Fix a typo in a commentJason Ekstrand2017-01-121-1/+1
| | | | Reported-by: Matt Turner <[email protected]>
* nir/gcm: Rework the schedule late loopJason Ekstrand2017-01-121-5/+6
| | | | | | | | | | | | This fixes a bug in code motion that occurred when the best block is the same as the schedule early block. In this case, because we're checking (lca != def->parent_instr->block) at the top of the loop, we never get to the check for loop depth so we wouldn't move it out of the loop. This commit reworks the loop to be a simple for loop up the dominator chain and we place the (lca != def->parent_instr->block) check at the end of the loop. Reviewed-by: Matt Turner <[email protected]>
* spirv: Handle patch decorations up-frontJason Ekstrand2017-01-121-0/+23
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Once again, SPIR-V is insane... It allows you to place "patch" decorations on structure members. Presumably, this is so that you can do something such as out struct S { layout(location = 0) patch vec4 thing1; layout(location = 0) vec4 thing2; } str; And have your I/O "nicely" organized. While this is a bit silly, it's allowed and well-defined so whatever. Where it really gets interesting is when you have an array of struct. SPIR-V says nothing about not allowing you to have those qualifiers on the members of a struct that's inside an array and GLSLang does this. Specifically, if you have layout(location = 0) out patch struct S { vec4 thing1; vec4 thing2; } str[2]; then GLSLang will place the "patch" decorations on the struct members. This is ridiculous there is no way that having some of them be patch and some not would be well-defined given that patch and non-patch outputs are in effectively different storage classes. This commit moves around the way we handle the "patch" decoration so that we can detect even the crazy cases and handle them. Fixes: dEQP-VK.tessellation.user_defined_io.per_patch_block_array.* Reviewed-by: Kenneth Graunke <[email protected]>
* spirv: fix typo in warning messageIago Toral Quiroga2017-01-121-1/+1
| | | | Reviewed-by: Samuel Iglesias Gonsálvez <[email protected]>
* spirv: Shut up unhandled enumeration value warnings.Kenneth Graunke2017-01-111-0/+2
| | | | | | We don't want to do anything for the other cases. Signed-off-by: Kenneth Graunke <[email protected]>
* nir: don't turn ieq/ine into inot if used by an ifTimothy Arceri2017-01-122-2/+8
| | | | | | | | | | | | | | | | | | | Otherwise we will end up with an extra instruction to compare the result of the inot. On BDW: total instructions in shared programs: 13060620 -> 13060481 (-0.00%) instructions in affected programs: 103379 -> 103240 (-0.13%) helped: 127 HURT: 0 total cycles in shared programs: 256590950 -> 256587408 (-0.00%) cycles in affected programs: 11324730 -> 11321188 (-0.03%) helped: 114 HURT: 21 Reviewed-by: Jason Ekstrand <[email protected]>
* nir: add late opt to turn inot/b2f combos back to bcselTimothy Arceri2017-01-122-0/+19
| | | | | | | | | | | | | | | | | | | | | | | | | | | We turn these from bcsel into inot/b2f combos in order for other optimisation passes to get further. Once we have finished turn the ones that remain and are used in more than a single expression back into a bcsel. On BDW: total instructions in shared programs: 13060965 -> 13060297 (-0.01%) instructions in affected programs: 835701 -> 835033 (-0.08%) helped: 670 HURT: 2 total cycles in shared programs: 256599536 -> 256598006 (-0.00%) cycles in affected programs: 114655488 -> 114653958 (-0.00%) helped: 419 HURT: 240 LOST: 0 GAINED: 1 The 2 HURT is because inserting bcsel creates the only use of const 1.0 in two shaders from tri-of-friendship-and-madness. Reviewed-by: Jason Ekstrand <[email protected]>
* nir: add imprecise flrp optimisationTimothy Arceri2017-01-121-0/+1
| | | | | | | | | | | | | | | | | | On BDW: total instructions in shared programs: 13061890 -> 13061877 (-0.00%) instructions in affected programs: 2441 -> 2428 (-0.53%) helped: 13 HURT: 0 total cycles in shared programs: 256612254 -> 256611784 (-0.00%) cycles in affected programs: 16418 -> 15948 (-2.86%) helped: 10 HURT: 2 V2: don't use ffma directly Reviewed-by: Jason Ekstrand <[email protected]>
* nir: Introduce a nir_opt_move_comparisons() pass.Kenneth Graunke2017-01-123-0/+188
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | This tries to move comparisons (a common source of boolean values) closer to their first use. For GPUs which use condition codes, this can eliminate a lot of temporary booleans and comparisons which reload the condition code register based on a boolean. V2: (Timothy Arceri) - fix move comparision for phis so we dont end up with: vec1 32 ssa_227 = phi block_34: ssa_1, block_38: ssa_240 vec1 32 ssa_235 = feq ssa_227, ssa_1 vec1 32 ssa_230 = phi block_34: ssa_221, block_38: ssa_235 - add nir_op_i2b/nir_op_f2b to the list of comparisons. V3: (Timothy Arceri) - tidy up suggested by Jason. - add inot/fnot to move comparison list V4: (Jason Ekstrand) - clean up move_comparison_source - get rid of the tuple - rework phi handling Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Ian Romanick <[email protected]> [v1] Reviewed-by: Jason Ekstrand <[email protected]>
* nir/algebraic: add support for conditional helper functions to expressionsTimothy Arceri2017-01-123-1/+15
| | | | Reviewed-by: Jason Ekstrand <[email protected]>
* nir/search: Only allow matching SSA valuesJason Ekstrand2017-01-111-5/+11
| | | | | | | | This is more correct and should also be a tiny bit faster since we're just comparing pointers instead of calling nir_src_equal. Reviewed-by: Timothy Arceri <[email protected]> Cc: "13.0" <[email protected]>
* nir: change asserts to unreachable in nir_type_conversion_opTapani Pälli2017-01-111-3/+3
| | | | | | | | | this is to avoid following compilation error on Android: error: control may reach end of non-void function [-Werror,-Wreturn-type] Signed-off-by: Tapani Pälli <[email protected]> Reviewed-by: Samuel Iglesias Gonsálvez <[email protected]>
* spirv: gl_PrimitiveID in the fragment shader is handled as an inputIago Toral Quiroga2017-01-111-1/+4
| | | | | | | | | Geometry and Tessellation stages do handle this as a system value instead. Fixes: dEQP-VK.geometry.basic.primitive_id Reviewed-by: Dave Airlie <[email protected]>
* nir: Add a pass to lower TES patch_vertices intrinsics to a constant.Kenneth Graunke2017-01-103-0/+55
| | | | | | | | | | | | | | In Vulkan, we always have both the TCS and TES available in the same pipeline, so we can simply use the TCS OutputVertices execution mode value as the TES PatchVertices built-in. For GLSL, we handle this in the linker. But we could use this pass in the case when both TCS and TES are linked together, if we wanted. Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Dave Airlie <[email protected]> Reviewed-by: Iago Toral Quiroga <[email protected]> Reviewed-by: Jason Ekstrand <[email protected]>
* spirv: Silence unsupported tessellation capability warnings.Kenneth Graunke2017-01-102-2/+6
| | | | | | | | ...when the capability bit is set. Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Iago Toral Quiroga <[email protected]> [v1] Reviewed-by: Jason Ekstrand <[email protected]>
* spirv: Tidy some repeated if checks by using a switch statement.Kenneth Graunke2017-01-101-8/+9
| | | | | | | Iago suggested tidying this. Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Jason Ekstrand <[email protected]>
* spirv: Add tessellation varying and built-in support.Kenneth Graunke2017-01-103-6/+52
| | | | | | | | | | | | We need to: - handle the extra array level for per-vertex varyings - handle the patch qualifier correctly - assign varying locations Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Dave Airlie <[email protected]> Reviewed-by: Iago Toral Quiroga <[email protected]> Reviewed-by: Jason Ekstrand <[email protected]>
* spirv: Handle tessellation execution modes.Kenneth Graunke2017-01-101-6/+41
| | | | | | | | | | v2: Use info->tess. v3: Handle more things in either TCS/TES. Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Dave Airlie <[email protected]> [v1] Reviewed-by: Iago Toral Quiroga <[email protected]> [v1] Reviewed-by: Jason Ekstrand <[email protected]>
* compiler: Merge shader_info's tcs and tes structs.Kenneth Graunke2017-01-101-4/+3
| | | | | | | | | | | | | | | Annoyingly, SPIR-V lets you specify all of these fields in either the TCS or TES, which means that we need to be able to store all of them for either shader stage. Putting them in a union won't work. Combining both is an easy solution, and given that the TCS struct only had a single field, it's pretty inexpensive. This patch renames the combined struct to "tess" to indicate that it's for tessellation in general, not one of the two stages. Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Jason Ekstrand <[email protected]>
* nir: Fix anonymous union initialization with older GCC.Vinson Lee2017-01-091-1/+1
| | | | | | | | | | | | | | | Fix this build error with GCC 4.4.7. CC nir/nir_opt_copy_prop_vars.lo nir/nir_opt_copy_prop_vars.c: In function ‘copy_prop_vars_block’: nir/nir_opt_copy_prop_vars.c:765: error: unknown field ‘deref’ specified in initializer nir/nir_opt_copy_prop_vars.c:765: warning: missing braces around initializer nir/nir_opt_copy_prop_vars.c:765: warning: (near initialization for ‘(anonymous).<anonymous>’) nir/nir_opt_copy_prop_vars.c:765: warning: initialization from incompatible pointer type Fixes: 62332d139c8f ("nir: Add a local variable-based copy propagation pass") Signed-off-by: Vinson Lee <[email protected]> Acked-by: Jason Ekstrand <[email protected]>
* glsl: Do not allow scalar types in vector relational functionsBoyan Ding2017-01-091-19/+10
| | | | | | | | | | According to OpenGL Shading Language 4.50 spec, Section 8.7 "Vector Relational Functions", functions of this type do not operate on scalar types, so remove scalar types from signature definitions to make the behavior consistent with glslangValidator and other drivers. Reviewed-by: Matt Turner <[email protected]> Signed-off-by: Boyan Ding <[email protected]>
* nir: remove duplicated foreach loopThomas Hindoe Paaboel Andersen2017-01-091-1/+0
| | | | | | | | The foreach loop was called both in the else case and right after. The indentation seems to indicate that the extra call was from a previous version with an else section with out curly brackets. Reviewed-by: Jason Ekstrand <[email protected]>
* spirv: Move cursor before calling vtn_ssa_value() in phi 2nd pass.Kenneth Graunke2017-01-091-1/+2
| | | | | | | | | | | | | | vtn_ssa_value() can produce variable loads, and the cursor might be after a return statement, causing nir_builder assert failures about not inserting instructions after a jump. This fixes: dEQP-VK.spirv_assembly.instruction.graphics.barrier.in_if dEQP-VK.spirv_assembly.instruction.graphics.barrier.in_switch Cc: "13.0 12.0" <[email protected]> Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Jason Ekstrand <[email protected]>
* spirv: enable SpvCapabilityFloat64 only to supported platformsSamuel Iglesias Gonsálvez2017-01-092-1/+5
| | | | | | | | v2 (Jason): - Use nir_spirv_supported_extensions to check if the feature is enabled. Signed-off-by: Samuel Iglesias Gonsálvez <[email protected]> Reviewed-by: Jason Ekstrand <[email protected]>
* nir/i965: use two slots from inputs_read for dvec3/dvec4 vertex input attributesJuan A. Suarez Romero2017-01-092-25/+51
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | So far, input_reads was a bitmap tracking which vertex input locations were being used. In OpenGL, an attribute bigger than a vec4 (like a dvec3 or dvec4) consumes just one location, any other small attribute. So we mark the proper bit in inputs_read, and also the same bit in double_inputs_read if the attribute is a dvec3/dvec4. But in Vulkan, this is slightly different: a dvec3/dvec4 attribute consumes two locations, not just one. And hence two bits would be marked in inputs_read for the same vertex input attribute. To avoid handling two different situations in NIR, we just choose the latest one: in OpenGL, when creating NIR from GLSL/IR, any dvec3/dvec4 vertex input attribute is marked with two bits in the inputs_read bitmap (and also in the double_inputs_read), and following attributes are adjusted accordingly. As example, if in our GLSL/IR shader we have three attributes: layout(location = 0) vec3 attr0; layout(location = 1) dvec4 attr1; layout(location = 2) dvec3 attr2; then in our NIR shader we put attr0 in location 0, attr1 in locations 1 and 2, and attr2 in location 3 and 4. Checking carefully, basically we are using slots rather than locations in NIR. When emitting the vertices, we do a inverse map to know the corresponding location for each slot. v2 (Jason): - use two slots from inputs_read for dvec3/dvec4 NIR from GLSL/IR. v3 (Jason): - Fix commit log error. - Use ladder ifs and fix braces. - elements_double is divisible by 2, don't need DIV_ROUND_UP(). - Use if ladder instead of a switch. - Add comment about hardware restriction in 64bit vertex attributes. Reviewed-by: Jason Ekstrand <[email protected]>
* spirv: add support for doubles to OpSpecConstantSamuel Iglesias Gonsálvez2017-01-093-6/+47
| | | | | | | | | v2 (Jason): - Fix indent in radv change - Add vtn_u64_literal() helper to take 64 bits (Jason) Signed-off-by: Samuel Iglesias Gonsálvez <[email protected]> Reviewed-by: Jason Ekstrand <[email protected]>
* spirv/nir: add (un)packDouble2x32() translationSamuel Iglesias Gonsálvez2017-01-091-0/+2
| | | | | Signed-off-by: Samuel Iglesias Gonsálvez <[email protected]> Reviewed-by: Jason Ekstrand <[email protected]>
* spirv/nir: implement DF conversionsSamuel Iglesias Gonsálvez2017-01-093-13/+23
| | | | | | | | SPIR-V does not have special opcodes for DF conversions. We need to identify them by checking the bit size of the operand and the result. Signed-off-by: Samuel Iglesias Gonsálvez <[email protected]> Reviewed-by: Jason Ekstrand <[email protected]>
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