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* nir: Fix printing of ~0 .locations.Eric Anholt2020-01-161-2/+6
| | | | | | | | | | I kept wondering what "429" meant in variable declarations, when it was just a truncated ~0 snprintf. Reviewed-by: Rob Clark <[email protected]> Reviewed-by: Alyssa Rosenzweig <[email protected]> Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3423> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3423>
* anv,nir: Lower quad_broadcast with dynamic index in NIRJason Ekstrand2020-01-152-1/+5
| | | | | | | This is required for the subgroupBroadcastDynamicId feature that was added in Vulkan 1.2. Reviewed-by: Caio Marcelo de Oliveira Filho <[email protected]>
* nir/algebraic: sqrt(x)*sqrt(x) -> fabs(x)Elie Tournier2020-01-151-0/+1
| | | | | | | | | | | | | | | | | total instructions in shared programs: 12840840 -> 12839341 (-0.01%) instructions in affected programs: 122581 -> 121082 (-1.22%) helped: 559 HURT: 0 total cycles in shared programs: 302505756 -> 302490031 (<.01%) cycles in affected programs: 2022900 -> 2007175 (-0.78%) helped: 1090 HURT: 130 Signed-off-by: Elie Tournier <[email protected]> Reviewed-by: Matt Turner <[email protected]> Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/948> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/948>
* nir/algebraic: i2f(f2i()) -> trunc()Elie Tournier2020-01-151-0/+5
| | | | | | | | | | | | | | | | total instructions in shared programs: 12840968 -> 12840784 (<.01%) instructions in affected programs: 17886 -> 17702 (-1.03%) helped: 77 HURT: 0 total cycles in shared programs: 302508917 -> 302505592 (<.01%) cycles in affected programs: 249964 -> 246639 (-1.33%) helped: 70 HURT: 7 Signed-off-by: Elie Tournier <[email protected]> Reviewed-by: Matt Turner <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/948>
* i965: Reuse the new core glsl_count_dword_slots().Eric Anholt2020-01-141-1/+1
| | | | | | | | | The only difference I could see was treating interfaces like structs. Maintain that case. Reviewed-by: Kristian H. Kristensen <[email protected]> Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3297> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3297>
* mesa/st: Move the dword slot counting function to glsl_types as well.Eric Anholt2020-01-144-0/+67
| | | | | | | | | | | | | To implement NIR-to-TGSI, we need to be able to get the size of the uniform variable for the TGSI declaration, not just the .driver_location. With its location in mesa/st, drivers couldn't link to it from nir-to-tgsi. This feels like a common enough function to want, so let's share it in the core compiler. Reviewed-by: Kristian H. Kristensen <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3297>
* mesa/st: Move the vec4 type size function into core GLSL types.Eric Anholt2020-01-144-6/+32
| | | | | | | | | | The only bit that gallium varied on was handling of bindless. We can retain previous behavior for count_attribute_slots() by passing in "true" (though I suspect this is just giving a silly answer to a silly question), and delete our recursive function from mesa/st. Reviewed-by: Kristian H. Kristensen <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3297>
* nir: Add missing nir_var_mem_global to various passesCaio Marcelo de Oliveira Filho2020-01-144-16/+28
| | | | | | Reviewed-by: Jason Ekstrand <[email protected]> Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3322> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3322>
* spirv: Handle PhysicalStorageBuffer in memory barriersCaio Marcelo de Oliveira Filho2020-01-141-2/+6
| | | | | | | | | | | | | PhysicalStorageBuffer is lowered to nir_var_mem_global, and SPIR-V 1.5rev1 in section "3.25. Memory Semantics <id>" says UniformMemory Apply the memory-ordering constraints to StorageBuffer, PhysicalStorageBuffer, or Uniform Storage Class memory. Reviewed-by: Jason Ekstrand <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3322>
* spirv: Drop EXT for PhysicalStorageBuffer symbolsCaio Marcelo de Oliveira Filho2020-01-142-11/+11
| | | | | Reviewed-by: Jason Ekstrand <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3322>
* nir/algebraic: a & ~(a >> 31) -> imax(a, 0)Rhys Perry2020-01-141-0/+1
| | | | | | | | | | | | | | | | | | Found in some Doom shaders Totals from affected shaders: SGPRS: 30056 -> 30064 (0.03 %) VGPRS: 28024 -> 28024 (0.00 %) Spilled SGPRs: 0 -> 0 (0.00 %) Spilled VGPRs: 0 -> 0 (0.00 %) Code Size: 4278648 -> 4270852 (-0.18 %) bytes Max Waves: 1476 -> 1476 (0.00 %) Instructions: 835287 -> 833338 (-0.23 %) Signed-off-by: Rhys Perry <[email protected]> Reviewed-by: Alyssa Rosenzweig <[email protected]> Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3089> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3089>
* nir/sink,nir/move: move/sink nir_op_movRhys Perry2020-01-142-0/+6
| | | | | | | | | | | | | | | | Can uncover opportunities to move other instructions. This can increase register usage, but that doesn't seem to actually happen. This optimizes a pattern of a load_per_vertex_input followed by several moves and then a store_output in a different block. v2: add nir_move_copies to make it optional Signed-off-by: Rhys Perry <[email protected]> Acked-by: Jason Ekstrand <[email protected]> (v1) Acked-by: Rob Clark <[email protected]> Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/2420> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/2420>
* nir/sink,nir/move: move/sink load_per_vertex_inputRhys Perry2020-01-141-1/+2
| | | | | | | Signed-off-by: Rhys Perry <[email protected]> Acked-by: Jason Ekstrand <[email protected]> Acked-by: Rob Clark <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/2420>
* nir/lower_gs_intrinsics: add option for per-stream countsRhys Perry2020-01-142-15/+29
| | | | | | | Signed-off-by: Rhys Perry <[email protected]> Reviewed-by: Jason Ekstrand <[email protected]> Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/2422> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/2422>
* nir/divergence: handle load_primitive_id in GSRhys Perry2020-01-141-0/+2
| | | | | | | | Signed-off-by: Rhys Perry <[email protected]> Reviewed-by: Daniel Schürmann <[email protected]> Reviewed-by: Jason Ekstrand <[email protected]> Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/2323> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/2323>
* Revert "nir: assert that nir_lower_tex runs after lowering derefs"Kenneth Graunke2020-01-131-6/+0
| | | | | | | | | This reverts commit 4cda61f11e922fb5914ae73d22cc0c495abf0377 for now, as it appears to break i965 CI (32,000+ failures). Rob and I suspect we need to do the equivalent of 1c6a2efa06e9bb5914f4557118930fc61065a467 on i965 - we are doing nir_lower_tex and brw_nir_lower_resources in the wrong order and that's likely triggering this condition. Once we fix that, we should put this patch back.
* nir: assert that nir_lower_tex runs after lowering derefsRob Clark2020-01-131-0/+6
| | | | | | | | | It isn't going to do the right thing, because texture_index/ sampler_index defaults to zero. Signed-off-by: Rob Clark <[email protected]> Reviewed-by: Marek Olšák <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3368>
* nir/lower_atomics_to_ssbo: Also lower barriersJason Ekstrand2020-01-134-3/+7
| | | | | | | | | | | This is more correct for a pass which is supposed to completely lower away atomic counters. It also lets us stop supporting atomic counter barriers in most of the drivers. Reviewed-by: Caio Marcelo de Oliveira Filho <[email protected]> Reviewed-by: Eric Anholt <[email protected]> Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3307> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3307>
* nir: Rename nir_intrinsic_barrier to control_barrierJason Ekstrand2020-01-138-11/+17
| | | | | | | | This is a more explicit name now that we don't want it to be doing any memory barrier stuff for us. Reviewed-by: Caio Marcelo de Oliveira Filho <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3307>
* nir/glsl: Emit memory barriers as part of barrier()Jason Ekstrand2020-01-131-0/+12
| | | | | | | | | | | | The GLSL barrier() intrinsic does an implicit shared memory barrier in compute shaders and an implicit TCS patch output barrier in tessellation control shaders. We'd like NIR's barrier intrinsic to just be a control flow barrier and not have memory implications. To satisfy this, we need to add an extra memory barrier in front of each nir_intrinsic_barrier. Reviewed-by: Caio Marcelo de Oliveira Filho <[email protected]> Reviewed-by: Eric Anholt <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3307>
* spirv: Add output memory semantics to OpControlBarrier in TCSJason Ekstrand2020-01-131-3/+21
| | | | | Reviewed-by: Caio Marcelo de Oliveira Filho <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3307>
* spirv: Add a workaround for OpControlBarrier on old GLSLangJason Ekstrand2020-01-132-1/+24
| | | | | | | | | | | As per the Vulkan memory model, the proper translation of GLSL barrier() is an OpControlBarrier with a scope of Workgroup and semantics of Acquire, Release, and WorkgroupMemory. Older versions of GLSLang gave an OpControlBarrier with semantics of None so we need to patch it up on those versions. Reviewed-by: Caio Marcelo de Oliveira Filho <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3307>
* nir: Add a new memory_barrier_tcs_patch intrinsicJason Ekstrand2020-01-134-0/+17
| | | | | | | | | | | Right now, it's implemented as a no-op for everyone. For most drivers, it's a switch case in the NIR -> whatever which just breaks. For ir3, they already have code to delete tessellation barriers so we just add a case to also delete memory_barrier_tcs_patch. Reviewed-by: Caio Marcelo de Oliveira Filho <[email protected]> Reviewed-by: Eric Anholt <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3307>
* nir: Handle barriers with more granularity in combine_storesJason Ekstrand2020-01-131-5/+9
| | | | | Reviewed-by: Caio Marcelo de Oliveira Filho <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3307>
* nir: Handle more barriers in dead_write and copy_propJason Ekstrand2020-01-132-0/+22
| | | | | Reviewed-by: Caio Marcelo de Oliveira Filho <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3307>
* glsl: fix potential bug in nir uniform linkerTimothy Arceri2020-01-121-7/+3
| | | | | | | | | | | The state value of main_uniform_storage_index will be wrong for add_parameter() when find_and_update_previous_uniform_storage() finds a uniform if there is more than 1 uniform used in multiple shader stages. The new code is also simpler. Reviewed-by: Alejandro Piñeiro <[email protected]>
* glsl: Fix software 64-bit integer to 32-bit float conversions.Francisco Jerez2020-01-101-22/+14
| | | | | | | | | | | | | | | | | | | | | | | | | The current implementation was broken for any integers between 2^24 and 2^30 (it would return zero for me on ICL). The reason is that for such integers we wouldn't take the 'if (0 <= shiftCount)' early return path, however 'shiftCount + 7' would be positive, leading to a negative 'count' argument passed to __shift64RightJamming(), which would give undefined results. This reworks the affected conversion functions to use either __shortShift64Left() or __shift64RightJamming() based on the sign of the final shift count, which should avoid the problem. In addition this should qualify as a clean-up/optimization -- This implementation of the conversion functions translates to 7 instructions less than the original on Intel hardware. This fixes the 'KHR-GL46.shader_ballot_tests.ShaderBallotFunctionBallot' conformance tests on soft fp64 hardware with large enough subgroup size (>16). Fixes: d5cf6e92b4f7 "glsl: Add built-in functions to do uint64_to_fp32(uint64_t)" Fixes: c9d333a6b76e "glsl: Add built-in functions to do int64_to_fp32(int64_t)" Cc: Sagar Ghuge <[email protected]> Reviewed-by: Sagar Ghuge <[email protected]>
* glsl: call calculate_subroutine_compat() from the nir linkerTimothy Arceri2020-01-102-2/+2
| | | | Reviewed-by: Tapani Pälli <[email protected]>
* glsl: move calculate_subroutine_compat() to shared linker codeTimothy Arceri2020-01-103-37/+41
| | | | | | We will make use of this in the nir linker in the following patch. Reviewed-by: Tapani Pälli <[email protected]>
* glsl: call uniform resource checks from the nir linkerTimothy Arceri2020-01-102-1/+2
| | | | Reviewed-by: Tapani Pälli <[email protected]>
* glsl: move uniform resource checks into the common linker codeTimothy Arceri2020-01-103-80/+86
| | | | | | We will call this from the nir linker in the following patch. Reviewed-by: Tapani Pälli <[email protected]>
* glsl: call check_subroutine_resources() from the nir linkerTimothy Arceri2020-01-102-1/+2
| | | | Reviewed-by: Tapani Pälli <[email protected]>
* glsl: move check_subroutine_resources() into the shared util codeTimothy Arceri2020-01-103-15/+20
| | | | | | We will make use of this in the nir linker in the following patch. Reviewed-by: Tapani Pälli <[email protected]>
* nir: fix printing of var_decl with more than 4 components.Daniel Schürmann2020-01-091-1/+1
| | | | | | | Reviewed-By: Timur Kristóf <[email protected]> Fixes: a8ec4082a41830cf67a4fd405402fd2d820722fd ('nir+vtn: vec8+vec16 support') Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3320> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3320>
* spirv,nir: add new lod parameter to image_{load,store} intrinsicsSamuel Pitoiset2020-01-094-2/+40
| | | | | | | | | | | | SPV_AMD_shader_image_load_store_lod allows to use a lod parameter with OpImageRead, OpImageWrite and OpImageSparseRead. According to the specification, this parameter should be a 32-bit integer. It is initialized to 0 when no lod parameter is found during SPIR-V->NIR translation. Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]>
* spirv: add SpvCapabilityImageReadWriteLodAMDSamuel Pitoiset2020-01-092-0/+5
| | | | | | | New SPIR-V capability for SPV_AMD_shader_image_load_store_lod. Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]>
* nir/spirv: skip unreachable blocks in Phi second passJuan A. Suarez Romero2020-01-081-0/+5
| | | | | | | | | | | | | Only the blocks that are reachable are inserted with an end_nop instruction at the end. When handling the Phi second pass, if the Phi has a parent block that does not have an end_nop then it means this block is unreachable, and thus we can ignore it, as the Phi will never come through it. Fixes dEQP-VK.graphicsfuzz.uninit-element-cast-in-loop. Reviewed-by: Caio Marcelo de Oliveira Filho <[email protected]>
* glsl: use nir version of check_image_resources() for nir linkerTimothy Arceri2020-01-072-1/+2
| | | | Reviewed-by: Alejandro Piñeiro <[email protected]>
* glsl: add check_image_resources() for the nir linkerTimothy Arceri2020-01-071-0/+38
| | | | | | | | This is adapted from the GLSL IR code but doesn't need to iterate over the IR. I believe this also fixes a potential bug in the GLSL IR code which potentially counts the same output twice. Reviewed-by: Alejandro Piñeiro <[email protected]>
* glsl: use nir linker to link atomicsTimothy Arceri2020-01-071-2/+5
| | | | Reviewed-by: Alejandro Piñeiro <[email protected]>
* glsl: reorder link_and_validate_uniforms() callsTimothy Arceri2020-01-071-1/+1
| | | | | | This is required for the following commit. Reviewed-by: Alejandro Piñeiro <[email protected]>
* glsl: add new gl_nir_link_glsl() helperTimothy Arceri2020-01-072-0/+14
| | | | | | | | This will allow us to do some linking in NIR that was previously done by the GLSL IR linker. To start with this just has calls for linking atomics. Reviewed-by: Alejandro Piñeiro <[email protected]>
* glsl: add gl_nir_link_check_atomic_counter_resources()Timothy Arceri2020-01-072-0/+95
| | | | | | | This is pretty much a copy of link_check_atomic_counter_resources() updated to work with the NIR linker. Reviewed-by: Alejandro Piñeiro <[email protected]>
* glsl: rename gl_nir_link() to gl_nir_link_spirv()Timothy Arceri2020-01-072-5/+5
| | | | | | | | A NIR based glsl linking function will be too different to the spirv version to bother attempting any sharing. So lets change the name to be explicit. Reviewed-by: Alejandro Piñeiro <[email protected]>
* glsl/nir: do not change an element index to have correct block nameAndrii Simiklit2020-01-061-1/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | When SSBO array is used with packed layout, both IR tree and as a result, NIR tree will be incorrect. In fact, the SSBO dereference indices won't match the array size in some cases like the following: "layout(packed, binding=1) buffer SSBO { vec4 a; } ssbo[3]; out vec4 color; void main() { color = ssbo[2].a; }" After linking the IR and then NIR will have an SSBO array definition with size 1 but dereference still will have index 2 and linked_shader->Program->sh.ShaderStorageBlocks will contain just SSBO with name "SSBO[2]" So this line should be removed at least as a workaround for now to avoid error like: Failed to find the block by name "SSBO[0]" Fixes: 810dde2a "glsl/nir: Add a pass to lower UBO and SSBO access" Signed-off-by: Andrii Simiklit <[email protected]> Reviewed-by: Kristian H. Kristensen <[email protected]>
* glsl: fix a binding points assignment for ssbo/ubo arraysAndrii Simiklit2020-01-063-13/+25
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This is needed to be in agreement with spec requirements: https://github.com/KhronosGroup/OpenGL-API/issues/46 Piers Daniell: "We discussed this in the OpenGL/ES working group meeting and agreed that eliminating unused elements from the interface block array is not desirable. There is no statement in the spec that this takes place and it would be highly implementation dependent if it happens. If the application has an "interface" in the shader they need to match up with the API it would be quite confusing to have the binding point get compacted. So the answer is no, the binding points aren't affected by unused elements in the interface block array." v2: - 'original_dim_size' field moved above to keep the struct packed better on 64-bit - added a comment for 'total_num_array_elements' field - fixed a binding point calculations for SSBOs array of arrays ( Ian Romanick <[email protected]> ) - fixed binding point calculations for non-packed SSBOs v3: - rename 'total_num_array_elements' to 'aoa_size' ( Jason Ekstrand <[email protected]> ) - rename 'boffset' to 'binding_stride' ( Alejandro Piñeiro <[email protected]> ) Fixes: 8cf1333b "glsl: link uniform block arrays of arrays" Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=109532 Reported-By: Ilia Mirkin <[email protected]> Tested-by: Fritz Koenig <[email protected]> Signed-off-by: Andrii Simiklit <[email protected]> Reviewed-by: Kristian H. Kristensen <[email protected]>
* glsl: fix an incorrect max_array_access after optimization of ssbo/uboAndrii Simiklit2020-01-061-0/+1
| | | | | | | | | | | | | This is needed to fix these tests: piglit.spec.arb_shader_storage_buffer_object.compiler.unused-array-element_frag piglit.spec.arb_shader_storage_buffer_object.compiler.unused-array-element_comp Fixes: 8cf1333b "glsl: link uniform block arrays of arrays" Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=109532 Reported-By: Ilia Mirkin <[email protected]> Tested-by: Fritz Koenig <[email protected]> Signed-off-by: Andrii Simiklit <[email protected]> Reviewed-by: Kristian H. Kristensen <[email protected]>
* nir: make nir_get_texture_size/lod available outside nir_lower_texGert Wollny2020-01-043-110/+117
| | | | | | | | This functions can be useful in other places. Signed-off-by: Gert Wollny <[email protected]> Reviewed-by: Eric Anholt <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3286>
* spirv: Fix glsl type assert in spir2nir.Bas Nieuwenhuizen2020-01-041-0/+4
| | | | | | Fixes: 624789e3708 "compiler/glsl: handle case where we have multiple users for types" Reviewed-by: Caio Marcelo de Oliveira Filho <[email protected]> Reviewed-by: Lionel Landwerlin <[email protected]>
* nir/zink: move clip_halfz-lowering to common codeErik Faye-Lund2020-01-034-0/+81
| | | | | | | | Etnaviv also does the same thing, so let's try to avoid repetition here, and use the same for it code as well. Reviewed-by: Jonathan Marek <[email protected]> Tested-by: Paul Cercueil <[email protected]>
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