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* spirv: don't assert with location decorations on non i/o variablesLionel Landwerlin2017-01-201-1/+2
| | | | | | | | | | Some applications might add location decoration to samplers. Rather than raising an error it seems it would make more sense to just discard these decorations. Signed-off-by: Lionel Landwerlin <[email protected]> Reviewed-by: Jason Ekstrand <[email protected]> Cc: 17.0 <[email protected]>
* spirv: fix warn string typoLionel Landwerlin2017-01-201-1/+1
| | | | | Signed-off-by: Lionel Landwerlin <[email protected]> Reviewed-by: Jason Ekstrand <[email protected]>
* spirv: Handle patch decorations up-frontJason Ekstrand2017-01-121-0/+23
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Once again, SPIR-V is insane... It allows you to place "patch" decorations on structure members. Presumably, this is so that you can do something such as out struct S { layout(location = 0) patch vec4 thing1; layout(location = 0) vec4 thing2; } str; And have your I/O "nicely" organized. While this is a bit silly, it's allowed and well-defined so whatever. Where it really gets interesting is when you have an array of struct. SPIR-V says nothing about not allowing you to have those qualifiers on the members of a struct that's inside an array and GLSLang does this. Specifically, if you have layout(location = 0) out patch struct S { vec4 thing1; vec4 thing2; } str[2]; then GLSLang will place the "patch" decorations on the struct members. This is ridiculous there is no way that having some of them be patch and some not would be well-defined given that patch and non-patch outputs are in effectively different storage classes. This commit moves around the way we handle the "patch" decoration so that we can detect even the crazy cases and handle them. Fixes: dEQP-VK.tessellation.user_defined_io.per_patch_block_array.* Reviewed-by: Kenneth Graunke <[email protected]>
* spirv: fix typo in warning messageIago Toral Quiroga2017-01-121-1/+1
| | | | Reviewed-by: Samuel Iglesias Gonsálvez <[email protected]>
* spirv: Shut up unhandled enumeration value warnings.Kenneth Graunke2017-01-111-0/+2
| | | | | | We don't want to do anything for the other cases. Signed-off-by: Kenneth Graunke <[email protected]>
* spirv: gl_PrimitiveID in the fragment shader is handled as an inputIago Toral Quiroga2017-01-111-1/+4
| | | | | | | | | Geometry and Tessellation stages do handle this as a system value instead. Fixes: dEQP-VK.geometry.basic.primitive_id Reviewed-by: Dave Airlie <[email protected]>
* spirv: Silence unsupported tessellation capability warnings.Kenneth Graunke2017-01-102-2/+6
| | | | | | | | ...when the capability bit is set. Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Iago Toral Quiroga <[email protected]> [v1] Reviewed-by: Jason Ekstrand <[email protected]>
* spirv: Tidy some repeated if checks by using a switch statement.Kenneth Graunke2017-01-101-8/+9
| | | | | | | Iago suggested tidying this. Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Jason Ekstrand <[email protected]>
* spirv: Add tessellation varying and built-in support.Kenneth Graunke2017-01-103-6/+52
| | | | | | | | | | | | We need to: - handle the extra array level for per-vertex varyings - handle the patch qualifier correctly - assign varying locations Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Dave Airlie <[email protected]> Reviewed-by: Iago Toral Quiroga <[email protected]> Reviewed-by: Jason Ekstrand <[email protected]>
* spirv: Handle tessellation execution modes.Kenneth Graunke2017-01-101-6/+41
| | | | | | | | | | v2: Use info->tess. v3: Handle more things in either TCS/TES. Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Dave Airlie <[email protected]> [v1] Reviewed-by: Iago Toral Quiroga <[email protected]> [v1] Reviewed-by: Jason Ekstrand <[email protected]>
* spirv: Move cursor before calling vtn_ssa_value() in phi 2nd pass.Kenneth Graunke2017-01-091-1/+2
| | | | | | | | | | | | | | vtn_ssa_value() can produce variable loads, and the cursor might be after a return statement, causing nir_builder assert failures about not inserting instructions after a jump. This fixes: dEQP-VK.spirv_assembly.instruction.graphics.barrier.in_if dEQP-VK.spirv_assembly.instruction.graphics.barrier.in_switch Cc: "13.0 12.0" <[email protected]> Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Jason Ekstrand <[email protected]>
* spirv: enable SpvCapabilityFloat64 only to supported platformsSamuel Iglesias Gonsálvez2017-01-092-1/+5
| | | | | | | | v2 (Jason): - Use nir_spirv_supported_extensions to check if the feature is enabled. Signed-off-by: Samuel Iglesias Gonsálvez <[email protected]> Reviewed-by: Jason Ekstrand <[email protected]>
* spirv: add support for doubles to OpSpecConstantSamuel Iglesias Gonsálvez2017-01-093-6/+47
| | | | | | | | | v2 (Jason): - Fix indent in radv change - Add vtn_u64_literal() helper to take 64 bits (Jason) Signed-off-by: Samuel Iglesias Gonsálvez <[email protected]> Reviewed-by: Jason Ekstrand <[email protected]>
* spirv/nir: add (un)packDouble2x32() translationSamuel Iglesias Gonsálvez2017-01-091-0/+2
| | | | | Signed-off-by: Samuel Iglesias Gonsálvez <[email protected]> Reviewed-by: Jason Ekstrand <[email protected]>
* spirv/nir: implement DF conversionsSamuel Iglesias Gonsálvez2017-01-093-13/+23
| | | | | | | | SPIR-V does not have special opcodes for DF conversions. We need to identify them by checking the bit size of the operand and the result. Signed-off-by: Samuel Iglesias Gonsálvez <[email protected]> Reviewed-by: Jason Ekstrand <[email protected]>
* spirv: add support for doubles on OpComposite{Insert,Extract}Samuel Iglesias Gonsálvez2017-01-091-0/+1
| | | | | Signed-off-by: Samuel Iglesias Gonsálvez <[email protected]> Reviewed-by: Jason Ekstrand <[email protected]>
* spirv: Enable double floating points when copying variables in ↵Samuel Iglesias Gonsálvez2017-01-091-0/+1
| | | | | | | _vtn_variable_copy() Signed-off-by: Samuel Iglesias Gonsálvez <[email protected]> Reviewed-by: Jason Ekstrand <[email protected]>
* spirv: add double support to _vtn_block_load_store()Samuel Iglesias Gonsálvez2017-01-091-0/+1
| | | | | Signed-off-by: Samuel Iglesias Gonsálvez <[email protected]> Reviewed-by: Jason Ekstrand <[email protected]>
* spirv: add double support to _vtn_variable_load_storeSamuel Iglesias Gonsálvez2017-01-091-0/+1
| | | | | Signed-off-by: Samuel Iglesias Gonsálvez <[email protected]> Reviewed-by: Jason Ekstrand <[email protected]>
* spirv: add double support to SpvOpCompositeExtractSamuel Iglesias Gonsálvez2017-01-091-2/+14
| | | | | | | | v2 (Jason): - Add asserts. Signed-off-by: Samuel Iglesias Gonsálvez <[email protected]> Reviewed-by: Jason Ekstrand <[email protected]>
* spirv: fix SpvOpSpecConstantOp with SpvOpVectorShuffle working with ↵Samuel Iglesias Gonsálvez2017-01-091-12/+40
| | | | | | | | | | | | | | | | | double-based vecs We need to pick two 32-bit values per component to perform the right shuffle operation. v2 (Jason): - Add assert to check matching bit sizes (Jason) - Simplify the code to pick components (Jason) v3: - Switch on bit_size once (Jason) - Add comment to explain the constant value for unused components (Erik) Signed-off-by: Samuel Iglesias Gonsálvez <[email protected]> Reviewed-by: Jason Ekstrand <[email protected]>
* spirv: add DF support to SpvOp*ConstantCompositeSamuel Iglesias Gonsálvez2017-01-091-3/+11
| | | | | | | | v2 (Jason): - Add assert. Signed-off-by: Samuel Iglesias Gonsálvez <[email protected]> Reviewed-by: Jason Ekstrand <[email protected]>
* spirv: add DF support to vtn_const_ssa_value()Samuel Iglesias Gonsálvez2017-01-091-3/+5
| | | | | Signed-off-by: Samuel Iglesias Gonsálvez <[email protected]> Reviewed-by: Jason Ekstrand <[email protected]>
* spirv: add support for loading DF constantsSamuel Iglesias Gonsálvez2017-01-091-2/+10
| | | | | | | | v2 (Jason): - Add assert. Signed-off-by: Samuel Iglesias Gonsálvez <[email protected]> Reviewed-by: Jason Ekstrand <[email protected]>
* spirv: add definition of double based data typesSamuel Iglesias Gonsálvez2017-01-091-2/+4
| | | | | Signed-off-by: Samuel Iglesias Gonsálvez <[email protected]> Reviewed-by: Jason Ekstrand <[email protected]>
* spirv: fix typo in spec_constant_decoration_cb()Samuel Iglesias Gonsálvez2017-01-091-2/+2
| | | | | Signed-off-by: Samuel Iglesias Gonsálvez <[email protected]> Reviewed-by: Jason Ekstrand <[email protected]>
* spirv: compute push constant access offset & rangeLionel Landwerlin2017-01-041-13/+65
| | | | | | | | v2: Move relative push constant relative offset computation down to _vtn_load_store_tail() (Jason) Signed-off-by: Lionel Landwerlin <[email protected]> Reviewed-by: Jason Ekstrand <[email protected]>
* spirv: move block_size() definitionLionel Landwerlin2017-01-041-48/+48
| | | | | Signed-off-by: Lionel Landwerlin <[email protected]> Reviewed-by: Jason Ekstrand <[email protected]>
* nir: Make nir_copy_deref follow the "clone" patternJason Ekstrand2016-12-303-16/+12
| | | | | | | | | We rename it to nir_deref_clone, re-order the sources to match the other clone functions, and expose nir_deref_var_clone. This past part, in particular, lets us get rid of quite a few lines since we no longer have to call nir_copy_deref and wrap it in deref_as_var. Reviewed-by: Jordan Justen <[email protected]>
* spirv: always expose SpvCapabilityStorageImageExtendedFormatsIlia Mirkin2016-12-292-4/+1
| | | | | | | | | | I forgot to do this in commit 76b97d544e ("anv: enable storage image extended formats"). Since both drivers support this now, no need for the conditional enable. Signed-off-by: Ilia Mirkin <[email protected]> Reviewed-by: Jason Ekstrand <[email protected]> Reviewed-by: Dave Airlie <[email protected]>
* spirv: add interface for drivers to define support extensions.Dave Airlie2016-12-284-3/+23
| | | | | | | | | | | I expect over time the struct contents will change as all drivers support stuff etc, but for now this should be a good starting point. Reviewed-by: Edward O'Callaghan <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]> Acked-by: Jason Ekstrand <[email protected]> Signed-off-by: Dave Airlie <[email protected]>
* spirv/nir: add support for ImageGatherExtendedIlia Mirkin2016-12-161-7/+69
| | | | | | | | | | The strategy is to do the same thing that the GLSL lower_offset_arrays pass does - create 4 separate texture gather ops, one per offset, and read in the results from each gather's w component to recreate the desired result. Signed-off-by: Ilia Mirkin <[email protected]> Reviewed-by: Dave Airlie <[email protected]>
* treewide: s/comparitor/comparator/Ilia Mirkin2016-12-121-1/+1
| | | | | | | | | | git grep -l comparitor | xargs sed -i 's/comparitor/comparator/g' Just happened to notice this in a patch that was sent and included one of the tokens in question. Signed-off-by: Ilia Mirkin <[email protected]> Acked-by: Nicolai Hähnle <[email protected]>
* spirv: Use a simpler and more correct implementaiton of tanh()Jason Ekstrand2016-12-091-9/+14
| | | | | | | | | | The new implementation is more correct because it clamps the incoming value to 10 to avoid floating-point overflow. It also uses a much reduced version of the formula which only requires 1 exp() rather than 2. This fixes all of the dEQP-VK.glsl.builtin.precision.tanh.* tests. Reviewed-by: Kenneth Graunke <[email protected]> Cc: "13.0" <[email protected]>
* nir: Remove some unused fields from nir_variableJason Ekstrand2016-12-051-4/+0
| | | | | | | All of these are happily set from glsl_to_nir or spirv_to_nir but their values are never used for anything. Reviewed-by: Iago Toral Quiroga <[email protected]>
* spirv: Builtin Layer is an input for fragment shadersIago Toral Quiroga2016-12-031-1/+6
| | | | | | | This change makes it so we emit a load_input intrinsic when Layer is read in a fragment shader. Reviewed-by: Jason Ekstrand <[email protected]>
* nir: Get rid of nir_constant_dataJason Ekstrand2016-12-022-42/+33
| | | | | | | | This has bothered me for about as long as NIR has been around. Why do we have two different unions for constants? No good reason other than one of them is a direct port from GLSL IR. Reviewed-by: Iago Toral Quiroga <[email protected]>
* nir/spirv: implement ordered / unordered floating point comparisons properlyIago Toral Quiroga2016-11-231-1/+52
| | | | | | | | | | | | | | | | | | | | | Besides the logical operation involved, these also require that we test if the operands are ordered / unordered. For ordered operations, both operands must be ordered (and they must pass the conditional test) while for unordered operations it is sufficient if only one of the operands is unordered (or they pass the logical test). Fixes the following Vulkan CTS tests: dEQP-VK.spirv_assembly.instruction.compute.opfunord.equal dEQP-VK.spirv_assembly.instruction.compute.opfunord.greater dEQP-VK.spirv_assembly.instruction.compute.opfunord.greaterequal dEQP-VK.spirv_assembly.instruction.compute.opfunord.less dEQP-VK.spirv_assembly.instruction.compute.opfunord.lessequal v2: Fixed typo: s/nir_eq/nir_feq Reviewed-by: Lionel Landwerlin <[email protected]>
* spirv: Stop warning about input attachmentsJason Ekstrand2016-11-221-1/+1
| | | | | Reviewed-by: Dave Airlie <[email protected]> Reviewed-by: Jordan Justen <[email protected]>
* spirv: Handle the InputAttachmentIndex decorationJason Ekstrand2016-11-222-0/+5
| | | | | Reviewed-by: Dave Airlie <[email protected]> Reviewed-by: Jordan Justen <[email protected]>
* spirv: Silence unsupported capability warnings for Clip/CullDistance.Kenneth Graunke2016-11-221-2/+2
| | | | | Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Jason Ekstrand <[email protected]>
* nir/spirv: Fix handling of gl_PrimitiveIdJason Ekstrand2016-11-161-2/+6
| | | | | | | | | | Before, we were always treating it as an output which bogus. The only stage in which this it can be an output is the geometry stage. In all other stages, it's an input which, in the back-end, we actually want to be a system value. Cc: "13.0" <[email protected]> Reviewed-by: Dave Airlie <[email protected]>
* ralloc: use rzalloc where it's necessaryMarek Olšák2016-10-311-1/+2
| | | | | | | | | | | | | | | | | No change in behavior. ralloc_size is equivalent to rzalloc_size. That will change though. Calls not switched to rzalloc_size: - ralloc_vasprintf - glsl_type::name allocation (it's filled with snprintf) - C++ classes where valgrind didn't show uninitialized values I switched most of non-glsl stuff to rzalloc without checking whether it's really needed. Reviewed-by: Edward O'Callaghan <[email protected]> Tested-by: Edmondo Tommasina <[email protected]> Reviewed-by: Nicolai Hähnle <[email protected]>
* nir/i965/anv/radv/gallium: make shader info a pointerTimothy Arceri2016-10-262-24/+24
| | | | | | | | | | When restoring something from shader cache we won't have and don't want to create a nir_shader this change detaches the two. There are other advantages such as being able to reuse the shader info populated by GLSL IR. Reviewed-by: Jason Ekstrand <[email protected]>
* spirv: replace assert() with unreachable()Timothy Arceri2016-10-041-1/+1
| | | | | | This fixes an uninitialized warning for is_vertex_input. Reviewed-by: Jason Ekstrand <[email protected]>
* spirv: translate cull distance semantic.Dave Airlie2016-10-041-1/+1
| | | | | | | | This just translates to the correct cull distance slot. Reviewed-by: Edward O'Callaghan <[email protected]> Reviewed-by: Jason Ekstrand <[email protected]> Signed-off-by: Dave Airlie <[email protected]>
* nir/spirv/cfg: Use a nop intrinsic for tagging the ends of blocksJason Ekstrand2016-10-032-4/+6
| | | | | | | | | | | | | | | | | | | | | Previously, we were saving off the last nir_block in a vtn_block before moving on so that we could find the nir_block again when it came time to handle phi sources. Unfortunately, NIR's control flow modification code is inconsistent when it comes to how it splits blocks so the block pointer we saved off may point to a block somewhere else in the shader by the time we get around to handling phi sources. In order to get around this, we insert a nop instruction and use that as the logical end of our block. Since the control flow manipulation code respects instructions, the nop will keeps its place like any other instruction and we can easily find the end of our block when we need it. This fixes a bug triggered by a couple of vkQuake shaders. Signed-off-by: Jason Ekstrand <[email protected]> Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=97233 Cc: "12.0" <[email protected]> Tested-by: Dave Airlie <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]>
* nir/spirv/cfg: Detect switch_break after loop_break/continueJason Ekstrand2016-10-011-2/+2
| | | | | | | | | | | While the current CFG code is valid in the case where a switch break also happens to be a loop continue, it's a bit suboptimal. Since hardware is capable of handling the continue as a direct jump, it's better to use a continue instruction when we can than to bother with all of the nasty switch break lowering. Signed-off-by: Jason Ekstrand <[email protected]> Cc: "12.0" <[email protected]>
* nir/spirv/cfg: Handle switches whose break block is a loop continueJason Ekstrand2016-10-011-0/+13
| | | | | | | | | | | | | | | | It is possible that the break block of a switch is actually the continue of the loop containing the switch. In this case, we need to identify the break block as a continue and break out of current level of CFG handling. If we don't, the continue portion of the loop will get handled twice, once by following after the break and a second time by the loop handling code handling it explicitly. This fixes 6 of the new Vulkan CTS tests: - dEQP-VK.spirv_assembly.instruction.graphics.opphi.out_of_order* - dEQP-VK.spirv_assembly.instruction.graphics.selection_block_order.out_of_order* Signed-off-by: Jason Ekstrand <[email protected]> Cc: "12.0" <[email protected]>
* nir/spirv: improve mmap() error handlingEric Engestrom2016-10-011-1/+9
| | | | | Signed-off-by: Eric Engestrom <[email protected]> Reviewed-by: Jason Ekstrand <[email protected]>
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