summaryrefslogtreecommitdiffstats
path: root/src/compiler/shader_info.h
Commit message (Collapse)AuthorAgeFilesLines
* compiler: pack shader_info from 160 bytes to 96 bytesMarek Olšák2019-11-081-66/+66
| | | | Reviewed-by: Caio Marcelo de Oliveira Filho <[email protected]>
* st/mesa: call nir_lower_flrp only once per shaderMarek Olšák2019-11-041-0/+3
| | | | Reviewed-by: Connor Abbott <[email protected]>
* spirv: Add SpvMemoryModelVulkan and related capabilitiesCaio Marcelo de Oliveira Filho2019-10-241-0/+2
| | | | | Reviewed-by: Jason Ekstrand <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]>
* nir: allow nir_lower_uniforms_to_ubo to be run repeatedlyMarek Olšák2019-10-221-0/+3
| | | | | | for st/mesa Reviewed-by: Kenneth Graunke <[email protected]>
* nir: add shader_info::last_msaa_imageMarek Olšák2019-10-091-0/+2
| | | | | | for radeonsi Acked-by: Pierre-Eric Pelloux-Prayer <[email protected]>
* spirv: Implement SPV_KHR_shader_clockCaio Marcelo de Oliveira Filho2019-10-071-0/+1
| | | | | | | We only have the subgroup variant in NIR (equivalent to clockARB), so only support that for now. Reviewed-by: Lionel Landwerlin <[email protected]>
* spirv/nir: keep track of SPV_KHR_float_controls execution modesSamuel Iglesias Gonsálvez2019-09-171-0/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | v2: - Add support for rounding modes for each floating point bit size. v3: - Commit e68871f6a44 ("spirv: Handle constants and types before execution modes") changed when the execution modes are handled, which affects the result of the floating point constants when the rounding mode is set in the execution mode. Moved the handling of the rounding modes before we handle the constants. v4: - Rename vtn_decoration "literals" to "operands" (Andres). - Simplify execution mode parsing util function (Caio). - Extend the comment about the timing of the handling of the rounding modes (Caio). v5: - Correct extension name (Caio). - Rename shader info member (Andres). - Rename float controls enum (Andres). Signed-off-by: Samuel Iglesias Gonsálvez <[email protected]> Signed-off-by: Andres Gomez <[email protected]> Reviewed-by: Connor Abbott <[email protected]> [v3] Reviewed-by: Caio Marcelo de Oliveira Filho <[email protected]>
* spirv: check support for SPV_KHR_float_controls capabilitiesSamuel Iglesias Gonsálvez2019-09-171-0/+1
| | | | | | | | | | v2: - Correct extension name (Caio). - Rename supported capabilities member (Andres). Signed-off-by: Samuel Iglesias Gonsálvez <[email protected]> Reviewed-by: Connor Abbott <[email protected]> [v1] Reviewed-by: Caio Marcelo de Oliveira Filho <[email protected]>
* compiler: add shader_info.cs.user_data_components_amdMarek Olšák2019-08-121-0/+1
|
* compiler: add shader_info.vs.blit_sgprs_amdMarek Olšák2019-08-121-0/+7
| | | | for internal radeonsi shaders
* nir/gather_info: Look for uses of helper invocationsJason Ekstrand2019-07-231-0/+8
| | | | | | | | | The one obvious omission here is gl_HelperInvocation itself. However, the spec doesn't require that we generate then when gl_HelperInvocation is used, it merely mandates that we report them if they are there. Reviewed-by: Alyssa Rosenzweig <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]>
* spirv: Implement SPV_EXT_demote_to_helper_invocationCaio Marcelo de Oliveira Filho2019-07-081-0/+1
| | | | Reviewed-by: Jason Ekstrand <[email protected]>
* spirv/nir: add support for AMD_shader_ballot and Groups capabilityDaniel Schürmann2019-06-131-2/+3
| | | | | | | | This commit also renames existing AMD capabilities: - gcn_shader -> amd_gcn_shader - trinary_minmax -> amd_trinary_minmax Reviewed-by: Connor Abbott <[email protected]>
* spirv: Implement SPV_EXT_fragment_shader_interlockJason Ekstrand2019-06-041-0/+2
| | | | Reviewed-by: Caio Marcelo de Oliveira Filho <[email protected]>
* spirv: add missing SPV_EXT_descriptor_indexing capabilitiesJuan A. Suarez Romero2019-04-301-0/+2
| | | | | | | | | | | | | | Add ShaderNonUniformEXT, UniformBufferArrayNonUniformIndexingEXT, SampledImageArrayNonUniformIndexingEXT, StorageBufferArrayNonUniformIndexingEXT, StorageImageArrayNonUniformIndexingEXT, InputAttachmentArrayNonUniformIndexingEXT, UniformTexelBufferArrayNonUniformIndexingEXT and StorageTexelBufferArrayNonUniformIndexingEXT capabilities. Cc: [email protected] Reviewed-by: Jason Ekstrand <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]>
* spirv: add SpvCapabilityFloat16 supportSamuel Pitoiset2019-04-151-0/+1
| | | | | Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]>
* spirv: Add support for DerivativeGroup capabilitiesCaio Marcelo de Oliveira Filho2019-04-081-0/+1
| | | | | | | | | | | | As defined in SPV_NV_compute_shader_derivatives. These control how the invocations are arranged in a CS when doing derivative and related operations (which are also enabled by the extension). Since we expect valid SPIR-V, we don't need to do more work at SPIR-V level to enable the derivative and related operations to be called. Reviewed-by: Ian Romanick <[email protected]> Reviewed-by: Jason Ekstrand <[email protected]>
* glsl: Parse and propagate derivative_group to shader_infoCaio Marcelo de Oliveira Filho2019-04-081-0/+6
| | | | | | | | | | | | NV_compute_shader_derivatives allow selecting between two possible arrangements (quads and linear) when calculating derivatives and certain subgroup operations in case of Vulkan. So parse and propagate those up to shader_info.h. v2: Do not fail when ARB_compute_variable_group_size is being used, since we are still clarifying what is the right thing to do here. Reviewed-by: Ian Romanick <[email protected]>
* nir/spirv: improve parsing of the memory modelKarol Herbst2019-03-051-0/+9
| | | | | | | v2: add some vtn_fail_ifs Signed-off-by: Karol Herbst <[email protected]> Reviewed-by: Jason Ekstrand <[email protected]>
* nir: Add ability for shaders to use window space coordinates.Timur Kristóf2019-03-051-0/+3
| | | | | | | | | | | | | This patch adds a shader_info field that tells the driver to use window space coordinates for a given vertex shader. It also enables this feature in radeonsi (the only NIR-capable driver that supported it in TGSI), and makes tgsi_to_nir aware of it. Signed-Off-By: Timur Kristóf <[email protected]> Tested-by: Andre Heider <[email protected]> Tested-by: Rob Clark <[email protected]> Reviewed-by: Timothy Arceri <[email protected]> Reviewed-by: Eric Anholt <[email protected]>
* nir, glsl: move pixel_center_integer/origin_upper_left to shader_info.fsAlejandro Piñeiro2019-02-211-0/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | On GLSL that info is set as a layout qualifier when redeclaring gl_FragCoord, so somehow tied to a specific variable. But in practice, they behave as a global of the shader. On ARB programs they are set using a global OPTION (defined at ARB_fragment_coord_conventions), and on SPIR-V using ExecutionModes, that are also not tied specifically to the builtin. This patch moves that info from nir variable and ir variable to nir shader and gl_program shader_info respectively, so the map is more similar to SPIR-V, and ARB programs, instead of more similar to GLSL. FWIW, shader_info.fs already had pixel_center_integer, so this change also removes some redundancy. Also, as struct gl_program also includes a shader_info, we removed gl_program::OriginUpperLeft and PixelCenterInteger, as it would be superfluous. This change was needed because recently spirv_to_nir changed the order in which execution modes and variables are handled, so the variables didn't get the correct values. Now the info is set on the shader itself, and we don't need to go back to the builtin variable to set it. Fixes: e68871f6a ("spirv: Handle constants and types before execution modes") v2: (Jason) * glsl_to_nir: get the info before glsl_to_nir, while all the rest of the info gathering is happening * prog_to_nir: gather the info on a general info-gathering pass, not on variable setup. v3: (Jason) * Squash with the patch that removes that info from ir variable * anv: assert that OriginUpperLeft is true. It should be already set by spirv_to_nir. * blorp: set origin_upper_left on its core "compile fragment shader", not just on some specific places (for this we added an helper on a previous patch). * prog_to_nir: no need to gather specifically this fragcoord modes as the full gl_program shader_info is copied. * spirv_to_nir: assert that we are a fragment shader when handling this execution modes. v4: (reported by failing gitlab pipeline #18750) * state_tracker: update too due changes on ir.h/gl_program v5: * blorp: minor change after change on previous patch * radeonsi: update due this change. v6: (Timothy Arceri) * prog_to_nir: remove extra whitespace * shader_info: don't use :1 on origin_upper_left * glsl: program.fs.origin_upper_left/pixel_center_integer can be move out of the shader list loop
* nir: Gather texture bitmasks in gl_nir_lower_samplers_as_deref.Kenneth Graunke2019-02-111-0/+3
| | | | | | | | | | | | | | | | | | | | | | | | Eric and I would like a bitmask of which samplers are used, similar to prog->SamplersUsed, but available in NIR. The linker uses SamplersUsed for resource limit checking, but later optimizations may eliminate more samplers. So instead of propagating it through, we gather a new one. While there, we also gather the existing textures_used_by_txf bitmask. Gathering these bitfields in nir_shader_gather_info is awkward at best. The main reason is that it introduces an ordering dependency between the two passes. If gathering runs before lower_samplers_as_deref, it can't look at var->data.binding. If the driver doesn't use the full lowering to texture_index/texture_array_size (like radeonsi), then the gathering can't use those fields. Gathering might be run early /and/ late, first to get varying info, and later to update it after variant lowering. At this point, should gathering work on pre-lowered or post-lowered code? Pre-lowered is also harder due to the presence of structure types. Just doing the gathering when we do the lowering alleviates these ordering problems. This fixes ordering issues in i965 and makes the txf info gathering work for radeonsi (though they don't use it). Reviewed-by: Eric Anholt <[email protected]>
* nir: Move V3D's "the shader was TGSI, ignore FS output types" flag to NIR.Eric Anholt2019-02-051-0/+19
| | | | | | | | | | | | | | Ken's rework of mesa/st builtins to NIR means that we'll have more NIR shaders with color output types that are mismatched with the render target types. Since this is behavior that GLSL doesn't require, add it as a shader_info option so the driver can know that it needs to ignore the FS output's base type in favor of the actual render target's. This prevents needing additional variants in several mesa/st paths (clear, pbo upload, pbo download), given that the driver already has to handle the variants for any TGSI being passed to it (from u_blitter, for example). Reviewed-by: Rob Clark <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]>
* spirv: Add support for SPV_EXT_physical_storage_bufferJason Ekstrand2019-01-261-0/+1
| | | | Reviewed-by: Bas Nieuwenhuizen <[email protected]>
* nir/vtn: add caps for some cl related capabilitiesRob Clark2019-01-211-0/+3
| | | | | | | | | | | vtn supports these, so don't squalk if user is happy with enabling these. v2: add new members sorted Signed-off-by: Karol Herbst <[email protected]> Reviewed-by: Jason Ekstrand <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]>
* nir: Add and set info::uses_64bitMatt Turner2019-01-091-0/+5
| | | | | | | | Will be used to communicate that a shader uses 64-bit operations to the concerned lowering passes. Reviewed-by: Kenneth Graunke <[email protected]> Reviewed-by: Jason Ekstrand <[email protected]>
* spirv: Sort supported capabilitiesJason Ekstrand2019-01-071-17/+17
| | | | Reviewed-by: Caio Marcelo de Oliveira Filho <[email protected]>
* spirv: add support for SpvCapabilityStorageImageMultisampleSamuel Pitoiset2018-12-201-0/+1
| | | | | Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]>
* spirv: Add support for MinLodJason Ekstrand2018-12-111-0/+1
| | | | Reviewed-by: Ian Romanick <[email protected]>
* spirv: add SpvCapabilityInt64AtomicsSamuel Pitoiset2018-12-051-0/+1
| | | | | | | Required for VK_KHR_shader_atomic_int64. Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Jason Ekstrand <[email protected]>
* compiler: Move double_inputs to gl_program::DualSlotInputsJason Ekstrand2018-09-061-3/+0
| | | | | | | | | | | | | | | | | | | | | | | Previously, we had two field in shader_info: double_inputs_read and double_inputs. Presumably, the one was for all double inputs that are read and the other is all that exist. However, because nir_gather_info regenerates these two values, there is a possibility, if a variable gets deleted, that the value of double_inputs could change over time. This is a problem because double_inputs is used to remap the input locations to a two-slot-per-dvec3/4 scheme for i965. If that mapping were to change between glsl_to_nir and back-end state setup, we would fall over when trying to map the NIR outputs back onto the GL location space. This commit changes the way slot re-mapping works. Instead of the double_inputs field in shader_info, it adds a DualSlotInputs bitfield to gl_program. By having it in gl_program, we more easily guarantee that NIR passes won't touch it after it's been set. It also makes more sense to put it in a GL data structure since it's really a mapping from GL slots to back-end and/or NIR slots and not really a NIR shader thing. Tested-by: Alejandro Piñeiro <[email protected]> (ARB_gl_spirv tests) Reviewed-by: Alejandro Piñeiro <[email protected]> Reviewed-by: Timothy Arceri <[email protected]>
* compiler/spirv: add XFB and GeometryStreams capability check supportAlejandro Piñeiro2018-07-311-0/+2
| | | | Reviewed-by: Timothy Arceri <[email protected]>
* spirv: add support for SPV_KHR_post_depth_coverageIlia Mirkin2018-07-221-0/+1
| | | | | | | | | Allow the capability to be exposed, and convert the new execution mode into fs state. Signed-off-by: Ilia Mirkin <[email protected]> Reviewed-by: Lionel Landwerlin <[email protected]> Reviewed-by: Jason Ekstrand <[email protected]>
* spirv/nir: Add support for SPV_KHR_8bit_storageJose Maria Casanova Crespo2018-07-101-0/+1
| | | | Reviewed-by: Jason Ekstrand <[email protected]>
* spirv/nir: add capability check for SpvCapabilityAtomicStorageAlejandro Piñeiro2018-07-031-0/+1
| | | | | | | | | | | | | | | | | Capability that informs if atomic counters are supported. From SPIR-V 1.0 spec, section 3.7, "Storage Class", item 10 from table: (Column "Storage Class"): "AtomicCounter For holding atomic counters. Visible across all functions of the current invocation. Atomic counter-specific memory." (Column "Required Capability"): "AtomicStorage" Reviewed-by: Timothy Arceri <[email protected]>
* spirv: add/hookup SpvCapabilityStencilExportEXTGustavo Lima Chaves2018-06-081-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | v2: An attempt to support SpvExecutionModeStencilRefReplacingEXT's behavior also follows, with the interpretation to said mode being we prevent writes to the built-in FragStencilRefEXT variable when the execution mode isn't set. v3: A more cautious reading of 1db44252d01bf7539452ccc2b5210c74b8dcd573 led me to a missing change that would stop (what I later discovered were) GPU hangs on the CTS test written to exercise this. v4: Turn FragStencilRefEXT decoration usage without StencilRefReplacingEXT mode into a warning, instead of trying to make the variable read-only. If we are to follow the originating extension on GL, the built-in variable in question should never be readable anyway. v5/v6: rebases. v7: Fix check for gen9 lost in rebase. (Ilia) Reduce the scope of the bool used to track whether SpvExecutionModeStencilRefReplacingEXT was used. Was in shader_info, moved to vtn_builder. (Jason) v8: Assert for fragment shader handling StencilRefReplacingEXT execution mode. (Caio) Remove warning logic, since an entry point might not have StencilRefReplacingEXT execution mode, but the global output variable might still exist for another entry point in the module. (Jason) Reviewed-by: Jason Ekstrand <[email protected]>
* mesa: Add GL/GLSL plumbing for ARB_fragment_shader_interlock.Plamena Manolova2018-06-011-0/+5
| | | | | | | | | | | | | This extension provides new GLSL built-in functions beginInvocationInterlockARB() and endInvocationInterlockARB() that delimit a critical section of fragment shader code. For pairs of shader invocations with "overlapping" coverage in a given pixel, the OpenGL implementation will guarantee that the critical section of the fragment shader will be executed for only one fragment at a time. Signed-off-by: Plamena Manolova <[email protected]> Reviewed-by: Francisco Jerez <[email protected]>
* compiler/spirv: add implementation to check for SpvCapabilityInt16 supportIago Toral Quiroga2018-05-031-0/+1
| | | | Reviewed-by: Jason Ekstrand <[email protected]>
* spirv: Add support for runtime descriptor array cap.Bas Nieuwenhuizen2018-04-181-0/+1
| | | | Reviewed-by: Samuel Pitoiset <[email protected]>
* spirv: Add support for VK_EXT_descriptor_indexing uniform indexing caps.Bas Nieuwenhuizen2018-04-181-0/+1
| | | | Reviewed-by: Samuel Pitoiset <[email protected]>
* st/glsl_to_nir: gather next_stage in shader_infoTimothy Arceri2018-04-021-0/+5
| | | | Reviewed-by: Marek Olšák <[email protected]>
* spirv: add support for SPV_AMD_shader_trinary_minmaxDave Airlie2018-03-291-0/+1
| | | | | | | Co-authored-by: Daniel Schürmann <[email protected]> Signed-off-by: Dave Airlie <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]> Reviewed-by: Samuel Pitoiset <[email protected]>
* spirv/radv: add AMD_gcn_shader capability, remove current extensionsAlejandro Piñeiro2018-03-151-5/+1
| | | | | | | | | | | | | | | | | | | | | | So now, during spirv_to_nir, it uses the capability instead of the extension. Note that we are really doing here is treating SPV_AMD_gcn_shader as other supported extensions. SPV_AMD_gcn_shader is not the first SPV extension supported. For example, the capability draw_parameters infers if the extension SPV_KHR_shader_draw_parameters is supported or not. This could be seen as counter-intuitive, and that it would be easier to define which extensions are supported, and based our checks on that, but we need to take into account that some capabilities are optional from core, and others came from new extensions. Also this commit would make the implementation of ARB_spirv_extensions easier. v2: AMD_gcn_shader capability renamed to gcn_shader (Daniel Schürmann) Reviewed-by: Daniel Schürmann <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]>
* spirv: handle AMD_gcn_shader extended instructionsDaniel Schürmann2018-03-071-0/+5
| | | | | | Co-authored-by: Dave Airlie <[email protected]> Signed-off-by: Daniel Schürmann <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]>
* spirv: Add support for subgroup arithmeticJason Ekstrand2018-03-071-0/+1
| | | | | Reviewed-by: Lionel Landwerlin <[email protected]> Reviewed-by: Iago Toral Quiroga <[email protected]>
* spirv: Add subgroup quad supportJason Ekstrand2018-03-071-0/+1
| | | | | Reviewed-by: Lionel Landwerlin <[email protected]> Reviewed-by: Iago Toral Quiroga <[email protected]>
* spirv: Add subgroup shuffle supportJason Ekstrand2018-03-071-0/+1
| | | | | Reviewed-by: Lionel Landwerlin <[email protected]> Reviewed-by: Iago Toral Quiroga <[email protected]>
* spirv: Add subgroup vote supportJason Ekstrand2018-03-071-0/+1
| | | | Reviewed-by: Lionel Landwerlin <[email protected]>
* spirv: Add subgroup ballot supportJason Ekstrand2018-03-071-0/+1
| | | | Reviewed-by: Iago Toral Quiroga <[email protected]>
* spirv: Add initial subgroup supportJason Ekstrand2018-03-071-0/+1
| | | | | Reviewed-by: Samuel Iglesias Gonsálvez <[email protected]> Reviewed-by: Iago Toral Quiroga <[email protected]>